Commit e90dea6aafa14eb60ab0927f6fe54c620f61ef74

Authored by Daniel Baluta
Committed by Jonathan Cameron
1 parent ccf54555da

iio: accel: kxcjk-1013: Fix kxcjk10013_set_range

Currently, we get the new GSEL bits by OR-ing the old values
with the new ones. This only works first time when the old
values are 0.

Startup:
	* GSEL0 = 0, GSEL1 = 0

Set range to 4G: (GSEL0 = 1, GSEL1 = 0)
	* GSEL0 = 0 | 1 = 1
	* GSEL1 = 0 | 0 = 0
	* correct

Change range to 2G: (GSEL0 = 0, GSEL1 = 0)
	* GSEL0 = 1 | 0 = 1
	* GSEL1 = 0 | 0 = 0
	* wrong, GSEL0 should be 0

This has the nice effect that we can use the full scale range,
exported in in_accel_scale_available.

Fixes: a735e3d7f03 (iio: accel: kxcjk-1013: Set adjustable range)
Signed-off-by: Daniel Baluta <daniel.baluta@intel.com>
Reviewed-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>

Showing 1 changed file with 2 additions and 0 deletions Side-by-side Diff

drivers/iio/accel/kxcjk-1013.c
... ... @@ -269,6 +269,8 @@
269 269 return ret;
270 270 }
271 271  
  272 + ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 |
  273 + KXCJK1013_REG_CTRL1_BIT_GSEL1);
272 274 ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3);
273 275 ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4);
274 276