Commit eba8291b514e6e590be161afcbfdab58cc5da6b8
Committed by
Ralf Baechle
1 parent
0167509574
Exists in
master
and in
20 other branches
[MIPS] Alchemy: kill useless time variables
Since the commit 91a2fcc88634663e9e13dcdfad0e4a860e64aeee ([MIPS] Consolidate all variants of MIPS cp0 timer interrupt handlers) removed the Alchemy specific timer handler, 'r4k_offset' and 'r4k_cur' variables became practically useless, so get rid of them at last, renaming cal_r4off() function into calc_clock() and making it return CPU frequency. Also, make 'no_au1xxx_32khz' variable static... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Showing 2 changed files with 6 additions and 17 deletions Side-by-side Diff
arch/mips/au1000/common/dbg_io.c
... | ... | @@ -56,7 +56,7 @@ |
56 | 56 | #define UART16550_WRITE(y, z) (au_writel(z&0xff, DEBUG_BASE + y)) |
57 | 57 | |
58 | 58 | extern unsigned long get_au1x00_uart_baud_base(void); |
59 | -extern unsigned long cal_r4koff(void); | |
59 | +extern unsigned long calc_clock(void); | |
60 | 60 | |
61 | 61 | void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop) |
62 | 62 | { |
... | ... | @@ -64,7 +64,7 @@ |
64 | 64 | if (UART16550_READ(UART_MOD_CNTRL) != 0x3) { |
65 | 65 | UART16550_WRITE(UART_MOD_CNTRL, 3); |
66 | 66 | } |
67 | - cal_r4koff(); | |
67 | + calc_clock(); | |
68 | 68 | |
69 | 69 | /* disable interrupts */ |
70 | 70 | UART16550_WRITE(UART_IER, 0); |
arch/mips/au1000/common/time.c
... | ... | @@ -48,9 +48,7 @@ |
48 | 48 | #include <linux/mc146818rtc.h> |
49 | 49 | #include <linux/timex.h> |
50 | 50 | |
51 | -static unsigned long r4k_offset; /* Amount to increment compare reg each time */ | |
52 | -static unsigned long r4k_cur; /* What counter should be at next timer irq */ | |
53 | -int no_au1xxx_32khz; | |
51 | +static int no_au1xxx_32khz; | |
54 | 52 | extern int allow_au1k_wait; /* default off for CP0 Counter */ |
55 | 53 | |
56 | 54 | #ifdef CONFIG_PM |
... | ... | @@ -184,7 +182,7 @@ |
184 | 182 | * "wait" is enabled, and we need to detect if the 32KHz isn't present |
185 | 183 | * but requested......got it? :-) -- Dan |
186 | 184 | */ |
187 | -unsigned long cal_r4koff(void) | |
185 | +unsigned long calc_clock(void) | |
188 | 186 | { |
189 | 187 | unsigned long cpu_speed; |
190 | 188 | unsigned long flags; |
191 | 189 | |
192 | 190 | |
193 | 191 | |
... | ... | @@ -229,28 +227,19 @@ |
229 | 227 | // Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16) |
230 | 228 | set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16)); |
231 | 229 | spin_unlock_irqrestore(&time_lock, flags); |
232 | - return (cpu_speed / HZ); | |
230 | + return cpu_speed; | |
233 | 231 | } |
234 | 232 | |
235 | 233 | void __init plat_time_init(void) |
236 | 234 | { |
237 | - unsigned int est_freq; | |
235 | + unsigned int est_freq = calc_clock(); | |
238 | 236 | |
239 | - printk("calculating r4koff... "); | |
240 | - r4k_offset = cal_r4koff(); | |
241 | - printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset); | |
242 | - | |
243 | - //est_freq = 2*r4k_offset*HZ; | |
244 | - est_freq = r4k_offset*HZ; | |
245 | 237 | est_freq += 5000; /* round */ |
246 | 238 | est_freq -= est_freq%10000; |
247 | 239 | printk("CPU frequency %d.%02d MHz\n", est_freq/1000000, |
248 | 240 | (est_freq%1000000)*100/1000000); |
249 | 241 | set_au1x00_speed(est_freq); |
250 | 242 | set_au1x00_lcd_clock(); // program the LCD clock |
251 | - | |
252 | - r4k_cur = (read_c0_count() + r4k_offset); | |
253 | - write_c0_compare(r4k_cur); | |
254 | 243 | |
255 | 244 | #ifdef CONFIG_PM |
256 | 245 | /* |