Commit ec6931b281797b69e6cf109f9cc94d5a2bf994e0

Authored by Will Deacon
Committed by Linus Torvalds
1 parent ac6c9e2bed

word-at-a-time: avoid undefined behaviour in zero_bytemask macro

The asm-generic, big-endian version of zero_bytemask creates a mask of
bytes preceding the first zero-byte by left shifting ~0ul based on the
position of the first zero byte.

Unfortunately, if the first (top) byte is zero, the output of
prep_zero_mask has only the top bit set, resulting in undefined C
behaviour as we shift left by an amount equal to the width of the type.
As it happens, GCC doesn't manage to spot this through the call to fls(),
but the issue remains if architectures choose to implement their shift
instructions differently.

An example would be arch/arm/ (AArch32), where LSL Rd, Rn, #32 results
in Rd == 0x0, whilst on arch/arm64 (AArch64) LSL Xd, Xn, #64 results in
Xd == Xn.

Rather than check explicitly for the problematic shift, this patch adds
an extra shift by 1, replacing fls with __fls. Since zero_bytemask is
never called with a zero argument (has_zero() is used to check the data
first), we don't need to worry about calling __fls(0), which is
undefined.

Cc: <stable@vger.kernel.org>
Cc: Victor Kamensky <victor.kamensky@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Showing 1 changed file with 2 additions and 6 deletions Side-by-side Diff

include/asm-generic/word-at-a-time.h
... ... @@ -50,12 +50,8 @@
50 50 }
51 51  
52 52 #ifndef zero_bytemask
53   -#ifdef CONFIG_64BIT
54   -#define zero_bytemask(mask) (~0ul << fls64(mask))
55   -#else
56   -#define zero_bytemask(mask) (~0ul << fls(mask))
57   -#endif /* CONFIG_64BIT */
58   -#endif /* zero_bytemask */
  53 +#define zero_bytemask(mask) (~0ul << __fls(mask) << 1)
  54 +#endif
59 55  
60 56 #endif /* _ASM_WORD_AT_A_TIME_H */