Eric Lee / smarc-ti-linux-kernel

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Commit ef9a805ac8a315da958ca920daf0526058aa4a59

Authored by Texas Instruments Auto Merger
2 parents 4a9b1e0a46 8c5c15b020
Exists in ti-lsk-linux-4.1.y and in 5 other branches processor-sdk-linux-02.00.01, smarc-ti-lsk-linux-4.1.y, smarct3x-processor-sdk-linux-02.00.01, smarct4x-800-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-linux-02.00.01

Merge branch 'ti-linux-4.1.y' of git.ti.com:ti-linux-kernel/ti-linux-kernel into ti-lsk-linux-4.1.y 

TI-Feature: ti_linux_base_lsk
TI-Tree: git@git.ti.com:ti-linux-kernel/ti-linux-kernel.git
TI-Branch: ti-linux-4.1.y

* 'ti-linux-4.1.y' of git.ti.com:ti-linux-kernel/ti-linux-kernel:
  dmaengine: edma: Optimize memcpy operation
  dmaengine: edma: Remove alignment constraint for memcpy
  ARM: cmpxchg: avoid warnings from macro-ized cmpxchg() implementations
  ARM: dts: omap5-uevm: Add Uart wakeup interrupt
  ARM: dts: omap5-uevm.dts: fix i2c5 pinctrl offsets
  PM / Runtime: Update last_busy in rpm_resume
  ARM: dts: keystone: Update SoC specific compatible flags
  ARM: keystone: Update compatible to have SoC specific matches
  Documentation: dt: keystone: provide SoC specific compatible flags
  ARM: 8422/1: enable imprecise aborts during early kernel startup
  ti_config_fragments/baseport.cfg: Support Ramdisk

Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>

Showing 17 changed files Side-by-side Diff

Documentation/devicetree/bindings/arm/keystone/keystone.txt
Diff comments   View file @ ef9a805
... ... @@ -9,13 +9,27 @@
9 9 the form "ti,keystone-*". Generic devices like gic, arch_timers, ns16550
10 10 type UART should use the specified compatible for those devices.
11 11  
  12 +SoC families:
  13 +
  14 +- Keystone 2 generic SoC:
  15 + compatible = "ti,keystone"
  16 +
  17 +SoCs:
  18 +
  19 +- Keystone 2 Hawking/Kepler
  20 + compatible = "ti,k2hk", "ti,keystone"
  21 +- Keystone 2 Lamarr
  22 + compatible = "ti,k2l", "ti,keystone"
  23 +- Keystone 2 Edison
  24 + compatible = "ti,k2e", "ti,keystone"
  25 +
12 26 Boards:
13 27 - Keystone 2 Hawking/Kepler EVM
14   - compatible = "ti,k2hk-evm","ti,keystone"
  28 + compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone"
15 29  
16 30 - Keystone 2 Lamarr EVM
17   - compatible = "ti,k2l-evm","ti,keystone"
  31 + compatible = "ti,k2l-evm", "ti, k2l", "ti,keystone"
18 32  
19 33 - Keystone 2 Edison EVM
20   - compatible = "ti,k2e-evm","ti,keystone"
  34 + compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone"
arch/arm/boot/dts/k2e-evm.dts
Diff comments   View file @ ef9a805
... ... @@ -13,7 +13,7 @@
13 13 #include "k2e.dtsi"
14 14  
15 15 / {
16   - compatible = "ti,k2e-evm","ti,keystone";
  16 + compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone";
17 17 model = "Texas Instruments Keystone 2 Edison EVM";
18 18  
19 19 soc {
arch/arm/boot/dts/k2e.dtsi
Diff comments   View file @ ef9a805
... ... @@ -9,6 +9,9 @@
9 9 */
10 10  
11 11 / {
  12 + compatible = "ti,k2e", "ti,keystone";
  13 + model = "Texas Instruments Keystone 2 Edison SoC";
  14 +
12 15 cpus {
13 16 #address-cells = <1>;
14 17 #size-cells = <0>;
arch/arm/boot/dts/k2hk-evm.dts
Diff comments   View file @ ef9a805
... ... @@ -13,7 +13,7 @@
13 13 #include "k2hk.dtsi"
14 14  
15 15 / {
16   - compatible = "ti,k2hk-evm","ti,keystone";
  16 + compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone";
17 17 model = "Texas Instruments Keystone 2 Kepler/Hawking EVM";
18 18  
19 19 soc {
arch/arm/boot/dts/k2hk.dtsi
Diff comments   View file @ ef9a805
... ... @@ -9,6 +9,9 @@
9 9 */
10 10  
11 11 / {
  12 + compatible = "ti,k2hk", "ti,keystone";
  13 + model = "Texas Instruments Keystone 2 Kepler/Hawking SoC";
  14 +
12 15 cpus {
13 16 #address-cells = <1>;
14 17 #size-cells = <0>;
arch/arm/boot/dts/k2l-evm.dts
Diff comments   View file @ ef9a805
... ... @@ -13,7 +13,7 @@
13 13 #include "k2l.dtsi"
14 14  
15 15 / {
16   - compatible = "ti,k2l-evm","ti,keystone";
  16 + compatible = "ti,k2l-evm", "ti,k2l", "ti,keystone";
17 17 model = "Texas Instruments Keystone 2 Lamarr EVM";
18 18  
19 19 soc {
arch/arm/boot/dts/k2l.dtsi
Diff comments   View file @ ef9a805
... ... @@ -9,6 +9,9 @@
9 9 */
10 10  
11 11 / {
  12 + compatible = "ti,k2l", "ti,keystone";
  13 + model = "Texas Instruments Keystone 2 Lamarr SoC";
  14 +
12 15 cpus {
13 16 #address-cells = <1>;
14 17 #size-cells = <0>;
arch/arm/boot/dts/keystone.dtsi
Diff comments   View file @ ef9a805
... ... @@ -12,6 +12,7 @@
12 12 #include "skeleton.dtsi"
13 13  
14 14 / {
  15 + compatible = "ti,keystone";
15 16 model = "Texas Instruments Keystone 2 SoC";
16 17 #address-cells = <2>;
17 18 #size-cells = <2>;
arch/arm/boot/dts/omap5-uevm.dts
Diff comments   View file @ ef9a805
... ... @@ -194,8 +194,8 @@
194 194  
195 195 i2c5_pins: pinmux_i2c5_pins {
196 196 pinctrl-single,pins = <
197   - 0x184 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */
198   - 0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */
  197 + 0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */
  198 + 0x188 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */
199 199 >;
200 200 };
201 201  
202 202  
203 203  
... ... @@ -624,18 +624,20 @@
624 624 };
625 625  
626 626 &uart1 {
627   - pinctrl-names = "default";
628   - pinctrl-0 = <&uart1_pins>;
  627 + pinctrl-names = "default";
  628 + pinctrl-0 = <&uart1_pins>;
629 629 };
630 630  
631 631 &uart3 {
632   - pinctrl-names = "default";
633   - pinctrl-0 = <&uart3_pins>;
  632 + pinctrl-names = "default";
  633 + pinctrl-0 = <&uart3_pins>;
  634 + interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
  635 + <&omap5_pmx_core 0x19c>;
634 636 };
635 637  
636 638 &uart5 {
637   - pinctrl-names = "default";
638   - pinctrl-0 = <&uart5_pins>;
  639 + pinctrl-names = "default";
  640 + pinctrl-0 = <&uart5_pins>;
639 641 };
640 642  
641 643 &cpu0 {
arch/arm/include/asm/cmpxchg.h
Diff comments   View file @ ef9a805
... ... @@ -102,8 +102,10 @@
102 102 return ret;
103 103 }
104 104  
105   -#define xchg(ptr,x) \
106   - ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
  105 +#define xchg(ptr, x) ({ \
  106 + (__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), \
  107 + sizeof(*(ptr))); \
  108 +})
107 109  
108 110 #include <asm-generic/cmpxchg-local.h>
109 111  
110 112  
111 113  
... ... @@ -118,14 +120,16 @@
118 120 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
119 121 * them available.
120 122 */
121   -#define cmpxchg_local(ptr, o, n) \
122   - ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
123   - (unsigned long)(n), sizeof(*(ptr))))
  123 +#define cmpxchg_local(ptr, o, n) ({ \
  124 + (__typeof(*ptr))__cmpxchg_local_generic((ptr), \
  125 + (unsigned long)(o), \
  126 + (unsigned long)(n), \
  127 + sizeof(*(ptr))); \
  128 +})
  129 +
124 130 #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
125 131  
126   -#ifndef CONFIG_SMP
127 132 #include <asm-generic/cmpxchg.h>
128   -#endif
129 133  
130 134 #else /* min ARCH >= ARMv6 */
131 135  
... ... @@ -201,11 +205,12 @@
201 205 return ret;
202 206 }
203 207  
204   -#define cmpxchg(ptr,o,n) \
205   - ((__typeof__(*(ptr)))__cmpxchg_mb((ptr), \
206   - (unsigned long)(o), \
207   - (unsigned long)(n), \
208   - sizeof(*(ptr))))
  208 +#define cmpxchg(ptr,o,n) ({ \
  209 + (__typeof__(*(ptr)))__cmpxchg_mb((ptr), \
  210 + (unsigned long)(o), \
  211 + (unsigned long)(n), \
  212 + sizeof(*(ptr))); \
  213 +})
209 214  
210 215 static inline unsigned long __cmpxchg_local(volatile void *ptr,
211 216 unsigned long old,
... ... @@ -227,6 +232,13 @@
227 232 return ret;
228 233 }
229 234  
  235 +#define cmpxchg_local(ptr, o, n) ({ \
  236 + (__typeof(*ptr))__cmpxchg_local((ptr), \
  237 + (unsigned long)(o), \
  238 + (unsigned long)(n), \
  239 + sizeof(*(ptr))); \
  240 +})
  241 +
230 242 static inline unsigned long long __cmpxchg64(unsigned long long *ptr,
231 243 unsigned long long old,
232 244 unsigned long long new)
... ... @@ -252,6 +264,14 @@
252 264 return oldval;
253 265 }
254 266  
  267 +#define cmpxchg64_relaxed(ptr, o, n) ({ \
  268 + (__typeof__(*(ptr)))__cmpxchg64((ptr), \
  269 + (unsigned long long)(o), \
  270 + (unsigned long long)(n)); \
  271 +})
  272 +
  273 +#define cmpxchg64_local(ptr, o, n) cmpxchg64_relaxed((ptr), (o), (n))
  274 +
255 275 static inline unsigned long long __cmpxchg64_mb(unsigned long long *ptr,
256 276 unsigned long long old,
257 277 unsigned long long new)
... ... @@ -265,23 +285,11 @@
265 285 return ret;
266 286 }
267 287  
268   -#define cmpxchg_local(ptr,o,n) \
269   - ((__typeof__(*(ptr)))__cmpxchg_local((ptr), \
270   - (unsigned long)(o), \
271   - (unsigned long)(n), \
272   - sizeof(*(ptr))))
273   -
274   -#define cmpxchg64(ptr, o, n) \
275   - ((__typeof__(*(ptr)))__cmpxchg64_mb((ptr), \
276   - (unsigned long long)(o), \
277   - (unsigned long long)(n)))
278   -
279   -#define cmpxchg64_relaxed(ptr, o, n) \
280   - ((__typeof__(*(ptr)))__cmpxchg64((ptr), \
281   - (unsigned long long)(o), \
282   - (unsigned long long)(n)))
283   -
284   -#define cmpxchg64_local(ptr, o, n) cmpxchg64_relaxed((ptr), (o), (n))
  288 +#define cmpxchg64(ptr, o, n) ({ \
  289 + (__typeof__(*(ptr)))__cmpxchg64_mb((ptr), \
  290 + (unsigned long long)(o), \
  291 + (unsigned long long)(n)); \
  292 +})
285 293  
286 294 #endif /* __LINUX_ARM_ARCH__ >= 6 */
287 295  
arch/arm/include/asm/irqflags.h
Diff comments   View file @ ef9a805
... ... @@ -51,7 +51,15 @@
51 51  
52 52 #define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc")
53 53 #define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc")
  54 +
  55 +#ifndef CONFIG_CPU_V7M
  56 +#define local_abt_enable() __asm__("cpsie a @ __sta" : : : "memory", "cc")
  57 +#define local_abt_disable() __asm__("cpsid a @ __cla" : : : "memory", "cc")
54 58 #else
  59 +#define local_abt_enable() do { } while (0)
  60 +#define local_abt_disable() do { } while (0)
  61 +#endif
  62 +#else
55 63  
56 64 /*
57 65 * Save the current interrupt enable state & disable IRQs
... ... @@ -130,6 +138,8 @@
130 138 : "memory", "cc"); \
131 139 })
132 140  
  141 +#define local_abt_enable() do { } while (0)
  142 +#define local_abt_disable() do { } while (0)
133 143 #endif
134 144  
135 145 /*
arch/arm/kernel/smp.c
Diff comments   View file @ ef9a805
... ... @@ -385,6 +385,7 @@
385 385  
386 386 local_irq_enable();
387 387 local_fiq_enable();
  388 + local_abt_enable();
388 389  
389 390 /*
390 391 * OK, it's off to the idle thread for us
arch/arm/mach-keystone/keystone.c
Diff comments   View file @ ef9a805
... ... @@ -97,6 +97,9 @@
97 97 }
98 98  
99 99 static const char *const keystone_match[] __initconst = {
  100 + "ti,k2hk",
  101 + "ti,k2e",
  102 + "ti,k2l",
100 103 "ti,keystone",
101 104 NULL,
102 105 };
... ... @@ -1313,6 +1313,9 @@
1313 1313 */
1314 1314 local_flush_tlb_all();
1315 1315 flush_cache_all();
  1316 +
  1317 + /* Enable asynchronous aborts */
  1318 + local_abt_enable();
1316 1319 }
1317 1320  
1318 1321 static void __init kmap_init(void)
drivers/base/power/runtime.c
Diff comments   View file @ ef9a805
... ... @@ -746,6 +746,7 @@
746 746 } else {
747 747 no_callback:
748 748 __update_runtime_status(dev, RPM_ACTIVE);
  749 + pm_runtime_mark_last_busy(dev);
749 750 if (parent)
750 751 atomic_inc(&parent->power.child_count);
751 752 }
... ... @@ -328,18 +328,16 @@
328 328 */
329 329 static int edma_config_pset(struct dma_chan *chan, struct edma_pset *epset,
330 330 dma_addr_t src_addr, dma_addr_t dst_addr, u32 burst,
331   - enum dma_slave_buswidth dev_width, unsigned int dma_length,
  331 + unsigned int acnt, unsigned int dma_length,
332 332 enum dma_transfer_direction direction)
333 333 {
334 334 struct edma_chan *echan = to_edma_chan(chan);
335 335 struct device *dev = chan->device->dev;
336 336 struct edmacc_param *param = &epset->param;
337   - int acnt, bcnt, ccnt, cidx;
  337 + int bcnt, ccnt, cidx;
338 338 int src_bidx, dst_bidx, src_cidx, dst_cidx;
339 339 int absync;
340 340  
341   - acnt = dev_width;
342   -
343 341 /* src/dst_maxburst == 0 is the same case as src/dst_maxburst == 1 */
344 342 if (!burst)
345 343 burst = 1;
346 344  
347 345  
348 346  
349 347  
350 348  
351 349  
352 350  
353 351  
... ... @@ -541,37 +539,94 @@
541 539 struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
542 540 size_t len, unsigned long tx_flags)
543 541 {
544   - int ret;
  542 + int ret, nslots;
545 543 struct edma_desc *edesc;
546 544 struct device *dev = chan->device->dev;
547 545 struct edma_chan *echan = to_edma_chan(chan);
  546 + unsigned int width, pset_len;
548 547  
549 548 if (unlikely(!echan || !len))
550 549 return NULL;
551 550  
552   - edesc = kzalloc(sizeof(*edesc) + sizeof(edesc->pset[0]), GFP_ATOMIC);
  551 + if (len < SZ_64K) {
  552 + /*
  553 + * Transfer size less than 64K can be handled with one paRAM
  554 + * slot. ACNT = length
  555 + */
  556 + width = len;
  557 + pset_len = len;
  558 + nslots = 1;
  559 + } else {
  560 + /*
  561 + * Transfer size bigger than 64K will be handled with maximum of
  562 + * two paRAM slots.
  563 + * slot1: ACNT = 32767, length1: (length / 32767)
  564 + * slot2: the remaining amount of data.
  565 + */
  566 + width = SZ_32K - 1;
  567 + pset_len = rounddown(len, width);
  568 + /* One slot is enough for lengths multiple of (SZ_32K -1) */
  569 + if (unlikely(pset_len == len))
  570 + nslots = 1;
  571 + else
  572 + nslots = 2;
  573 + }
  574 +
  575 + edesc = kzalloc(sizeof(*edesc) + nslots * sizeof(edesc->pset[0]),
  576 + GFP_ATOMIC);
553 577 if (!edesc) {
554 578 dev_dbg(dev, "Failed to allocate a descriptor\n");
555 579 return NULL;
556 580 }
557 581  
558   - edesc->pset_nr = 1;
  582 + edesc->pset_nr = nslots;
  583 + edesc->residue = edesc->residue_stat = len;
  584 + edesc->direction = DMA_MEM_TO_MEM;
  585 + edesc->echan = echan;
559 586  
560 587 ret = edma_config_pset(chan, &edesc->pset[0], src, dest, 1,
561   - DMA_SLAVE_BUSWIDTH_4_BYTES, len, DMA_MEM_TO_MEM);
562   - if (ret < 0)
  588 + width, pset_len, DMA_MEM_TO_MEM);
  589 + if (ret < 0) {
  590 + kfree(edesc);
563 591 return NULL;
  592 + }
564 593  
565 594 edesc->absync = ret;
566 595  
567   - /*
568   - * Enable intermediate transfer chaining to re-trigger channel
569   - * on completion of every TR, and enable transfer-completion
570   - * interrupt on completion of the whole transfer.
571   - */
572 596 edesc->pset[0].param.opt |= ITCCHEN;
573   - edesc->pset[0].param.opt |= TCINTEN;
  597 + if (nslots == 1) {
  598 + /* Enable transfer complete interrupt */
  599 + edesc->pset[0].param.opt |= TCINTEN;
  600 + } else {
  601 + /* Enable transfer complete chaining for the first slot */
  602 + edesc->pset[0].param.opt |= TCCHEN;
574 603  
  604 + if (echan->slot[1] < 0) {
  605 + echan->slot[1] =
  606 + edma_alloc_slot(EDMA_CTLR(echan->ch_num),
  607 + EDMA_SLOT_ANY);
  608 + if (echan->slot[1] < 0) {
  609 + kfree(edesc);
  610 + dev_err(dev, "%s: Failed to allocate slot\n",
  611 + __func__);
  612 + return NULL;
  613 + }
  614 + }
  615 + dest += pset_len;
  616 + src += pset_len;
  617 + pset_len = width = len % (SZ_32K - 1);
  618 +
  619 + ret = edma_config_pset(chan, &edesc->pset[1], src, dest, 1,
  620 + width, pset_len, DMA_MEM_TO_MEM);
  621 + if (ret < 0) {
  622 + kfree(edesc);
  623 + return NULL;
  624 + }
  625 +
  626 + edesc->pset[1].param.opt |= ITCCHEN;
  627 + edesc->pset[1].param.opt |= TCINTEN;
  628 + }
  629 +
575 630 return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags);
576 631 }
577 632  
... ... @@ -996,12 +1051,6 @@
996 1051 dma->residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
997 1052  
998 1053 dma->dev = dev;
999   -
1000   - /*
1001   - * code using dma memcpy must make sure alignment of
1002   - * length is at dma->copy_align boundary.
1003   - */
1004   - dma->copy_align = DMA_SLAVE_BUSWIDTH_4_BYTES;
1005 1054  
1006 1055 INIT_LIST_HEAD(&dma->channels);
1007 1056 }
ti_config_fragments/baseport.cfg
Diff comments   View file @ ef9a805
... ... @@ -59,4 +59,8 @@
59 59 # Voltagedomain/cpufreq config
60 60 CONFIG_VOLTAGE_DOMAIN_OMAP=y
61 61 CONFIG_CPUFREQ_VOLTDM=y
  62 +
  63 +# Support Ramdisk
  64 +CONFIG_BLK_DEV_RAM=y
  65 +CONFIG_BLK_DEV_RAM_SIZE=8096