Commit fba7e99458b606dc9a84332d38cd40e9d367633f

Authored by Linus Torvalds

Merge tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "One more week's worth of fixes.  Worth pointing out here are:

   - A patch fixing detaching of iommu registrations when a device is
     removed -- earlier the ops pointer wasn't managed properly
   - Another set of Renesas boards get the same GIC setup fixup as
     others have in previous -rcs
   - Serial port aliases fixups for sunxi.  We did the same to tegra but
     we caught that in time before the merge window due to more machines
     being affected.  Here it took longer for anyone to notice.
   - A couple more DT tweaks on sunxi
   - A follow-up patch for the mvebu coherency disabling in last -rc
     batch"

* tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  arm: dma-mapping: Set DMA IOMMU ops in arm_iommu_attach_device()
  ARM: shmobile: r8a7790: Instantiate GIC from C board code in legacy builds
  ARM: shmobile: r8a73a4: Instantiate GIC from C board code in legacy builds
  ARM: mvebu: don't set the PL310 in I/O coherency mode when I/O coherency is disabled
  ARM: sunxi: dt: Fix aliases
  ARM: dts: sun4i: Add simplefb node with de_fe0-de_be0-lcd0-hdmi pipeline
  ARM: dts: sun6i: ippo-q8h-v5: Fix serial0 alias
  ARM: dts: sunxi: Fix usb-phy support for sun4i/sun5i

Showing 22 changed files Side-by-side Diff

arch/arm/boot/dts/sun4i-a10.dtsi
... ... @@ -17,14 +17,6 @@
17 17  
18 18 aliases {
19 19 ethernet0 = &emac;
20   - serial0 = &uart0;
21   - serial1 = &uart1;
22   - serial2 = &uart2;
23   - serial3 = &uart3;
24   - serial4 = &uart4;
25   - serial5 = &uart5;
26   - serial6 = &uart6;
27   - serial7 = &uart7;
28 20 };
29 21  
30 22 chosen {
... ... @@ -39,6 +31,14 @@
39 31 <&ahb_gates 44>;
40 32 status = "disabled";
41 33 };
  34 +
  35 + framebuffer@1 {
  36 + compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
  37 + allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi";
  38 + clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
  39 + <&ahb_gates 44>, <&ahb_gates 46>;
  40 + status = "disabled";
  41 + };
42 42 };
43 43  
44 44 cpus {
... ... @@ -438,8 +438,8 @@
438 438 reg-names = "phy_ctrl", "pmu1", "pmu2";
439 439 clocks = <&usb_clk 8>;
440 440 clock-names = "usb_phy";
441   - resets = <&usb_clk 1>, <&usb_clk 2>;
442   - reset-names = "usb1_reset", "usb2_reset";
  441 + resets = <&usb_clk 0>, <&usb_clk 1>, <&usb_clk 2>;
  442 + reset-names = "usb0_reset", "usb1_reset", "usb2_reset";
443 443 status = "disabled";
444 444 };
445 445  
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
... ... @@ -55,6 +55,12 @@
55 55 model = "Olimex A10s-Olinuxino Micro";
56 56 compatible = "olimex,a10s-olinuxino-micro", "allwinner,sun5i-a10s";
57 57  
  58 + aliases {
  59 + serial0 = &uart0;
  60 + serial1 = &uart2;
  61 + serial2 = &uart3;
  62 + };
  63 +
58 64 soc@01c00000 {
59 65 emac: ethernet@01c0b000 {
60 66 pinctrl-names = "default";
arch/arm/boot/dts/sun5i-a10s.dtsi
... ... @@ -18,10 +18,6 @@
18 18  
19 19 aliases {
20 20 ethernet0 = &emac;
21   - serial0 = &uart0;
22   - serial1 = &uart1;
23   - serial2 = &uart2;
24   - serial3 = &uart3;
25 21 };
26 22  
27 23 chosen {
... ... @@ -390,8 +386,8 @@
390 386 reg-names = "phy_ctrl", "pmu1";
391 387 clocks = <&usb_clk 8>;
392 388 clock-names = "usb_phy";
393   - resets = <&usb_clk 1>;
394   - reset-names = "usb1_reset";
  389 + resets = <&usb_clk 0>, <&usb_clk 1>;
  390 + reset-names = "usb0_reset", "usb1_reset";
395 391 status = "disabled";
396 392 };
397 393  
arch/arm/boot/dts/sun5i-a13-hsg-h702.dts
... ... @@ -53,6 +53,10 @@
53 53 model = "HSG H702";
54 54 compatible = "hsg,h702", "allwinner,sun5i-a13";
55 55  
  56 + aliases {
  57 + serial0 = &uart1;
  58 + };
  59 +
56 60 soc@01c00000 {
57 61 mmc0: mmc@01c0f000 {
58 62 pinctrl-names = "default";
arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
... ... @@ -54,6 +54,10 @@
54 54 model = "Olimex A13-Olinuxino Micro";
55 55 compatible = "olimex,a13-olinuxino-micro", "allwinner,sun5i-a13";
56 56  
  57 + aliases {
  58 + serial0 = &uart1;
  59 + };
  60 +
57 61 soc@01c00000 {
58 62 mmc0: mmc@01c0f000 {
59 63 pinctrl-names = "default";
arch/arm/boot/dts/sun5i-a13-olinuxino.dts
... ... @@ -55,6 +55,10 @@
55 55 model = "Olimex A13-Olinuxino";
56 56 compatible = "olimex,a13-olinuxino", "allwinner,sun5i-a13";
57 57  
  58 + aliases {
  59 + serial0 = &uart1;
  60 + };
  61 +
58 62 soc@01c00000 {
59 63 mmc0: mmc@01c0f000 {
60 64 pinctrl-names = "default";
arch/arm/boot/dts/sun5i-a13.dtsi
... ... @@ -16,11 +16,6 @@
16 16 / {
17 17 interrupt-parent = <&intc>;
18 18  
19   - aliases {
20   - serial0 = &uart1;
21   - serial1 = &uart3;
22   - };
23   -
24 19 cpus {
25 20 #address-cells = <1>;
26 21 #size-cells = <0>;
... ... @@ -349,8 +344,8 @@
349 344 reg-names = "phy_ctrl", "pmu1";
350 345 clocks = <&usb_clk 8>;
351 346 clock-names = "usb_phy";
352   - resets = <&usb_clk 1>;
353   - reset-names = "usb1_reset";
  347 + resets = <&usb_clk 0>, <&usb_clk 1>;
  348 + reset-names = "usb0_reset", "usb1_reset";
354 349 status = "disabled";
355 350 };
356 351  
arch/arm/boot/dts/sun6i-a31.dtsi
... ... @@ -53,12 +53,6 @@
53 53 interrupt-parent = <&gic>;
54 54  
55 55 aliases {
56   - serial0 = &uart0;
57   - serial1 = &uart1;
58   - serial2 = &uart2;
59   - serial3 = &uart3;
60   - serial4 = &uart4;
61   - serial5 = &uart5;
62 56 ethernet0 = &gmac;
63 57 };
64 58  
arch/arm/boot/dts/sun7i-a20-bananapi.dts
... ... @@ -55,6 +55,12 @@
55 55 model = "LeMaker Banana Pi";
56 56 compatible = "lemaker,bananapi", "allwinner,sun7i-a20";
57 57  
  58 + aliases {
  59 + serial0 = &uart0;
  60 + serial1 = &uart3;
  61 + serial2 = &uart7;
  62 + };
  63 +
58 64 soc@01c00000 {
59 65 spi0: spi@01c05000 {
60 66 pinctrl-names = "default";
arch/arm/boot/dts/sun7i-a20-hummingbird.dts
... ... @@ -19,6 +19,14 @@
19 19 model = "Merrii A20 Hummingbird";
20 20 compatible = "merrii,a20-hummingbird", "allwinner,sun7i-a20";
21 21  
  22 + aliases {
  23 + serial0 = &uart0;
  24 + serial1 = &uart2;
  25 + serial2 = &uart3;
  26 + serial3 = &uart4;
  27 + serial4 = &uart5;
  28 + };
  29 +
22 30 soc@01c00000 {
23 31 mmc0: mmc@01c0f000 {
24 32 pinctrl-names = "default";
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
... ... @@ -20,6 +20,9 @@
20 20 compatible = "olimex,a20-olinuxino-micro", "allwinner,sun7i-a20";
21 21  
22 22 aliases {
  23 + serial0 = &uart0;
  24 + serial1 = &uart6;
  25 + serial2 = &uart7;
23 26 spi0 = &spi1;
24 27 spi1 = &spi2;
25 28 };
arch/arm/boot/dts/sun7i-a20.dtsi
... ... @@ -54,14 +54,6 @@
54 54  
55 55 aliases {
56 56 ethernet0 = &gmac;
57   - serial0 = &uart0;
58   - serial1 = &uart1;
59   - serial2 = &uart2;
60   - serial3 = &uart3;
61   - serial4 = &uart4;
62   - serial5 = &uart5;
63   - serial6 = &uart6;
64   - serial7 = &uart7;
65 57 };
66 58  
67 59 chosen {
arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
... ... @@ -55,6 +55,10 @@
55 55 model = "Ippo Q8H Dual Core Tablet (v5)";
56 56 compatible = "ippo,q8h-v5", "allwinner,sun8i-a23";
57 57  
  58 + aliases {
  59 + serial0 = &r_uart;
  60 + };
  61 +
58 62 chosen {
59 63 bootargs = "earlyprintk console=ttyS0,115200";
60 64 };
arch/arm/boot/dts/sun8i-a23.dtsi
... ... @@ -52,15 +52,6 @@
52 52 / {
53 53 interrupt-parent = <&gic>;
54 54  
55   - aliases {
56   - serial0 = &uart0;
57   - serial1 = &uart1;
58   - serial2 = &uart2;
59   - serial3 = &uart3;
60   - serial4 = &uart4;
61   - serial5 = &r_uart;
62   - };
63   -
64 55 cpus {
65 56 #address-cells = <1>;
66 57 #size-cells = <0>;
arch/arm/boot/dts/sun9i-a80-optimus.dts
... ... @@ -54,6 +54,11 @@
54 54 model = "Merrii A80 Optimus Board";
55 55 compatible = "merrii,a80-optimus", "allwinner,sun9i-a80";
56 56  
  57 + aliases {
  58 + serial0 = &uart0;
  59 + serial1 = &uart4;
  60 + };
  61 +
57 62 chosen {
58 63 bootargs = "earlyprintk console=ttyS0,115200";
59 64 };
arch/arm/boot/dts/sun9i-a80.dtsi
... ... @@ -52,16 +52,6 @@
52 52 / {
53 53 interrupt-parent = <&gic>;
54 54  
55   - aliases {
56   - serial0 = &uart0;
57   - serial1 = &uart1;
58   - serial2 = &uart2;
59   - serial3 = &uart3;
60   - serial4 = &uart4;
61   - serial5 = &uart5;
62   - serial6 = &r_uart;
63   - };
64   -
65 55 cpus {
66 56 #address-cells = <1>;
67 57 #size-cells = <0>;
arch/arm/mach-mvebu/coherency.c
... ... @@ -190,6 +190,13 @@
190 190 arch_ioremap_caller = armada_pcie_wa_ioremap_caller;
191 191  
192 192 /*
  193 + * We should switch the PL310 to I/O coherency mode only if
  194 + * I/O coherency is actually enabled.
  195 + */
  196 + if (!coherency_available())
  197 + return;
  198 +
  199 + /*
193 200 * Add the PL310 property "arm,io-coherent". This makes sure the
194 201 * outer sync operation is not used, which allows to
195 202 * workaround the system erratum that causes deadlocks when
arch/arm/mach-shmobile/board-ape6evm.c
... ... @@ -18,6 +18,8 @@
18 18 #include <linux/gpio_keys.h>
19 19 #include <linux/input.h>
20 20 #include <linux/interrupt.h>
  21 +#include <linux/irqchip.h>
  22 +#include <linux/irqchip/arm-gic.h>
21 23 #include <linux/kernel.h>
22 24 #include <linux/mfd/tmio.h>
23 25 #include <linux/mmc/host.h>
... ... @@ -273,6 +275,22 @@
273 275 sizeof(ape6evm_leds_pdata));
274 276 }
275 277  
  278 +static void __init ape6evm_legacy_init_time(void)
  279 +{
  280 + /* Do not invoke DT-based timers via clocksource_of_init() */
  281 +}
  282 +
  283 +static void __init ape6evm_legacy_init_irq(void)
  284 +{
  285 + void __iomem *gic_dist_base = ioremap_nocache(0xf1001000, 0x1000);
  286 + void __iomem *gic_cpu_base = ioremap_nocache(0xf1002000, 0x1000);
  287 +
  288 + gic_init(0, 29, gic_dist_base, gic_cpu_base);
  289 +
  290 + /* Do not invoke DT-based interrupt code via irqchip_init() */
  291 +}
  292 +
  293 +
276 294 static const char *ape6evm_boards_compat_dt[] __initdata = {
277 295 "renesas,ape6evm",
278 296 NULL,
279 297  
... ... @@ -280,8 +298,10 @@
280 298  
281 299 DT_MACHINE_START(APE6EVM_DT, "ape6evm")
282 300 .init_early = shmobile_init_delay,
  301 + .init_irq = ape6evm_legacy_init_irq,
283 302 .init_machine = ape6evm_add_standard_devices,
284 303 .init_late = shmobile_init_late,
285 304 .dt_compat = ape6evm_boards_compat_dt,
  305 + .init_time = ape6evm_legacy_init_time,
286 306 MACHINE_END
arch/arm/mach-shmobile/board-lager.c
... ... @@ -21,6 +21,8 @@
21 21 #include <linux/input.h>
22 22 #include <linux/interrupt.h>
23 23 #include <linux/irq.h>
  24 +#include <linux/irqchip.h>
  25 +#include <linux/irqchip/arm-gic.h>
24 26 #include <linux/kernel.h>
25 27 #include <linux/leds.h>
26 28 #include <linux/mfd/tmio.h>
... ... @@ -811,6 +813,16 @@
811 813 lager_ksz8041_fixup);
812 814 }
813 815  
  816 +static void __init lager_legacy_init_irq(void)
  817 +{
  818 + void __iomem *gic_dist_base = ioremap_nocache(0xf1001000, 0x1000);
  819 + void __iomem *gic_cpu_base = ioremap_nocache(0xf1002000, 0x1000);
  820 +
  821 + gic_init(0, 29, gic_dist_base, gic_cpu_base);
  822 +
  823 + /* Do not invoke DT-based interrupt code via irqchip_init() */
  824 +}
  825 +
814 826 static const char * const lager_boards_compat_dt[] __initconst = {
815 827 "renesas,lager",
816 828 NULL,
... ... @@ -819,6 +831,7 @@
819 831 DT_MACHINE_START(LAGER_DT, "lager")
820 832 .smp = smp_ops(r8a7790_smp_ops),
821 833 .init_early = shmobile_init_delay,
  834 + .init_irq = lager_legacy_init_irq,
822 835 .init_time = rcar_gen2_timer_init,
823 836 .init_machine = lager_init,
824 837 .init_late = shmobile_init_late,
arch/arm/mach-shmobile/setup-rcar-gen2.c
... ... @@ -133,7 +133,9 @@
133 133 #ifdef CONFIG_COMMON_CLK
134 134 rcar_gen2_clocks_init(mode);
135 135 #endif
  136 +#ifdef CONFIG_ARCH_SHMOBILE_MULTI
136 137 clocksource_of_init();
  138 +#endif
137 139 }
138 140  
139 141 struct memory_reserve_config {
arch/arm/mach-shmobile/timer.c
... ... @@ -70,6 +70,18 @@
70 70 if (!max_freq)
71 71 return;
72 72  
  73 +#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
  74 + /* Non-multiplatform r8a73a4 SoC cannot use arch timer due
  75 + * to GIC being initialized from C and arch timer via DT */
  76 + if (of_machine_is_compatible("renesas,r8a73a4"))
  77 + has_arch_timer = false;
  78 +
  79 + /* Non-multiplatform r8a7790 SoC cannot use arch timer due
  80 + * to GIC being initialized from C and arch timer via DT */
  81 + if (of_machine_is_compatible("renesas,r8a7790"))
  82 + has_arch_timer = false;
  83 +#endif
  84 +
73 85 if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) {
74 86 if (is_a7_a8_a9)
75 87 shmobile_setup_delay_hz(max_freq, 1, 3);
arch/arm/mm/dma-mapping.c
... ... @@ -1940,13 +1940,32 @@
1940 1940 }
1941 1941 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
1942 1942  
  1943 +static int __arm_iommu_attach_device(struct device *dev,
  1944 + struct dma_iommu_mapping *mapping)
  1945 +{
  1946 + int err;
  1947 +
  1948 + err = iommu_attach_device(mapping->domain, dev);
  1949 + if (err)
  1950 + return err;
  1951 +
  1952 + kref_get(&mapping->kref);
  1953 + dev->archdata.mapping = mapping;
  1954 +
  1955 + pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
  1956 + return 0;
  1957 +}
  1958 +
1943 1959 /**
1944 1960 * arm_iommu_attach_device
1945 1961 * @dev: valid struct device pointer
1946 1962 * @mapping: io address space mapping structure (returned from
1947 1963 * arm_iommu_create_mapping)
1948 1964 *
1949   - * Attaches specified io address space mapping to the provided device,
  1965 + * Attaches specified io address space mapping to the provided device.
  1966 + * This replaces the dma operations (dma_map_ops pointer) with the
  1967 + * IOMMU aware version.
  1968 + *
1950 1969 * More than one client might be attached to the same io address space
1951 1970 * mapping.
1952 1971 */
1953 1972  
1954 1973  
... ... @@ -1955,25 +1974,16 @@
1955 1974 {
1956 1975 int err;
1957 1976  
1958   - err = iommu_attach_device(mapping->domain, dev);
  1977 + err = __arm_iommu_attach_device(dev, mapping);
1959 1978 if (err)
1960 1979 return err;
1961 1980  
1962   - kref_get(&mapping->kref);
1963   - dev->archdata.mapping = mapping;
1964   -
1965   - pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
  1981 + set_dma_ops(dev, &iommu_ops);
1966 1982 return 0;
1967 1983 }
1968 1984 EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
1969 1985  
1970   -/**
1971   - * arm_iommu_detach_device
1972   - * @dev: valid struct device pointer
1973   - *
1974   - * Detaches the provided device from a previously attached map.
1975   - */
1976   -void arm_iommu_detach_device(struct device *dev)
  1986 +static void __arm_iommu_detach_device(struct device *dev)
1977 1987 {
1978 1988 struct dma_iommu_mapping *mapping;
1979 1989  
... ... @@ -1989,6 +1999,19 @@
1989 1999  
1990 2000 pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
1991 2001 }
  2002 +
  2003 +/**
  2004 + * arm_iommu_detach_device
  2005 + * @dev: valid struct device pointer
  2006 + *
  2007 + * Detaches the provided device from a previously attached map.
  2008 + * This voids the dma operations (dma_map_ops pointer)
  2009 + */
  2010 +void arm_iommu_detach_device(struct device *dev)
  2011 +{
  2012 + __arm_iommu_detach_device(dev);
  2013 + set_dma_ops(dev, NULL);
  2014 +}
1992 2015 EXPORT_SYMBOL_GPL(arm_iommu_detach_device);
1993 2016  
1994 2017 static struct dma_map_ops *arm_get_iommu_dma_map_ops(bool coherent)
... ... @@ -2011,7 +2034,7 @@
2011 2034 return false;
2012 2035 }
2013 2036  
2014   - if (arm_iommu_attach_device(dev, mapping)) {
  2037 + if (__arm_iommu_attach_device(dev, mapping)) {
2015 2038 pr_warn("Failed to attached device %s to IOMMU_mapping\n",
2016 2039 dev_name(dev));
2017 2040 arm_iommu_release_mapping(mapping);
... ... @@ -2025,7 +2048,7 @@
2025 2048 {
2026 2049 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
2027 2050  
2028   - arm_iommu_detach_device(dev);
  2051 + __arm_iommu_detach_device(dev);
2029 2052 arm_iommu_release_mapping(mapping);
2030 2053 }
2031 2054