Eric Lee / smarc-ti-linux-kernel

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Commit fd9720e96e856160f94907db06b707841cbafb0d

Authored by Markos Chandras
Committed by Ralf Baechle
1 parent 6d5155c2a6
Exists in master and in 13 other branches dlt-processor-sdk-linux-03.00.00.04, processor-sdk-linux-02.00.01, smarc-ti-linux-3.15.y, smarc-ti-lsk-linux-4.1.y, smarct3x-processor-sdk-04.01.00.06, smarct3x-processor-sdk-linux-02.00.01, smarct3x-processor-sdk-linux-03.00.00.04, smarct4x-800-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-04.01.00.06, smarct4x-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-linux-03.00.00.04, ti-linux-3.15.y, ti-lsk-linux-4.1.y

MIPS: lib: memset: Add EVA support for the __bzero function. 

Build the __bzero function using the EVA load/store instructions
when operating in the EVA mode. This function is only used when
accessing user code so there is no need to build two distinct symbols
for user and kernel operations respectively.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>

Showing 1 changed file with 23 additions and 4 deletions Side-by-side Diff

arch/mips/lib/memset.S
Diff comments   View file @ fd9720e
... ... @@ -37,13 +37,24 @@
37 37 #define LEGACY_MODE 1
38 38 #define EVA_MODE 2
39 39  
  40 +/*
  41 + * No need to protect it with EVA #ifdefery. The generated block of code
  42 + * will never be assembled if EVA is not enabled.
  43 + */
  44 +#define __EVAFY(insn, reg, addr) __BUILD_EVA_INSN(insn##e, reg, addr)
  45 +#define ___BUILD_EVA_INSN(insn, reg, addr) __EVAFY(insn, reg, addr)
  46 +
40 47 #define EX(insn,reg,addr,handler) \
41   -9: insn reg, addr; \
  48 + .if \mode == LEGACY_MODE; \
  49 +9: insn reg, addr; \
  50 + .else; \
  51 +9: ___BUILD_EVA_INSN(insn, reg, addr); \
  52 + .endif; \
42 53 .section __ex_table,"a"; \
43 54 PTR 9b, handler; \
44 55 .previous
45 56  
46   - .macro f_fill64 dst, offset, val, fixup
  57 + .macro f_fill64 dst, offset, val, fixup, mode
47 58 EX(LONG_S, \val, (\offset + 0 * STORSIZE)(\dst), \fixup)
48 59 EX(LONG_S, \val, (\offset + 1 * STORSIZE)(\dst), \fixup)
49 60 EX(LONG_S, \val, (\offset + 2 * STORSIZE)(\dst), \fixup)
... ... @@ -119,7 +130,7 @@
119 130 .set reorder
120 131 1: PTR_ADDIU a0, 64
121 132 R10KCBARRIER(0(ra))
122   - f_fill64 a0, -64, FILL64RG, .Lfwd_fixup\@
  133 + f_fill64 a0, -64, FILL64RG, .Lfwd_fixup\@, \mode
123 134 bne t1, a0, 1b
124 135 .set noreorder
125 136  
... ... @@ -144,7 +155,7 @@
144 155 .set noreorder
145 156 .set nomacro
146 157 /* ... but first do longs ... */
147   - f_fill64 a0, -64, FILL64RG, .Lpartial_fixup\@
  158 + f_fill64 a0, -64, FILL64RG, .Lpartial_fixup\@, \mode
148 159 2: .set pop
149 160 andi a2, STORMASK /* At most one long to go */
150 161  
151 162  
152 163  
... ... @@ -225,6 +236,14 @@
225 236 #endif
226 237 or a1, t1
227 238 1:
  239 +#ifndef CONFIG_EVA
228 240 FEXPORT(__bzero)
  241 +#endif
229 242 __BUILD_BZERO LEGACY_MODE
  243 +
  244 +#ifdef CONFIG_EVA
  245 +LEAF(__bzero)
  246 + __BUILD_BZERO EVA_MODE
  247 +END(__bzero)
  248 +#endif