Commit ffd06e9cec49908322d7f4910b40832d0174b0c9

Authored by Suman Anna
1 parent d07823978c

ARM: OMAP2+: Add workaround for DRA7 DSP MStandby errata i879

Errata Title:
i879: DSP MStandby requires CD_EMU in SW_WKUP

Description:
The DSP requires the internal emulation clock to be actively toggling
in order to successfully enter a low power mode via execution of the
IDLE instruction and PRCM MStandby/Idle handshake. This assumes that
other prerequisites and software sequence are followed.

Workaround:
The emulation clock to the DSP is free-running anytime CCS is connected
via JTAG debugger to the DSP subsystem or when the CD_EMU clock domain
is set in SW_WKUP mode. The CD_EMU domain can be set in SW_WKUP mode
via the CM_EMU_CLKSTCTRL [1:0]CLKTRCTRL field.

Implementation:
This patch implements this workaround by denying the HW_AUTO mode
for the EMU clockdomain during the power-up of any DSP processor
and re-enabling the HW_AUTO mode during the shutdown of the last
DSP processor (actually done during the enabling and disabling of
the respective DSP MDMA MMUs). Reference counting has to be used to
manage the independent sequencing between the multiple DSP processors.

This switching is done at runtime rather than a static clockdomain
flags value to meet the target power domain state for the EMU power
domain during suspend.

Signed-off-by: Suman Anna <s-anna@ti.com>

Showing 1 changed file with 40 additions and 3 deletions Side-by-side Diff

arch/arm/mach-omap2/omap-iommu.c
... ... @@ -19,14 +19,43 @@
19 19 #include "soc.h"
20 20 #include "omap_hwmod.h"
21 21 #include "omap_device.h"
  22 +#include "clockdomain.h"
22 23 #include "powerdomain.h"
23 24  
  25 +static void omap_iommu_dra7_emu_swsup_config(struct platform_device *pdev,
  26 + bool enable)
  27 +{
  28 + static struct clockdomain *emu_clkdm;
  29 + static DEFINE_MUTEX(emu_lock);
  30 + static atomic_t count;
  31 + struct device_node *np = pdev->dev.of_node;
  32 +
  33 + if (!of_device_is_compatible(np, "ti,dra7-dsp-iommu"))
  34 + return;
  35 +
  36 + if (!emu_clkdm) {
  37 + emu_clkdm = clkdm_lookup("emu_clkdm");
  38 + if (WARN_ON_ONCE(!emu_clkdm))
  39 + return;
  40 + }
  41 +
  42 + mutex_lock(&emu_lock);
  43 +
  44 + if (enable && (atomic_inc_return(&count) == 1))
  45 + clkdm_deny_idle(emu_clkdm);
  46 + else if (!enable && (atomic_dec_return(&count) == 0))
  47 + clkdm_allow_idle(emu_clkdm);
  48 +
  49 + mutex_unlock(&emu_lock);
  50 +}
  51 +
24 52 int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request,
25 53 u8 *pwrst)
26 54 {
27 55 struct powerdomain *pwrdm;
28 56 struct omap_device *od;
29 57 u8 next_pwrst;
  58 + int ret = 0;
30 59  
31 60 od = to_omap_device(pdev);
32 61 if (!od)
33 62  
34 63  
35 64  
... ... @@ -39,15 +68,23 @@
39 68 if (!pwrdm)
40 69 return -EINVAL;
41 70  
42   - if (request)
  71 + if (request) {
43 72 *pwrst = pwrdm_read_next_pwrst(pwrdm);
  73 + omap_iommu_dra7_emu_swsup_config(pdev, true);
  74 + }
44 75  
45 76 if (*pwrst > PWRDM_POWER_RET)
46   - return 0;
  77 + goto out;
47 78  
48 79 next_pwrst = request ? PWRDM_POWER_ON : *pwrst;
49 80  
50   - return pwrdm_set_next_pwrst(pwrdm, next_pwrst);
  81 + ret = pwrdm_set_next_pwrst(pwrdm, next_pwrst);
  82 +
  83 +out:
  84 + if (!request)
  85 + omap_iommu_dra7_emu_swsup_config(pdev, false);
  86 +
  87 + return ret;
51 88 }
52 89  
53 90 static int __init omap_iommu_dev_init(struct omap_hwmod *oh, void *unused)