Eric Lee / smarc-ti-linux-kernel

17 Nov, 2014

1 commit

  • c1aefbdd0   spi: Fix mapping from vmalloc-ed buffer to scatter list ... Browse Code »

    We can only use page_address on memory that has been mapped using kmap,
    when the buffer passed to the SPI has been allocated by vmalloc the page
    has not necessarily been mapped through kmap. This means sometimes
    page_address will return NULL causing the pointer we pass to sg_set_buf
    to be invalid.

    As we only call page_address so that we can pass a virtual address to
    sg_set_buf which will then immediately call virt_to_page on it, fix this
    by calling sg_set_page directly rather then relying on the sg_set_buf
    helper.

    Signed-off-by: Charles Keepax
    Signed-off-by: Mark Brown
    Cc: stable@vger.kernel.org

    Charles Keepax
     

10 Oct, 2014

1 commit

  • b52839266   Merge tag 'pm+acpi-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm ... Browse Code »

    Pull ACPI and power management updates from Rafael Wysocki:
    "Features-wise, to me the most important this time is a rework of
    wakeup interrupts handling in the core that makes them work
    consistently across all of the available sleep states, including
    suspend-to-idle. Many thanks to Thomas Gleixner for his help with
    this work.

    Second is an update of the generic PM domains code that has been in
    need of some care for quite a while. Unused code is being removed, DT
    support is being added and domains are now going to be attached to
    devices in bus type code in analogy with the ACPI PM domain. The
    majority of work here was done by Ulf Hansson who also has been the
    most active developer this time.

    Apart from this we have a traditional ACPICA update, this time to
    upstream version 20140828 and a few ACPI wakeup interrupts handling
    patches on top of the general rework mentioned above. There also are
    several cpufreq commits including renaming the cpufreq-cpu0 driver to
    cpufreq-dt, as this is what implements generic DT-based cpufreq
    support, and a new DT-based idle states infrastructure for cpuidle.

    In addition to that, the ACPI LPSS driver is updated, ACPI support for
    Apple machines is improved, a few bugs are fixed and a few cleanups
    are made all over.

    Finally, the Adaptive Voltage Scaling (AVS) subsystem now has a tree
    maintained by Kevin Hilman that will be merged through the PM tree.

    Numbers-wise, the generic PM domains update takes the lead this time
    with 32 non-merge commits, second is cpufreq (15 commits) and the 3rd
    place goes to the wakeup interrupts handling rework (13 commits).

    Specifics:

    - Rework the handling of wakeup IRQs by the IRQ core such that all of
    them will be switched over to "wakeup" mode in suspend_device_irqs()
    and in that mode the first interrupt will abort system suspend in
    progress or wake up the system if already in suspend-to-idle (or
    equivalent) without executing any interrupt handlers. Among other
    things that eliminates the wakeup-related motivation to use the
    IRQF_NO_SUSPEND interrupt flag with interrupts which don't really
    need it and should not use it (Thomas Gleixner and Rafael Wysocki)

    - Switch over ACPI to handling wakeup interrupts with the help of the
    new mechanism introduced by the above IRQ core rework (Rafael Wysocki)

    - Rework the core generic PM domains code to eliminate code that's
    not used, add DT support and add a generic mechanism by which
    devices can be added to PM domains automatically during enumeration
    (Ulf Hansson, Geert Uytterhoeven and Tomasz Figa).

    - Add debugfs-based mechanics for debugging generic PM domains
    (Maciej Matraszek).

    - ACPICA update to upstream version 20140828. Included are updates
    related to the SRAT and GTDT tables and the _PSx methods are in the
    METHOD_NAME list now (Bob Moore and Hanjun Guo).

    - Add _OSI("Darwin") support to the ACPI core (unfortunately, that
    can't really be done in a straightforward way) to prevent
    Thunderbolt from being turned off on Apple systems after boot (or
    after resume from system suspend) and rework the ACPI Smart Battery
    Subsystem (SBS) driver to work correctly with Apple platforms
    (Matthew Garrett and Andreas Noever).

    - ACPI LPSS (Low-Power Subsystem) driver update cleaning up the code,
    adding support for 133MHz I2C source clock on Intel Baytrail to it
    and making it avoid using UART RTS override with Auto Flow Control
    (Heikki Krogerus).

    - ACPI backlight updates removing the video_set_use_native_backlight
    quirk which is not necessary any more, making the code check the
    list of output devices returned by the _DOD method to avoid
    creating acpi_video interfaces that won't work and adding a quirk
    for Lenovo Ideapad Z570 (Hans de Goede, Aaron Lu and Stepan Bujnak)

    - New Win8 ACPI OSI quirks for some Dell laptops (Edward Lin)

    - Assorted ACPI code cleanups (Fabian Frederick, Rasmus Villemoes,
    Sudip Mukherjee, Yijing Wang, and Zhang Rui)

    - cpufreq core updates and cleanups (Viresh Kumar, Preeti U Murthy,
    Rasmus Villemoes)

    - cpufreq driver updates: cpufreq-cpu0/cpufreq-dt (driver name change
    among other things), ppc-corenet, powernv (Viresh Kumar, Preeti U
    Murthy, Shilpasri G Bhat, Lucas Stach)

    - cpuidle support for DT-based idle states infrastructure, new ARM64
    cpuidle driver, cpuidle core cleanups (Lorenzo Pieralisi, Rasmus
    Villemoes)

    - ARM big.LITTLE cpuidle driver updates: support for DT-based
    initialization and Exynos5800 compatible string (Lorenzo Pieralisi,
    Kevin Hilman)

    - Rework of the test_suspend kernel command line argument and a new
    trace event for console resume (Srinivas Pandruvada, Todd E Brandt)

    - Second attempt to optimize swsusp_free() (hibernation core) to make
    it avoid going through all PFNs which may be way too slow on some
    systems (Joerg Roedel)

    - devfreq updates (Paul Bolle, Punit Agrawal, Ãrjan Eide).

    - rockchip-io Adaptive Voltage Scaling (AVS) driver and AVS entry
    update in MAINTAINERS (Heiko Stübner, Kevin Hilman)

    - PM core fix related to clock management (Geert Uytterhoeven)

    - PM core's sysfs code cleanup (Johannes Berg)"

    * tag 'pm+acpi-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (105 commits)
    ACPI / fan: printk replacement
    PM / clk: Fix crash in clocks management code if !CONFIG_PM_RUNTIME
    PM / Domains: Rename cpu_data to cpuidle_data
    cpufreq: cpufreq-dt: fix potential double put of cpu OF node
    cpufreq: cpu0: rename driver and internals to 'cpufreq_dt'
    PM / hibernate: Iterate over set bits instead of PFNs in swsusp_free()
    cpufreq: ppc-corenet: remove duplicate update of cpu_data
    ACPI / sleep: Rework the handling of ACPI GPE wakeup from suspend-to-idle
    PM / sleep: Rename platform suspend/resume functions in suspend.c
    PM / sleep: Export dpm_suspend_late/noirq() and dpm_resume_early/noirq()
    ACPICA: Introduce acpi_enable_all_wakeup_gpes()
    ACPICA: Clear all non-wakeup GPEs in acpi_hw_enable_wakeup_gpe_block()
    ACPI / video: check _DOD list when creating backlight devices
    PM / Domains: Move dev_pm_domain_attach|detach() to pm_domain.h
    cpufreq: Replace strnicmp with strncasecmp
    cpufreq: powernv: Set the cpus to nominal frequency during reboot/kexec
    cpufreq: powernv: Set the pstate of the last hotplugged out cpu in policy->cpus to minimum
    cpufreq: Allow stop CPU callback to be used by all cpufreq drivers
    PM / devfreq: exynos: Enable building exynos PPMU as module
    PM / devfreq: Export helper functions for drivers
    ...

    Linus Torvalds
     

03 Oct, 2014

1 commit

30 Sep, 2014

1 commit

  • f48c767ce   PM / Domains: Move dev_pm_domain_attach|detach() to pm_domain.h ... Browse Code »
    13

    The commit 46420dd73b80 (PM / Domains: Add APIs to attach/detach a PM
    domain for a device) started using errno values in pm.h header file.
    It also failed to include the header for these, thus it caused
    compiler errors.

    Instead of including the errno header to pm.h, let's move the functions
    to pm_domain.h, since it's a better match.

    Fixes: 46420dd73b80 (PM / Domains: Add APIs to attach/detach a PM domain for a device)
    Signed-off-by: Ulf Hansson
    Acked-by: Geert Uytterhoeven
    Acked-by: Wolfram Sang
    Acked-by: Mark Brown
    Signed-off-by: Rafael J. Wysocki

    Ulf Hansson
     

24 Sep, 2014

1 commit

22 Sep, 2014

1 commit

  • 676e7c257   spi: core: Convert to dev_pm_domain_attach|detach() ... Browse Code »

    Previously only the ACPI PM domain was supported by the spi bus.

    Let's convert to the common attach/detach functions for PM domains,
    which currently means we are extending the support to include the
    generic PM domain as well.

    Signed-off-by: Ulf Hansson
    Reviewed-by: Kevin Hilman
    Reviewed-by: Dmitry Torokhov
    Signed-off-by: Rafael J. Wysocki

    Ulf Hansson
     

31 Aug, 2014

1 commit

20 Aug, 2014

1 commit

  • 38ec10f60   spi: Only call transfer_one() if we have buffers to transfer ... Browse Code »

    Client drivers such as the ChomeOS EC driver sometimes use transfers with
    no buffers and only a delay specified in order to allow a delay after the
    assertion of /CS. Rather than require controller drivers handle this noop
    case gracefully put checks in the core to ensure that we don't call into
    the controller for such transfers.

    Reported-by: Addy Ke
    Tested-by: Doug Anderson
    Reviewed-by: Doug Anderson
    Signed-off-by: Mark Brown

    Mark Brown
     

13 Aug, 2014

1 commit

06 Aug, 2014

1 commit

  • 1325b6550   Merge tag 'spi-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi ... Browse Code »

    Pull spi updates from Mark Brown:
    "A quiet release, more bug fixes than anything else. A few things do
    stand out though:

    - updates to several drivers to move towards the standard GPIO chip
    select handling in the core.
    - DMA support for the SH MSIOF driver.
    - support for Rockchip SPI controllers (their first mainline
    submission)"

    * tag 'spi-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (64 commits)
    spi: davinci: use spi_device.cs_gpio to store gpio cs per spi device
    spi: davinci: add support to configure gpio cs through dt
    spi/pl022: Explicitly truncate large bitmask
    spi/atmel: Fix pointer to int conversion warnings on 64 bit builds
    spi: davinci: fix to support more than 2 chip selects
    spi: topcliff-pch: don't hardcode PCI slot to get DMA device
    spi: orion: fix incorrect handling of cell-index DT property
    spi: orion: Fix error return code in orion_spi_probe()
    spi/rockchip: fix error return code in rockchip_spi_probe()
    spi/rockchip: remove redundant dev_err call in rockchip_spi_probe()
    spi/rockchip: remove duplicated include from spi-rockchip.c
    ARM: dts: fix the chip select gpios definition in the SPI nodes
    spi: s3c64xx: Update binding documentation
    spi: s3c64xx: use the generic SPI "cs-gpios" property
    spi: s3c64xx: Revert "spi: s3c64xx: Added provision for dedicated cs pin"
    spi: atmel: Use dmaengine_prep_slave_sg() API
    spi: topcliff-pch: Update error messages for dmaengine_prep_slave_sg() API
    spi: sh-msiof: Use correct device for DMA mapping with IOMMU
    spi: sh-msiof: Handle dmaengine_prep_slave_single() failures gracefully
    spi: rspi: Handle dmaengine_prep_slave_sg() failures gracefully
    ...

    Linus Torvalds
     

05 Aug, 2014

1 commit

26 Jul, 2014

1 commit

  • 86be408bf   clk: Support for clock parents and rates assigned from device tree ... Browse Code »
    13

    This patch adds helper functions to configure clock parents and rates
    as specified through 'assigned-clock-parents', 'assigned-clock-rates'
    DT properties for a clock provider or clock consumer device.
    The helpers are now being called by the bus code for the platform, I2C
    and SPI busses, before the driver probing and also in the clock core
    after registration of a clock provider.

    Signed-off-by: Sylwester Nawrocki
    Acked-by: Kyungmin Park
    Signed-off-by: Mike Turquette

    Sylwester Nawrocki
     

11 Jul, 2014

2 commits

21 Jun, 2014

2 commits

03 Jun, 2014

2 commits

26 May, 2014

1 commit

04 May, 2014

1 commit

  • c3676d5ce   spi: core: Don't destroy master queue if we fail to create it ... Browse Code »

    If we fail to create the master queue for some reason we should not attempt
    to clean it up since attempting to stop a kthread that was not created will
    hang and it's just generally bad practice. Unfortunately at present we call
    spi_destroy_queue() even in cases where the creation fails.

    Fix this by fixing the error handling in spi_master_initialize_queue() so
    that we only flag the master as queued or destroy the queue if creation
    succeeded. The change to the flag is done since the general master
    cleanup uses this to destroy the queue.

    Reported-by: Ricardo Ribalda Delgado
    Signed-off-by: Mark Brown
    Acked-by: Geert Uytterhoeven

    Mark Brown
     

03 May, 2014

1 commit

  • 2de440f59   spi: core: Protect DMA code by #ifdef CONFIG_HAS_DMA ... Browse Code »

    If NO_DMA=y:

    drivers/built-in.o: In function `spi_map_buf':
    spi.c:(.text+0x21bc60): undefined reference to `dma_map_sg'
    drivers/built-in.o: In function `spi_unmap_buf.isra.33':
    spi.c:(.text+0x21c32e): undefined reference to `dma_unmap_sg'
    make[3]: *** [vmlinux] Error 1

    Protect the DMA code by #ifdef CONFIG_HAS_DMA to fix this:
    - Extract __spi_map_msg() from spi_map_msg(),
    - Provide dummy definitions of __spi_map_msg() and spi_unmap_msg() if
    !CONFIG_HAS_DMA.

    Signed-off-by: Geert Uytterhoeven
    Signed-off-by: Mark Brown

    Geert Uytterhoeven
     

19 Apr, 2014

1 commit

  • 83596fbeb   spi: core: Ignore unsupported Dual/Quad Transfer Mode bits ... Browse Code »
    5

    The availability of SPI Dual or Quad Transfer Mode as indicated by the
    "spi-tx-bus-width" and "spi-rx-bus-width" properties in the device tree is
    a hardware property of the SPI master, SPI slave, and board wiring. Hence
    the SPI core should not reject an SPI slave because an SPI master driver
    doesn't (yet) support Dual or Quad Transfer Mode.

    Change the lack of Dual or Quad Transfer Mode support in the SPI master
    driver from an error condition to a warning condition, and ignore the
    unsupported mode bits, falling back to Single Transfer Mode, to avoid
    breakages when running old kernels with new device trees.

    Fixes: f477b7fb13df (spi: DUAL and QUAD support)
    Signed-off-by: Geert Uytterhoeven
    Signed-off-by: Mark Brown
    Cc: stable@vger.kernel.org

    Geert Uytterhoeven
     

15 Apr, 2014

2 commits

  • cd6339e6c   spi: add "spi-lsb-first" to devicetree ... Browse Code »

    add optional property devicetree for SPI slave nodes
    into devicetree so that LSB mode can be enabled by devicetree.

    Signed-off-by: Zhao Qiang
    Signed-off-by: Mark Brown

    Zhao Qiang
     
  • eee668a92   spi: core: Increase timeout value ... Browse Code »

    The existing timeout value in wait_for_completion_timeout is
    calculated from the transfer length and speed with tolerance of 10msec.
    This is too low because this is used for error conditions such as
    hardware hang etc.
    The xfer->speed_hz considered may not be the actual speed set
    because the best clock divisor is chosen from a limited set such that
    the actual speed
    Signed-off-by: Mark Brown

    Harini Katakam
     

30 Mar, 2014

6 commits

26 Mar, 2014

1 commit

  • 1e25cd472   spi: Do not require a completion ... Browse Code »

    There is no real reason why we require transfers to have a completion and
    the only user of the completion now checks to see if one has been provided
    before using it so stop enforcing this. This makes it more convenient for
    drivers to chain multiple asynchronous transfers together.

    Signed-off-by: Mark Brown

    Mark Brown
     

17 Mar, 2014

1 commit

04 Mar, 2014

1 commit

  • 6ea312936   spi: core: make zero length transfer valid again ... Browse Code »

    Zero length transfer becomes invalid since
    "spi: core: Validate length of the transfers in message" commit,
    but it should be valid to support an odd device, for example, which
    requires long delay between chipselect and the first transfer, etc.

    Signed-off-by: Atsushi Nemoto
    Tested-by: Thierry Reding
    Signed-off-by: Mark Brown

    Atsushi Nemoto
     

23 Feb, 2014

1 commit

22 Feb, 2014

1 commit

14 Feb, 2014

1 commit

  • aec35f4ee   spi: Clean up probe and remove functions ... Browse Code »

    While backporting 33cf00e5 ("spi: attach/detach SPI device to the ACPI
    power domain"), I noticed that the code changes were suboptimal:

    * Why use &spi->dev when we have dev at hand?

    * After fixing the above, spi is used only once, so we don't really
    need a local variable for it.

    This results in the following clean-up.

    Signed-off-by: Jean Delvare
    Acked-by: Rafael J. Wysocki
    Signed-off-by: Mark Brown

    Jean Delvare
     

13 Feb, 2014

1 commit

11 Feb, 2014

1 commit

10 Feb, 2014

1 commit

  • 052eb2d49   spi: core: Set max_speed_hz of spi_device default to max_speed_hz of controller ... Browse Code »

    In __spi_validate(), xfer->speed_hz is set to be spi->max_speed_hz if it is not
    set for this transfer. However, if spi->max_speed_hz is also not set,
    xfer->speed_hz is 0. Some drivers (e.g. au1550, tegra114, tegra20-sflash,
    tegra20-slink, etc.) then use below code to avoid setting xfer->speed_hz to 0.

    /* Set speed to the spi max fequency if spi device has not set */
    spi->max_speed_hz = spi->max_speed_hz ? : tspi->spi_max_frequency;

    Let's handle it in spi core.
    If spi->max_speed_hz is not set, make it default to spi->master->max_speed_hz.
    So In __spi_validate() if both xfer->speed_hz and spi->max_speed_hz are not set,
    xfer->speed_hz will be set to spi->master->max_speed_hz.

    Signed-off-by: Axel Lin
    Signed-off-by: Mark Brown

    Axel Lin
     

05 Feb, 2014

1 commit

  • 6ad45a27c   spi: Make core DMA mapping functions generate scatterlists ... Browse Code »

    We cannot unconditionally use dma_map_single() to map data for use with
    SPI since transfers may exceed a page and virtual addresses may not be
    provided with physically contiguous pages. Further, addresses allocated
    using vmalloc() need to be mapped differently to other addresses.

    Currently only the MXS driver handles all this, a few drivers do handle
    the possibility that buffers may not be physically contiguous which is
    the main potential problem but many don't even do that. Factoring this
    out into the core will make it easier for drivers to do a good job so if
    the driver is using the core DMA code then generate a scatterlist
    instead of mapping to a single address so do that.

    This code is mainly based on a combination of the existing code in the MXS
    and PXA2xx drivers. In future we should be able to extend it to allow the
    core to concatenate adjacent transfers if they are compatible, improving
    performance.

    Currently for simplicity clients are not allowed to use the scatterlist
    when they do DMA mapping, in the future the existing single address
    mappings will be replaced with use of the scatterlist most likely as
    part of pre-verifying transfers.

    This change makes it mandatory to use scatterlists when using the core DMA
    mapping so update the s3c64xx driver to do this when used with dmaengine.
    Doing so makes the code more ugly but it is expected that the old s3c-dma
    code can be removed very soon.

    Signed-off-by: Mark Brown

    Mark Brown