19 Apr, 2014

1 commit

  • The lkdtm module performs tests against executable memory ranges, so it
    needs to flush the icache for proper behaviors. Other architectures
    already export this, so do the same for MIPS.

    [akpm@linux-foundation.org: relocate export sites]
    Signed-off-by: Kees Cook
    Cc: Paul Gortmaker
    Cc: Ralf Baechle
    Cc: Sanjay Lal
    Cc: John Crispin
    Cc: Sergei Shtylyov
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Kees Cook
     

13 Apr, 2014

1 commit

  • Pull audit updates from Eric Paris.

    * git://git.infradead.org/users/eparis/audit: (28 commits)
    AUDIT: make audit_is_compat depend on CONFIG_AUDIT_COMPAT_GENERIC
    audit: renumber AUDIT_FEATURE_CHANGE into the 1300 range
    audit: do not cast audit_rule_data pointers pointlesly
    AUDIT: Allow login in non-init namespaces
    audit: define audit_is_compat in kernel internal header
    kernel: Use RCU_INIT_POINTER(x, NULL) in audit.c
    sched: declare pid_alive as inline
    audit: use uapi/linux/audit.h for AUDIT_ARCH declarations
    syscall_get_arch: remove useless function arguments
    audit: remove stray newline from audit_log_execve_info() audit_panic() call
    audit: remove stray newlines from audit_log_lost messages
    audit: include subject in login records
    audit: remove superfluous new- prefix in AUDIT_LOGIN messages
    audit: allow user processes to log from another PID namespace
    audit: anchor all pid references in the initial pid namespace
    audit: convert PPIDs to the inital PID namespace.
    pid: get pid_t ppid of task in init_pid_ns
    audit: rename the misleading audit_get_context() to audit_take_context()
    audit: Add generic compat syscall support
    audit: Add CONFIG_HAVE_ARCH_AUDITSYSCALL
    ...

    Linus Torvalds
     

12 Apr, 2014

1 commit

  • Pull more ACPI and power management fixes and updates from Rafael Wysocki:
    "This is PM and ACPI material that has emerged over the last two weeks
    and one fix for a CPU hotplug regression introduced by the recent CPU
    hotplug notifiers registration series.

    Included are intel_idle and turbostat updates from Len Brown (these
    have been in linux-next for quite some time), a new cpufreq driver for
    powernv (that might spend some more time in linux-next, but BenH was
    asking me so nicely to push it for 3.15 that I couldn't resist), some
    cpufreq fixes and cleanups (including fixes for some silly breakage in
    a couple of cpufreq drivers introduced during the 3.14 cycle),
    assorted ACPI cleanups, wakeup framework documentation fixes, a new
    sysfs attribute for cpuidle and a new command line argument for power
    domains diagnostics.

    Specifics:

    - Fix for a recently introduced CPU hotplug regression in ARM KVM
    from Ming Lei.

    - Fixes for breakage in the at32ap, loongson2_cpufreq, and unicore32
    cpufreq drivers introduced during the 3.14 cycle (-stable material)
    from Chen Gang and Viresh Kumar.

    - New powernv cpufreq driver from Vaidyanathan Srinivasan, with bits
    from Gautham R Shenoy and Srivatsa S Bhat.

    - Exynos cpufreq driver fix preventing it from being included into
    multiplatform builds that aren't supported by it from Sachin Kamat.

    - cpufreq cleanups related to the usage of the driver_data field in
    struct cpufreq_frequency_table from Viresh Kumar.

    - cpufreq ppc driver cleanup from Sachin Kamat.

    - Intel BayTrail support for intel_idle and ACPI idle from Len Brown.

    - Intel CPU model 54 (Atom N2000 series) support for intel_idle from
    Jan Kiszka.

    - intel_idle fix for Intel Ivy Town residency targets from Len Brown.

    - turbostat updates (Intel Broadwell support and output cleanups)
    from Len Brown.

    - New cpuidle sysfs attribute for exporting C-states' target
    residency information to user space from Daniel Lezcano.

    - New kernel command line argument to prevent power domains enabled
    by the bootloader from being turned off even if they are not in use
    (for diagnostics purposes) from Tushar Behera.

    - Fixes for wakeup sysfs attributes documentation from Geert
    Uytterhoeven.

    - New ACPI video blacklist entry for ThinkPad Helix from Stephen
    Chandler Paul.

    - Assorted ACPI cleanups and a Kconfig help update from Jonghwan
    Choi, Zhihui Zhang, Hanjun Guo"

    * tag 'pm+acpi-3.15-rc1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (28 commits)
    ACPI: Update the ACPI spec information in Kconfig
    arm, kvm: fix double lock on cpu_add_remove_lock
    cpuidle: sysfs: Export target residency information
    cpufreq: ppc: Remove duplicate inclusion of fsl_soc.h
    cpufreq: create another field .flags in cpufreq_frequency_table
    cpufreq: use kzalloc() to allocate memory for cpufreq_frequency_table
    cpufreq: don't print value of .driver_data from core
    cpufreq: ia64: don't set .driver_data to index
    cpufreq: powernv: Select CPUFreq related Kconfig options for powernv
    cpufreq: powernv: Use cpufreq_frequency_table.driver_data to store pstate ids
    cpufreq: powernv: cpufreq driver for powernv platform
    cpufreq: at32ap: don't declare local variable as static
    cpufreq: loongson2_cpufreq: don't declare local variable as static
    cpufreq: unicore32: fix typo issue for 'clk'
    cpufreq: exynos: Disable on multiplatform build
    PM / wakeup: Correct presence vs. emptiness of wakeup_* attributes
    PM / domains: Add pd_ignore_unused to keep power domains enabled
    ACPI / dock: Drop dock_device_ids[] table
    ACPI / video: Favor native backlight interface for ThinkPad Helix
    ACPI / thermal: Fix wrong variable usage in debug statement
    ...

    Linus Torvalds
     

08 Apr, 2014

2 commits

  • * pm-cpufreq:
    cpufreq: ppc: Remove duplicate inclusion of fsl_soc.h
    cpufreq: create another field .flags in cpufreq_frequency_table
    cpufreq: use kzalloc() to allocate memory for cpufreq_frequency_table
    cpufreq: don't print value of .driver_data from core
    cpufreq: ia64: don't set .driver_data to index
    cpufreq: powernv: Select CPUFreq related Kconfig options for powernv
    cpufreq: powernv: Use cpufreq_frequency_table.driver_data to store pstate ids
    cpufreq: powernv: cpufreq driver for powernv platform
    cpufreq: at32ap: don't declare local variable as static
    cpufreq: loongson2_cpufreq: don't declare local variable as static
    cpufreq: unicore32: fix typo issue for 'clk'
    cpufreq: exynos: Disable on multiplatform build

    Rafael J. Wysocki
     
  • If the renamed symbol is defined lib/iomap.c implements ioport_map and
    ioport_unmap and currently (nearly) all platforms define the port
    accessor functions outb/inb and friend unconditionally. So
    HAS_IOPORT_MAP is the better name for this.

    Consequently NO_IOPORT is renamed to NO_IOPORT_MAP.

    The motivation for this change is to reintroduce a symbol HAS_IOPORT
    that signals if outb/int et al are available. I will address that at
    least one merge window later though to keep surprises to a minimum and
    catch new introductions of (HAS|NO)_IOPORT.

    The changes in this commit were done using:

    $ git grep -l -E '(NO|HAS)_IOPORT' | xargs perl -p -i -e 's/\b((?:CONFIG_)?(?:NO|HAS)_IOPORT)\b/$1_MAP/'

    Signed-off-by: Uwe Kleine-König
    Acked-by: Arnd Bergmann
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Uwe Kleine-König
     

07 Apr, 2014

1 commit

  • Currently cpufreq frequency table has two fields: frequency and driver_data.
    driver_data is only for drivers' internal use and cpufreq core shouldn't use
    it at all. But with the introduction of BOOST frequencies, this assumption
    was broken and we started using it as a flag instead.

    There are two problems due to this:
    - It is against the description of this field, as driver's data is used by
    the core now.
    - if drivers fill it with -3 for any frequency, then those frequencies are
    never considered by cpufreq core as it is exactly same as value of
    CPUFREQ_BOOST_FREQ, i.e. ~2.

    The best way to get this fixed is by creating another field flags which
    will be used for such flags. This patch does that. Along with that various
    drivers need modifications due to the change of struct cpufreq_frequency_table.

    Reviewed-by: Gautham R Shenoy
    Signed-off-by: Viresh Kumar
    Signed-off-by: Rafael J. Wysocki

    Viresh Kumar
     

04 Apr, 2014

1 commit

  • Pull tracing updates from Steven Rostedt:
    "Most of the changes were largely clean ups, and some documentation.
    But there were a few features that were added:

    Uprobes now work with event triggers and multi buffers and have
    support under ftrace and perf.

    The big feature is that the function tracer can now be used within the
    multi buffer instances. That is, you can now trace some functions in
    one buffer, others in another buffer, all functions in a third buffer
    and so on. They are basically agnostic from each other. This only
    works for the function tracer and not for the function graph trace,
    although you can have the function graph tracer running in the top
    level buffer (or any tracer for that matter) and have different
    function tracing going on in the sub buffers"

    * tag 'trace-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace: (45 commits)
    tracing: Add BUG_ON when stack end location is over written
    tracepoint: Remove unused API functions
    Revert "tracing: Move event storage for array from macro to standalone function"
    ftrace: Constify ftrace_text_reserved
    tracepoints: API doc update to tracepoint_probe_register() return value
    tracepoints: API doc update to data argument
    ftrace: Fix compilation warning about control_ops_free
    ftrace/x86: BUG when ftrace recovery fails
    ftrace: Warn on error when modifying ftrace function
    ftrace: Remove freelist from struct dyn_ftrace
    ftrace: Do not pass data to ftrace_dyn_arch_init
    ftrace: Pass retval through return in ftrace_dyn_arch_init()
    ftrace: Inline the code from ftrace_dyn_table_alloc()
    ftrace: Cleanup of global variables ftrace_new_pgs and ftrace_update_cnt
    tracing: Evaluate len expression only once in __dynamic_array macro
    tracing: Correctly expand len expressions from __dynamic_array macro
    tracing/module: Replace include of tracepoint.h with jump_label.h in module.h
    tracing: Fix event header migrate.h to include tracepoint.h
    tracing: Fix event header writeback.h to include tracepoint.h
    tracing: Warn if a tracepoint is not set via debugfs
    ...

    Linus Torvalds
     

03 Apr, 2014

2 commits

  • Pull kvm updates from Paolo Bonzini:
    "PPC and ARM do not have much going on this time. Most of the cool
    stuff, instead, is in s390 and (after a few releases) x86.

    ARM has some caching fixes and PPC has transactional memory support in
    guests. MIPS has some fixes, with more probably coming in 3.16 as
    QEMU will soon get support for MIPS KVM.

    For x86 there are optimizations for debug registers, which trigger on
    some Windows games, and other important fixes for Windows guests. We
    now expose to the guest Broadwell instruction set extensions and also
    Intel MPX. There's also a fix/workaround for OS X guests, nested
    virtualization features (preemption timer), and a couple kvmclock
    refinements.

    For s390, the main news is asynchronous page faults, together with
    improvements to IRQs (floating irqs and adapter irqs) that speed up
    virtio devices"

    * tag 'kvm-3.15-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (96 commits)
    KVM: PPC: Book3S HV: Save/restore host PMU registers that are new in POWER8
    KVM: PPC: Book3S HV: Fix decrementer timeouts with non-zero TB offset
    KVM: PPC: Book3S HV: Don't use kvm_memslots() in real mode
    KVM: PPC: Book3S HV: Return ENODEV error rather than EIO
    KVM: PPC: Book3S: Trim top 4 bits of physical address in RTAS code
    KVM: PPC: Book3S HV: Add get/set_one_reg for new TM state
    KVM: PPC: Book3S HV: Add transactional memory support
    KVM: Specify byte order for KVM_EXIT_MMIO
    KVM: vmx: fix MPX detection
    KVM: PPC: Book3S HV: Fix KVM hang with CONFIG_KVM_XICS=n
    KVM: PPC: Book3S: Introduce hypervisor call H_GET_TCE
    KVM: PPC: Book3S HV: Fix incorrect userspace exit on ioeventfd write
    KVM: s390: clear local interrupts at cpu initial reset
    KVM: s390: Fix possible memory leak in SIGP functions
    KVM: s390: fix calculation of idle_mask array size
    KVM: s390: randomize sca address
    KVM: ioapic: reinject pending interrupts on KVM_SET_IRQCHIP
    KVM: Bump KVM_MAX_IRQ_ROUTES for s390
    KVM: s390: irq routing for adapter interrupts.
    KVM: s390: adapter interrupt sources
    ...

    Linus Torvalds
     
  • Pull MIPS updates from Ralf Baechle:
    - Support for Imgtec's Aptiv family of MIPS cores.
    - Improved detection of BCM47xx configurations.
    - Fix hiberation for certain configurations.
    - Add support for the Chinese Loongson 3 CPU, a MIPS64 R2 core and
    systems.
    - Detection and support for the MIPS P5600 core.
    - A few more random fixes that didn't make 3.14.
    - Support for the EVA Extended Virtual Addressing
    - Switch Alchemy to the platform PATA driver
    - Complete unification of Alchemy support
    - Allow availability of I/O cache coherency to be runtime detected
    - Improvments to multiprocessing support for Imgtec platforms
    - A few microoptimizations
    - Cleanups of FPU support
    - Paul Gortmaker's fixes for the init stuff
    - Support for seccomp

    * 'mips-for-linux-next' of git://git.linux-mips.org/pub/scm/ralf/upstream-sfr: (165 commits)
    MIPS: CPC: Use __raw_ memory access functions
    MIPS: CM: use __raw_ memory access functions
    MIPS: Fix warning when including smp-ops.h with CONFIG_SMP=n
    MIPS: Malta: GIC IPIs may be used without MT
    MIPS: smp-mt: Use common GIC IPI implementation
    MIPS: smp-cmp: Remove incorrect core number probe
    MIPS: Fix gigaton of warning building with microMIPS.
    MIPS: Fix core number detection for MT cores
    MIPS: MT: core_nvpes function to retrieve VPE count
    MIPS: Provide empty mips_mt_set_cpuoptions when CONFIG_MIPS_MT=n
    MIPS: Lasat: Replace del_timer by del_timer_sync
    MIPS: Malta: Setup PM I/O region on boot
    MIPS: Loongson: Add a Loongson-3 default config file
    MIPS: Loongson 3: Add CPU hotplug support
    MIPS: Loongson 3: Add Loongson-3 SMP support
    MIPS: Loongson: Add Loongson-3 Kconfig options
    MIPS: Loongson: Add swiotlb to support All-Memory DMA
    MIPS: Loongson 3: Add serial port support
    MIPS: Loongson 3: Add IRQ init and dispatch support
    MIPS: Loongson 3: Add HT-linked PCI support
    ...

    Linus Torvalds
     

02 Apr, 2014

2 commits

  • Pull USB patches from Greg KH:
    "Here's the big USB pull request for 3.15-rc1.

    The normal set of patches, lots of controller driver updates, and a
    smattering of individual USB driver updates as well.

    All have been in linux-next for a while"

    * tag 'usb-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (249 commits)
    xhci: Transition maintainership to Mathias Nyman.
    USB: disable reset-resume when USB_QUIRK_RESET is set
    USB: unbind all interfaces before rebinding any
    usb: phy: Add ulpi IDs for SMSC USB3320 and TI TUSB1210
    usb: gadget: tcm_usb_gadget: stop format strings
    usb: gadget: f_fs: add missing spinlock and mutex unlock
    usb: gadget: composite: switch over to ERR_CAST()
    usb: gadget: inode: switch over to memdup_user()
    usb: gadget: f_subset: switch over to PTR_RET
    usb: gadget: lpc32xx_udc: fix wrong clk_put() sequence
    USB: keyspan: remove dead debugging code
    USB: serial: add missing newlines to dev_ messages.
    USB: serial: add missing braces
    USB: serial: continue to write on errors
    USB: serial: continue to read on errors
    USB: serial: make bulk_out_size a lower limit
    USB: cypress_m8: fix potential scheduling while atomic
    devicetree: bindings: document lsi,zevio-usb
    usb: chipidea: add support for USB OTG controller on LSI Zevio SoCs
    usb: chipidea: imx: Use dev_name() for ci_hdrc name to distinguish USBs
    ...

    Linus Torvalds
     
  • Pull irq code updates from Thomas Gleixner:
    "The irq department proudly presents:

    - Another tree wide sweep of irq infrastructure abuse. Clear winner
    of the trainwreck engineering contest was:
    #include "../../../kernel/irq/settings.h"

    - Tree wide update of irq_set_affinity() callbacks which miss a cpu
    online check when picking a single cpu out of the affinity mask.

    - Tree wide consolidation of interrupt statistics.

    - Updates to the threaded interrupt infrastructure to allow explicit
    wakeup of the interrupt thread and a variant of synchronize_irq()
    which synchronizes only the hard interrupt handler. Both are
    needed to replace the homebrewn thread handling in the mmc/sdhci
    code.

    - New irq chip callbacks to allow proper support for GPIO based irqs.
    The GPIO based interrupts need to request/release GPIO resources
    from request/free_irq.

    - A few new ARM interrupt chips. No revolutionary new hardware, just
    differently wreckaged variations of the scheme.

    - Small improvments, cleanups and updates all over the place"

    I was hoping that that trainwreck engineering contest was a April Fools'
    joke. But no.

    * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (68 commits)
    irqchip: sun7i/sun6i: Disable NMI before registering the handler
    ARM: sun7i/sun6i: dts: Fix IRQ number for sun6i NMI controller
    ARM: sun7i/sun6i: irqchip: Update the documentation
    ARM: sun7i/sun6i: dts: Add NMI irqchip support
    ARM: sun7i/sun6i: irqchip: Add irqchip driver for NMI controller
    genirq: Export symbol no_action()
    arm: omap: Fix typo in ams-delta-fiq.c
    m68k: atari: Fix the last kernel_stat.h fallout
    irqchip: sun4i: Simplify sun4i_irq_ack
    irqchip: sun4i: Use handle_fasteoi_irq for all interrupts
    genirq: procfs: Make smp_affinity values go+r
    softirq: Add linux/irq.h to make it compile again
    m68k: amiga: Add linux/irq.h to make it compile again
    irqchip: sun4i: Don't ack IRQs > 0, fix acking of IRQ 0
    irqchip: sun4i: Fix a comment about mask register initialization
    irqchip: sun4i: Fix irq 0 not working
    genirq: Add a new IRQCHIP_EOI_THREADED flag
    genirq: Document IRQCHIP_ONESHOT_SAFE flag
    ARM: sunxi: dt: Convert to the new irq controller compatibles
    irqchip: sunxi: Change compatibles
    ...

    Linus Torvalds
     

01 Apr, 2014

29 commits

  • Pull s390 compat wrapper rework from Heiko Carstens:
    "S390 compat system call wrapper simplification work.

    The intention of this work is to get rid of all hand written assembly
    compat system call wrappers on s390, which perform proper sign or zero
    extension, or pointer conversion of compat system call parameters.
    Instead all of this should be done with C code eg by using Al's
    COMPAT_SYSCALL_DEFINEx() macro.

    Therefore all common code and s390 specific compat system calls have
    been converted to the COMPAT_SYSCALL_DEFINEx() macro.

    In order to generate correct code all compat system calls may only
    have eg compat_ulong_t parameters, but no unsigned long parameters.
    Those patches which change parameter types from unsigned long to
    compat_ulong_t parameters are separate in this series, but shouldn't
    cause any harm.

    The only compat system calls which intentionally have 64 bit
    parameters (preadv64 and pwritev64) in support of the x86/32 ABI
    haven't been changed, but are now only available if an architecture
    defines __ARCH_WANT_COMPAT_SYS_PREADV64/PWRITEV64.

    System calls which do not have a compat variant but still need proper
    zero extension on s390, like eg "long sys_brk(unsigned long brk)" will
    get a proper wrapper function with the new s390 specific
    COMPAT_SYSCALL_WRAPx() macro:

    COMPAT_SYSCALL_WRAP1(brk, unsigned long, brk);

    which generates the following code (simplified):

    asmlinkage long sys_brk(unsigned long brk);
    asmlinkage long compat_sys_brk(long brk)
    {
    return sys_brk((u32)brk);
    }

    Given that the C file which contains all the COMPAT_SYSCALL_WRAP lines
    includes both linux/syscall.h and linux/compat.h, it will generate
    build errors, if the declaration of sys_brk() doesn't match, or if
    there exists a non-matching compat_sys_brk() declaration.

    In addition this will intentionally result in a link error if
    somewhere else a compat_sys_brk() function exists, which probably
    should have been used instead. Two more BUILD_BUG_ONs make sure the
    size and type of each compat syscall parameter can be handled
    correctly with the s390 specific macros.

    I converted the compat system calls step by step to verify the
    generated code is correct and matches the previous code. In fact it
    did not always match, however that was always a bug in the hand
    written asm code.

    In result we get less code, less bugs, and much more sanity checking"

    * 'compat' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: (44 commits)
    s390/compat: add copyright statement
    compat: include linux/unistd.h within linux/compat.h
    s390/compat: get rid of compat wrapper assembly code
    s390/compat: build error for large compat syscall args
    mm/compat: convert to COMPAT_SYSCALL_DEFINE with changing parameter types
    kexec/compat: convert to COMPAT_SYSCALL_DEFINE with changing parameter types
    net/compat: convert to COMPAT_SYSCALL_DEFINE with changing parameter types
    ipc/compat: convert to COMPAT_SYSCALL_DEFINE with changing parameter types
    fs/compat: convert to COMPAT_SYSCALL_DEFINE with changing parameter types
    ipc/compat: convert to COMPAT_SYSCALL_DEFINE
    fs/compat: convert to COMPAT_SYSCALL_DEFINE
    security/compat: convert to COMPAT_SYSCALL_DEFINE
    mm/compat: convert to COMPAT_SYSCALL_DEFINE
    net/compat: convert to COMPAT_SYSCALL_DEFINE
    kernel/compat: convert to COMPAT_SYSCALL_DEFINE
    fs/compat: optional preadv64/pwrite64 compat system calls
    ipc/compat_sys_msgrcv: change msgtyp type from long to compat_long_t
    s390/compat: partial parameter conversion within syscall wrappers
    s390/compat: automatic zero, sign and pointer conversion of syscalls
    s390/compat: add sync_file_range and fallocate compat syscalls
    ...

    Linus Torvalds
     
  • Pull scheduler changes from Ingo Molnar:
    "Bigger changes:

    - sched/idle restructuring: they are WIP preparation for deeper
    integration between the scheduler and idle state selection, by
    Nicolas Pitre.

    - add NUMA scheduling pseudo-interleaving, by Rik van Riel.

    - optimize cgroup context switches, by Peter Zijlstra.

    - RT scheduling enhancements, by Thomas Gleixner.

    The rest is smaller changes, non-urgnt fixes and cleanups"

    * 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (68 commits)
    sched: Clean up the task_hot() function
    sched: Remove double calculation in fix_small_imbalance()
    sched: Fix broken setscheduler()
    sparc64, sched: Remove unused sparc64_multi_core
    sched: Remove unused mc_capable() and smt_capable()
    sched/numa: Move task_numa_free() to __put_task_struct()
    sched/fair: Fix endless loop in idle_balance()
    sched/core: Fix endless loop in pick_next_task()
    sched/fair: Push down check for high priority class task into idle_balance()
    sched/rt: Fix picking RT and DL tasks from empty queue
    trace: Replace hardcoding of 19 with MAX_NICE
    sched: Guarantee task priority in pick_next_task()
    sched/idle: Remove stale old file
    sched: Put rq's sched_avg under CONFIG_FAIR_GROUP_SCHED
    cpuidle/arm64: Remove redundant cpuidle_idle_call()
    cpuidle/powernv: Remove redundant cpuidle_idle_call()
    sched, nohz: Exclude isolated cores from load balancing
    sched: Fix select_task_rq_fair() description comments
    workqueue: Replace hardcoding of -20 and 19 with MIN_NICE and MAX_NICE
    sys: Replace hardcoding of -20 and 19 with MIN_NICE and MAX_NICE
    ...

    Linus Torvalds
     
  • Pull core locking updates from Ingo Molnar:
    "The biggest change is the MCS spinlock generalization changes from Tim
    Chen, Peter Zijlstra, Jason Low et al. There's also lockdep
    fixes/enhancements from Oleg Nesterov, in particular a false negative
    fix related to lockdep_set_novalidate_class() usage"

    * 'core-locking-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (22 commits)
    locking/mutex: Fix debug checks
    locking/mutexes: Add extra reschedule point
    locking/mutexes: Introduce cancelable MCS lock for adaptive spinning
    locking/mutexes: Unlock the mutex without the wait_lock
    locking/mutexes: Modify the way optimistic spinners are queued
    locking/mutexes: Return false if task need_resched() in mutex_can_spin_on_owner()
    locking: Move mcs_spinlock.h into kernel/locking/
    m68k: Skip futex_atomic_cmpxchg_inatomic() test
    futex: Allow architectures to skip futex_atomic_cmpxchg_inatomic() test
    Revert "sched/wait: Suppress Sparse 'variable shadowing' warning"
    lockdep: Change lockdep_set_novalidate_class() to use _and_name
    lockdep: Change mark_held_locks() to check hlock->check instead of lockdep_no_validate
    lockdep: Don't create the wrong dependency on hlock->check == 0
    lockdep: Make held_lock->check and "int check" argument bool
    locking/mcs: Allow architecture specific asm files to be used for contended case
    locking/mcs: Order the header files in Kbuild of each architecture in alphabetical order
    sched/wait: Suppress Sparse 'variable shadowing' warning
    hung_task/Documentation: Fix hung_task_warnings description
    locking/mcs: Allow architectures to hook in to contended paths
    locking/mcs: Micro-optimize the MCS code, add extra comments
    ...

    Linus Torvalds
     
  • Ralf Baechle
     
  • The CPC registers use native endianness, so using plain readl & writel
    will produce incorrect results on big endian systems.

    Reported-by: Jeffrey Deans
    Reported-by: Keng Koh
    Signed-off-by: Paul Burton
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/6657/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • The CM registers use native endianness, so using plain readl & writel
    will produce incorrect results on big endian systems.

    Reported-by: Jeffrey Deans
    Signed-off-by: Paul Burton
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/6656/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • The gic_send_ipi_mask function declared in smp-ops.h takes a struct
    cpumask argument, but linux/cpumask.h is only included within an #ifdef
    CONFIG_SMP. Move the gic_ function declarations within that #ifdef too
    to fix warnings during build such as:

    In file included from arch/mips/fw/arc/init.c:15:0:
    /mnt/buildbot/kernel/mips/slave/mips-linux__allno_/build/arch/mips/include/asm/smp-ops.h:62:44:
    warning: 'struct cpumask' declared inside parameter list [enabled by
    default]
    extern void gic_send_ipi_mask(const struct cpumask *mask, unsigned int
    action);

    Reported-by: Markos Chandras
    Signed-off-by: Paul Burton
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/6655/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • It's perfectly valid to use SMP on a non-MT CPU and use the GIC for
    IPIs. Set them up conditional upon CONFIG_MIPS_GIC_IPI rather than
    CONFIG_MIPS_MT_SMP.

    Signed-off-by: Paul Burton
    Cc: linux-mips@linux-mips.org
    Cc: Paul Burton
    Patchwork: https://patchwork.linux-mips.org/patch/6654/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Rather than duplicating the GIC IPI send function, share the one already
    used by CONFIG_MIPS_CPS & CONFIG_MIPS_CMP.

    Signed-off-by: Paul Burton
    Cc: linux-mips@linux-mips.org
    Cc: Paul Burton
    Patchwork: https://patchwork.linux-mips.org/patch/6653/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • This probing is already done by decode_configs as part of cpu_probe, and
    furthermore the implementation here was incorrect for any MT core with
    a number of VPEs other than 2.

    Signed-off-by: Paul Burton
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/6650/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • With binutils 2.24 the attempt to switch with microMIPS mode to MIPS III
    mode through .set mips3 results in *lots* of warnings like

    {standard input}: Assembler messages:
    {standard input}:397: Warning: the 64-bit MIPS architecture does not support the `smartmips' extension

    during a kernel build. Fixed by using .set arch=r4000 instead.

    This breaks support for building the kernel with binutils 2.13 which
    was supported for 32 bit kernels only anyway and 2.14 which was a bad
    vintage for MIPS anyway.

    Signed-off-by: Ralf Baechle

    Ralf Baechle
     
  • In cores which implement the MT ASE, the CPUNum in the EBase register is
    a concatenation of the core number & the VPE ID within that core. In
    order to retrieve the correct core number CPUNum must be shifted
    appropriately to remove the VPE ID bits.

    Signed-off-by: Paul Burton
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/6666/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • This function simply returns the number of VPEs present in the current
    core, or 1 if the core does not implement the MT ASE. In SMP kernels
    this will typically equal smp_num_siblings, however it will also be
    usable in UP kernels and helps prepare for the possibility of a
    heterogenous system where the VPE count is not the same across all
    cores.

    Signed-off-by: Paul Burton
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/6665/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Both the CONFIG_MIPS_CPS & CONFIG_MIPS_CMP SMP implementations call
    mips_mt_set_cpuoptions when preparing to start secondary CPUs. However
    both may be used without MT. Provide an empty inline function to prevent
    a link error in this case.

    Signed-off-by: Paul Burton
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/6647/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Use del_timer_sync to ensure that the timer is stopped on all CPUs before
    the driver exists.

    This change was suggested by Thomas Gleixner

    The semantic patch that makes this change is as follows:
    (http://coccinelle.lip6.fr/)

    //
    @r@
    declarer name module_exit;
    identifier ex;
    @@

    module_exit(ex);

    @@
    identifier r.ex;
    @@

    ex(...) {

    }
    //

    Signed-off-by: Julia Lawall
    Cc: kernel-janitors@vger.kernel.org
    Cc: tglx@linutronix.de
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/6663/
    Signed-off-by: Ralf Baechle

    Julia Lawall
     
  • This patch ensures that the kernel sets a sane base address for the
    PIIX4 PM I/O register region during boot. Without this the kernel may
    not successfully claim the region as a resource if the bootloader didn't
    configure the region. With this patch the kernel will always succeed
    with:

    pci 0000:00:0a.3: quirk: [io 0x1000-0x103f] claimed by PIIX4 ACPI

    The lack of the resource claiming is easily reproducible without this
    patch using current versions of QEMU.

    Signed-off-by: Paul Burton
    Tested-by: James Hogan
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/6641/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Signed-off-by: Huacai Chen
    Signed-off-by: Hongliang Tao
    Signed-off-by: Hua Yan
    Tested-by: Alex Smith
    Reviewed-by: Alex Smith
    Cc: John Crispin
    Cc: Steven J. Hill
    Cc: Aurelien Jarno
    Cc: linux-mips@linux-mips.org
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Patchwork: https://patchwork.linux-mips.org/patch/6640
    Signed-off-by: Ralf Baechle

    Huacai Chen
     
  • Tips of Loongson's CPU hotplug:
    1, To fully shutdown a core in Loongson 3, the target core should go to
    CKSEG1 and flush all L1 cache entries at first. Then, another core
    (usually Core 0) can safely disable the clock of the target core. So
    play_dead() call loongson3_play_dead() via CKSEG1 (both uncached and
    unmmaped).
    2, The default clocksource of Loongson is MIPS. Since clock source is a
    global device, timekeeping need the CP0' Count registers of each core
    be synchronous. Thus, when a core is up, we use a SMP_ASK_C0COUNT IPI
    to ask Core-0's Count.

    Signed-off-by: Huacai Chen
    Signed-off-by: Hongliang Tao
    Signed-off-by: Hua Yan
    Tested-by: Alex Smith
    Reviewed-by: Alex Smith
    Cc: John Crispin
    Cc: Steven J. Hill
    Cc: Aurelien Jarno
    Cc: linux-mips@linux-mips.org
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Patchwork: https://patchwork.linux-mips.org/patch/6639
    Signed-off-by: Ralf Baechle

    Huacai Chen
     
  • IPI registers of Loongson-3 include IPI_SET, IPI_CLEAR, IPI_STATUS,
    IPI_EN and IPI_MAILBOX_BUF. Each bit of IPI_STATUS indicate a type of
    IPI and IPI_EN indicate whether the IPI is enabled. The sender write 1
    to IPI_SET bits generate IPIs in IPI_STATUS, and receiver write 1 to
    bits of IPI_CLEAR to clear IPIs. IPI_MAILBOX_BUF are used to deliver
    more information about IPIs.

    Why we change code in arch/mips/loongson/common/setup.c?

    If without this change, when SMP configured, system cannot boot since
    it hang at printk() in cgroup_init_early(). The root cause is:

    console_trylock()
    \-->down_trylock(&console_sem)
    \-->raw_spin_unlock_irqrestore(&sem->lock, flags)
    \-->_raw_spin_unlock_irqrestore()(SMP/UP have different versions)
    \-->__raw_spin_unlock_irqrestore() (following is the SMP case)
    \-->do_raw_spin_unlock()
    \-->arch_spin_unlock()
    \-->nudge_writes()
    \-->mb()
    \-->wbflush()
    \-->__wbflush()

    In previous code __wbflush() is initialized in plat_mem_setup(), but
    cgroup_init_early() is called before plat_mem_setup(). Therefore, In
    this patch we make changes to avoid boot failure.

    Signed-off-by: Huacai Chen
    Signed-off-by: Hongliang Tao
    Signed-off-by: Hua Yan
    Tested-by: Alex Smith
    Reviewed-by: Alex Smith
    Cc: John Crispin
    Cc: Steven J. Hill
    Cc: Aurelien Jarno
    Cc: linux-mips@linux-mips.org
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Patchwork: https://patchwork.linux-mips.org/patch/6638
    Signed-off-by: Ralf Baechle

    Huacai Chen
     
  • Added Kconfig options include: Loongson-3 CPU and machine definition,
    CPU cache features, UEFI-like firmware interface (LEFI), HT-linked PCI,
    and swiotlb support.

    Signed-off-by: Huacai Chen
    Signed-off-by: Hongliang Tao
    Signed-off-by: Hua Yan
    Tested-by: Alex Smith
    Reviewed-by: Alex Smith
    Cc: John Crispin
    Cc: Steven J. Hill
    Cc: Aurelien Jarno
    Cc: linux-mips@linux-mips.org
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Patchwork: https://patchwork.linux-mips.org/patch/6637
    Signed-off-by: Ralf Baechle

    Huacai Chen
     
  • Loongson doesn't support DMA address above 4GB traditionally. If memory
    is more than 4GB, CONFIG_SWIOTLB and ZONE_DMA32 should be selected. In
    this way, DMA pages are allocated below 4GB preferably. However, if low
    memory is not enough, high pages are allocated and swiotlb is used for
    bouncing.

    Moreover, we provide a platform-specific dma_map_ops::set_dma_mask() to
    set a device's dma_mask and coherent_dma_mask. We use these masks to
    distinguishes an allocated page can be used for DMA directly, or need
    swiotlb to bounce.

    Recently, we found that 32-bit DMA isn't a hardware bug, but a hardware
    configuration issue. So, latest firmware has enable the DMA support as
    high as 40-bit. To support all-memory DMA for all devices (besides the
    Loongson platform limit, there are still some devices have their own
    DMA32 limit), and also to be compatible with old firmware, we keep use
    swiotlb.

    Signed-off-by: Huacai Chen
    Signed-off-by: Hongliang Tao
    Signed-off-by: Hua Yan
    Tested-by: Alex Smith
    Reviewed-by: Alex Smith
    Cc: John Crispin
    Cc: Steven J. Hill
    Cc: Aurelien Jarno
    Cc: linux-mips@linux-mips.org
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Patchwork: https://patchwork.linux-mips.org/patch/6636
    Signed-off-by: Ralf Baechle

    Huacai Chen
     
  • Loongson family machines has three types of serial port: PCI UART, LPC
    UART and CPU internal UART. Loongson-2E and parts of Loongson-2F based
    machines use PCI UART; most Loongson-2F based machines use LPC UART;
    Loongson-2G/3A has both LPC and CPU UART but usually use CPU UART.

    Port address of UARTs:
    CPU UART: REG_BASE + OFFSET;
    LPC UART: LIO1_BASE + OFFSET;
    PCI UART: PCIIO_BASE + OFFSET.

    Since LPC UART are linked in "Local Bus", both CPU UART and LPC UART
    are called "CPU provided serial port".

    Signed-off-by: Huacai Chen
    Signed-off-by: Hongliang Tao
    Signed-off-by: Hua Yan
    Tested-by: Alex Smith
    Reviewed-by: Alex Smith
    Cc: John Crispin
    Cc: Steven J. Hill
    Cc: Aurelien Jarno
    Cc: linux-mips@linux-mips.org
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Patchwork: https://patchwork.linux-mips.org/patch/6635
    Signed-off-by: Ralf Baechle

    Huacai Chen
     
  • IRQ routing path of Loongson-3:
    Devices(most) --> I8259 --> HT Controller --> IRQ Routing Table --> CPU
    ^
    |
    Device(legacy devices such as UART) --> Bonito ---|

    IRQ Routing Table route 32 INTs to CPU's INT0~INT3(IP2~IP5 of CP0), 32
    INTs include 16 HT INTs(mostly), 4 PCI INTs, 1 LPC INT, etc. IP6 is used
    for IPI and IP7 is used for internal MIPS timer. LOONGSON_INT_ROUTER_*
    are IRQ Routing Table registers.

    I8259 IRQs are 1:1 mapped to HT1 INTs. LOONGSON_HT1_* are configuration
    registers of HT1 controller.

    Signed-off-by: Huacai Chen
    Signed-off-by: Hongliang Tao
    Signed-off-by: Hua Yan
    Tested-by: Alex Smith
    Reviewed-by: Alex Smith
    Cc: John Crispin
    Cc: Steven J. Hill
    Cc: Aurelien Jarno
    Cc: linux-mips@linux-mips.org
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Patchwork: https://patchwork.linux-mips.org/patch/6634
    Signed-off-by: Ralf Baechle

    Huacai Chen
     
  • Loongson family machines use Hyper-Transport bus for inter-core
    connection and device connection. The PCI bus is a subordinate
    linked at HT1.

    With LEFI firmware interface, We don't need fixup for PCI irq routing
    (except providing a VBIOS of the integrated GPU).

    Signed-off-by: Huacai Chen
    Signed-off-by: Hongliang Tao
    Signed-off-by: Hua Yan
    Tested-by: Alex Smith
    Reviewed-by: Alex Smith
    Cc: John Crispin
    Cc: Steven J. Hill
    Cc: Aurelien Jarno
    Cc: linux-mips@linux-mips.org
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Patchwork: https://patchwork.linux-mips.org/patch/6633
    Signed-off-by: Ralf Baechle

    Huacai Chen
     
  • The new UEFI-like firmware interface (LEFI, i.e. Loongson Unified
    Firmware Interface) has 3 advantages:

    1, Firmware export a physical memory map which is similar to X86's
    E820 map, so prom_init_memory() will be more elegant that #ifdef
    clauses can be removed.
    2, Firmware export a pci irq routing table, we no longer need pci
    irq routing fixup in kernel's code.
    3, Firmware has a built-in vga bios, and its address is exported,
    the linux kernel no longer need an embedded blob.

    With the LEFI interface, Loongson-3A/2G and all their successors can use
    a unified kernel. All Loongson-based machines support this new interface
    except 2E/2F series.

    Signed-off-by: Huacai Chen
    Signed-off-by: Hongliang Tao
    Signed-off-by: Hua Yan
    Tested-by: Alex Smith
    Reviewed-by: Alex Smith
    Cc: John Crispin
    Cc: Steven J. Hill
    Cc: Aurelien Jarno
    Cc: linux-mips@linux-mips.org
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Patchwork: https://patchwork.linux-mips.org/patch/6632
    Signed-off-by: Ralf Baechle

    Huacai Chen
     
  • Add four Loongson-3 based machine types:
    MACH_LEMOTE_A1004/MACH_LEMOTE_A1201 are laptops;
    MACH_LEMOTE_A1101 is mini-itx;
    MACH_LEMOTE_A1205 is all-in-one machine.

    The most significant differrent between A1004/A1201 and A1101/A1205 is
    the laptops have EC but others don't.

    Signed-off-by: Huacai Chen
    Signed-off-by: Hongliang Tao
    Signed-off-by: Hua Yan
    Tested-by: Alex Smith
    Reviewed-by: Alex Smith
    Cc: John Crispin
    Cc: Steven J. Hill
    Cc: Aurelien Jarno
    Cc: linux-mips@linux-mips.org
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Patchwork: https://patchwork.linux-mips.org/patch/6631
    Signed-off-by: Ralf Baechle

    Huacai Chen
     
  • Basic Loongson-3 CPU support include CPU probing and TLB/cache
    initializing.

    Signed-off-by: Huacai Chen
    Signed-off-by: Hongliang Tao
    Signed-off-by: Hua Yan
    Tested-by: Alex Smith
    Reviewed-by: Alex Smith
    Cc: John Crispin
    Cc: Steven J. Hill
    Cc: Aurelien Jarno
    Cc: linux-mips@linux-mips.org
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Patchwork: https://patchwork.linux-mips.org/patch/6630
    Signed-off-by: Ralf Baechle

    Huacai Chen
     
  • Loongson-3 is a multi-core MIPS family CPU, it support MIPS64R2 fully.
    Loongson-3 has the same IMP field (0x6300) as Loongson-2.

    Loongson-3 has a hardware-maintained cache, system software doesn't
    need to maintain coherency.

    Loongson-3A is the first revision of Loongson-3, and it is the quad-
    core version of Loongson-2G. Loongson-3A has a simplified version named
    Loongson-2Gq, the main difference between Loongson-3A/2Gq is 3A has two
    HyperTransport controller but 2Gq has only one. HT0 is used for cross-
    chip interconnection and HT1 is used to link PCI bus. Therefore, 2Gq
    cannot support NUMA but 3A can. For software, Loongson-2Gq is simply
    identified as Loongson-3A.

    Exsisting Loongson family CPUs:
    Loongson-1: Loongson-1A, Loongson-1B, they are 32-bit MIPS CPUs.
    Loongson-2: Loongson-2E, Loongson-2F, Loongson-2G, they are 64-bit
    single-core MIPS CPUs.
    Loongson-3: Loongson-3A(including so-called Loongson-2Gq), they are
    64-bit multi-core MIPS CPUs.

    Signed-off-by: Huacai Chen
    Signed-off-by: Hongliang Tao
    Signed-off-by: Hua Yan
    Tested-by: Alex Smith
    Reviewed-by: Alex Smith
    Cc: John Crispin
    Cc: Steven J. Hill
    Cc: Aurelien Jarno
    Cc: linux-mips@linux-mips.org
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Patchwork: https://patchwork.linux-mips.org/patch/6629/
    Signed-off-by: Ralf Baechle

    Huacai Chen
     
  • And there are more CPUs or configurations that want to provide special
    per-CPU information in /proc/cpuinfo. So I think there needs to be a
    hook mechanism, such as a notifier.

    This is a first cut only; I need to think about what sort of looking
    the notifier needs to have. But I'd appreciate testing on MT hardware!

    Signed-off-by: Ralf Baechle
    Cc: Markos Chandras
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/6066/

    Ralf Baechle