28 Jan, 2015
1 commit
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commit 41f632fe177bc4822c2e8236fe7c291e6e9eb6f8 upstream.
Remove bogus call to of_gpiochip_add (and of_gpio_chip remove in error
path) which is also called when adding the gpio chip.This prevents adding the same pinctrl range twice.
Fixes: 3f8c50c9b110 ("OF: pinctrl: MIPS: lantiq: implement lantiq/xway
pinctrl support")Signed-off-by: Johan Hovold
Signed-off-by: Linus Walleij
Signed-off-by: Greg Kroah-Hartman
28 Oct, 2014
1 commit
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Even if a gpio pin is set to output, we still need to set INPUT_EN
functionality (by clearing INPUT_EN bit) to be able to read the pin's
level.E.g. without this change, we'll always read low level state from sysfs.
Cc: # v3.14+
Cc: Mathias Nyman
Signed-off-by: David Cohen
Reviewed-by: Felipe Balbi
Signed-off-by: Linus Walleij
20 Oct, 2014
1 commit
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Direct irq en bit should be cleared for pads using io mode.
If not, the io based irq will never be detected.
However, this bit can sometimes be misconfigured (BIOS issue).
Force clearing of this bit in io mode and trigger a WARN.Signed-off-by: Loic Poulain
Acked-by: Mika Westerberg
Signed-off-by: Linus Walleij
10 Oct, 2014
1 commit
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Pull GPIO changes from Linus Walleij:
"This is the bulk of GPIO changes for the v3.18 development cycle:- Increase the default ARCH_NR_GPIO from 256 to 512. This was done
to avoid having a custom header for the x86
architecture - GPIO is custom and complicated enough as it is
already! We want to move to a radix to store the descriptors going
forward, and finally get rid of this fixed array size altogether.- Endgame patching of the gpio_remove() semantics initiated by
Abdoulaye Berthe. It is not accepted by the system that the
removal of a GPIO chip fails during eg reboot or shutdown, and
therefore the return value has now painfully been refactored away.
For special cases like GPIO expanders on a hot-pluggable bus like
USB, we may later add some gpiochip_try_remove() call, but for the
cases we have now, return values are moot.- Some incremental refactoring of the gpiolib core and ACPI GPIO
library for more descriptor usage.- Refactor the chained IRQ handler set-up method to handle also
threaded, nested interrupts and set up the parent IRQ correctly.
Switch STMPE and TC3589x drivers to use this registration method.- Add a .irq_not_threaded flag to the struct gpio_chip, so that also
GPIO expanders that block but are still not using threaded IRQ
handlers.- New drivers for the ARM64 X-Gene SoC GPIO controller.
- The syscon GPIO driver has been improved to handle the "DSP GPIO"
found on the TI Keystone 2 SoC:s.- ADNP driver switched to use gpiolib irqchip helpers.
- Refactor the DWAPB driver to support being instantiated from and
MFD cell (platform device).- Incremental feature improvement in the Zynq, MCP23S08, DWAPB, OMAP,
Xilinx and Crystalcove drivers.- Various minor fixes"
* tag 'gpio-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (52 commits)
gpio: pch: Build context save/restore only for PM
pinctrl: abx500: get rid of unused variable
gpio: ks8695: fix 'else should follow close brace '}''
gpio: stmpe: add verbose debug code
gpio: stmpe: fix up interrupt enable logic
gpio: staticize xway_stp_init()
gpio: handle also nested irqchips in the chained handler set-up
gpio: set parent irq on chained handlers
gpiolib: irqchip: use irq_find_mapping while removing irqchip
gpio: crystalcove: support virtual GPIO
pinctrl: bcm281xx: make Kconfig dependency more strict
gpio: kona: enable only on BCM_MOBILE or for compile testing
gpio, bcm-kona, LLVMLinux: Remove use of __initconst
gpio: Fix ngpio in gpio-xilinx driver
gpio: dwapb: fix pointer to integer cast
gpio: xgene: Remove unneeded #ifdef CONFIG_OF guard
gpio: xgene: Remove unneeded forward declation for struct xgene_gpio
gpio: xgene: Fix missing spin_lock_init()
gpio: ks8695: fix switch case indentation
gpiolib: add irq_not_threaded flag to gpio_chip
...
08 Oct, 2014
1 commit
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Pull pin control changes from Linus Walleij:
"This is the bulk of pin control changes for the v3.18 development
series:- New drivers for the Freescale i.MX21, Qualcomm APQ8084 pin
controllers.- Incremental new features on the Rockchip, atlas 6, OMAP, AM437x,
APQ8064, prima2, AT91, Tegra, i.MX, Berlin and Nomadik.- Push Freescale drivers down into their own subdirectory.
- Assorted sprays of syntax and semantic fixes"
* tag 'pinctrl-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (48 commits)
pinctrl: specify bindings for pins and groups
pinctrl: nomadik: improve GPIO debug prints
pinctrl: abx500: refactor DT parser to take two paths
pinctrl: abx500: use helpers for map allocation/free
pinctrl: alter device tree bindings for functions
pinctrl: nomadik: refactor DT parser to take two paths
pinctrl: nomadik: use utils map free function
pinctrl: nomadik: use util function to reserve maps
pinctrl: qcom: use restart_notifier mechanism for ps_hold
pinctrl: sh-pfc: sh73a0: Remove unnecessary SoC data allocation
pinctrl: berlin: fix the dt_free_map function
pinctrl: at91: disable PD or PU before enabling PU or PD
pinctrl: st: remove gpiochip in failure cases
pinctrl: at91: Fix error handling while doing gpiochio_irqchip_add
pinctrl: at91: Fix failure path in at91_gpio_probe path
pinctrl: lantiq: Release gpiochip resources in fail case
pinctrl: imx: detect uninitialized pins
pinctrl: tegra: Add MIPI pad control
pinctrl: at91: Switch to using managed clk_get
pinctrl: adi2: Remove duplicate gpiochip_remove_pin_ranges
...
02 Oct, 2014
1 commit
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commit 2fcea6cecbc965b4e02a39537d9d939f5251bbbd
"pinctrl: remove remaining users of gpiochip_remove() retval"
removed the use of the return value from gpiochip_remove()
but missed to delete the dangling "err" variable:drivers/pinctrl/nomadik/pinctrl-abx500.c:
In function 'abx500_gpio_probe':
drivers/pinctrl/nomadik/pinctrl-abx500.c:1208:11:
warning: unused variable 'err' [-Wunused-variable]Fix this by getting rid of the dangling variable.
Reported-by: Arnd Bergmann
Signed-off-by: Linus Walleij
30 Sep, 2014
3 commits
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The debugfs file would only define if the line was "pulled" and
not which direction (pull up or pull down). Improve this by
taking two print paths depending on whether the pin is set as
input or output and use the data register directly to figure
out whether the pin is set for pull up or pull down.Signed-off-by: Linus Walleij
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We refactor the DT parser to look for either a config or a
function and then look for further nodes and reserve maps,
not the two things mixed up like prior to this patch.Signed-off-by: Linus Walleij
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This switches the abx500 driver to use the pin control helper
utils for allocating and free:ing maps.Signed-off-by: Linus Walleij
29 Sep, 2014
3 commits
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We refactor the DT parser to look for either a config or a
function and then look for further nodes and reserve maps,
not the two things mixed up like prior to this patch.Signed-off-by: Linus Walleij
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Stop brewing our own map free function and rely on the pinctrl
utils helpers.Signed-off-by: Linus Walleij
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Stop brewing our own pin map reservation function and use the
generic code.Signed-off-by: Linus Walleij
26 Sep, 2014
1 commit
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By converting to the restart_notifier mechanism for restart, we allow
for other mechanisms, like the watchdog, to be used for restart in the
case where PS_HOLD has failed to reset the chip.Since this mechanism may be one of several mechanisms registered, change
the post-ps_hold write timeout to be a more reasonable 1 second instead
of 10 seconds.Choose priority 128, as according to documentation, this mechanism "is
sufficient to restart the entire system".Tested-by: Pramod Gurav
Signed-off-by: Josh Cartwright
Acked-by: Bjorn Andersson
Reviewed-by: Guenter Roeck
Signed-off-by: Linus Walleij
25 Sep, 2014
1 commit
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This driver is only useful on BCM281xx, so let the driver depend on
ARCH_BCM_MOBILE but allow compile coverage testing.
The main benefit is that the driver isn't available to be selected for
machines that don't have the matching hardware.Signed-off-by: Uwe Kleine-König
Reviewed-by: Sherman Yin
Signed-off-by: Linus Walleij
23 Sep, 2014
9 commits
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Some drivers accidentally still use the return value from
gpiochip_remove(). Get rid of them so we can simplify this function
and get rid of the return value.Cc: Abdoulaye Berthe
Signed-off-by: Linus Walleij -
The SoC data structure allocated at init time only holds a regulator
pointer that is only used in the init function. Replace it with a local
variable and get rid of the SoC data structure allocation altogether.Signed-off-by: Laurent Pinchart
Acked-by: Geert Uytterhoeven
Signed-off-by: Linus Walleij -
The berlin_pinctrl_dt_free_map function tries to free memory
allocated and handled by the of subsystem. This is wrong and
already handled by pinctrl_dt_free_maps() which calls
of_node_put().This patch fixes the Berlin pinctrl way of freeing its maps,
avoiding a kernel BUG(), by using the common
pinctrl_utils_dt_free_map function instead.Signed-off-by: Antoine Tenart
Acked-by: Sebastian Hesselbarth
Signed-off-by: Linus Walleij -
Disable Pull-Down or Pull-Up property before enabling Pull-Up or
Pull-Down, because the pin's Pull-Up and Pull-Down property is
mutually exclusive.Signed-off-by: Wenyou Yang
Acked-by: Nicolas Ferre
Signed-off-by: Linus Walleij -
This patch releases gpiochip related resources by calling
gpiochip_remove when gpiochip_irqchip_add fails.Cc: Maxime Coquelin
Cc: Patrice Chotard
Cc: Bjorn Andersson
Acked-by: Srinivas Kandagatla
Signed-off-by: Pramod Gurav
Signed-off-by: Linus Walleij -
This patch removes a call to panic function when gpiochio_irqchip_add
fails and just returns the error to the calling function.
Same return value is used to handle the error case and adds a lable
to release resources on error.
The error message has been improved to indicate failure to add irqchip
to gpiochip.This also changes first argument to function at91_gpio_of_irq_setup from
struct device_node to struct platform_device. Because The device_node
argument was anyway not being used. Passed pdev so that on failure dev_err
can use &pdev->dev and log can be associated with proper device.CC: Jean-Christophe Plagniol-Villard
CC: Linus Walleij
Signed-off-by: Pramod Gurav
Signed-off-by: Linus Walleij -
This fixes the whole error handling in probe function by capturing and
returning error values on kernel function like clk_prepare,
clk_enable, gpiochip_add etc.CC: Jean-Christophe Plagniol-Villard
CC: Linus Walleij
Signed-off-by: Pramod Gurav
Signed-off-by: Linus Walleij -
This patch releases gpiochip resources with of_gpiochip_remove
and gpiochip_remove in failure cases.CC: John Crispin
CC: Linus Walleij
Signed-off-by: Pramod Gurav
Signed-off-by: Linus Walleij -
The pinctrl driver initialized the register offsets for the pins
with 0. On Vybrid an offset of 0 is a valid offset for the pinctrl
mux register. So far, this was solved using the ZERO_OFFSET_VALID
flag which allowed offsets of 0. However, this does not allow to
verify whether a pins struct imx_pmx_func was initialized or not.Use signed offset values for register offsets and initialize those
with -1 in order to detect uninitialized offset values reliable.Signed-off-by: Stefan Agner
Signed-off-by: Linus Walleij
20 Sep, 2014
1 commit
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This patch adds MIPI CSI/DSIB pad control mux register
from the APB misc block to tegra pinctrl.Without writing to this register, the dsib pads are
muxed as csi, and cannot be used.The register is not yet documented in the TRM, here is
the description:70000820: APB_MISC_GP_MIPI_PAD_CTRL_0
[31:02] RESERVED
[01:01] DSIB_MODE [CSI=0,DSIB=1]
[00:00] RESERVEDSigned-off-by: Sean Paul
Acked-by: Stephen Warren
Signed-off-by: Linus Walleij
10 Sep, 2014
1 commit
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Add the IRQCHIP_SKIP_SET_WAKE flag to baytrail gpio irq_chip
to resolve unbalaced IRQ wake disable warnings.Suggested-by: Borun Fu
Signed-off-by: Mathias Nyman
Reviewed-by: Mika Westerberg
Signed-off-by: Linus Walleij
05 Sep, 2014
8 commits
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This patch switches to using managed version of clk_get and hence
removes clk_put from failure path.CC: Jean-Christophe Plagniol-Villard
CC: Linus Walleij
Signed-off-by: Pramod Gurav
Signed-off-by: Linus Walleij -
This patch removes call to gpiochip_remove_pin_ranges() from
platform_driver remove function as it will anway be called
by gpiochip_remove().CC: Sonic Zhang
CC: Linus Walleij
Signed-off-by: Pramod Gurav
Signed-off-by: Linus Walleij -
commit 03e9f0cac5da6af85758276cb4624caf5911f2b9
"pinctrl: clean up after enable refactoring"
renamed the vtable callback .enable to .set_mux. The
renaming was done manually, and one of the alterations
contained a freudian slip. I confess, I am human.Signed-off-by: Linus Walleij
-
The SAMA5 and SAM9x5 series both have drive strength
options for the PIOs. This patch adds the ability to set
one of three hardware options for drive strengths of low,
medium or high for the each pin. The actual current output
of the chip based on the setting is defined in the datasheets
and varies per pins separate from banks and with supply
voltage.This patch adds three new dt-bindings that allow setting the
strength when configuring pins. By default, no change will
be made to the drive strength of a pin from its reset value.
Due to the difference between the register addresses of the
SAMA5 and SAM9x5 series, a new sama5d3-pinctrl id was added.Signed-off-by: Marek Roszko
Acked-by: Nicolas Ferre
Signed-off-by: Linus Walleij -
we have done that for atlas6 in commit ed36c1a, 086b8904 etc. here we
do same things for prima2.Signed-off-by: Rongjun Ying
Signed-off-by: Barry Song
Signed-off-by: Linus Walleij -
This patch releases gpiochip related resources by calling
gpiochip_remove when gpiochip_irqchip_add fails.CC: Linus Walleij
CC: Barry Song
CC: Rongjun Ying
CC: Yuping Luo
Signed-off-by: Pramod Gurav
Signed-off-by: Linus Walleij -
Currently the value used to specify that interrupts from the gpio should
be routed to the application processor is hardcoded for all Qualcomm SoCs.
But the new APQ8084 SoC uses a different value. To resolve this, we make
this value configurable for each SoC. For all existing SoCs we continue
to use the current value, and only for APQ8084 we use the new value.Suggested-by: Bjorn Andersson
Acked-by: Bjorn Andersson
Signed-off-by: Georgi Djakov
Signed-off-by: Linus Walleij -
This patchset adds pinctrl support for the Qualcomm APQ8084 platform.
This set of patches adds pinctrl support for the Qualcomm APQ8084 platform.
The first patch adds the pin definitions. The second patch contains the
devicetree binding documentation. The third patch adds the DT node.
The last patch makes the INTR_TARGET_PROC_APPS value configurable and
defines it for each existing SoC.Tested on IFC6540 board.
Changes since v3:
- Fixed the sdc valid pin values in the binding documentation - sdc2
instead of sdc3. (suggested by Bjorn Andersson)Changes since v2:
- Fixed some incorrect bits and offsets. (suggested by Bjorn Andersson)
- Updated binding documentation to follow the format of msm8960.
(suggested by Bjorn Andersson)
- Added fourth patch, which removes the hardcoded INTR_TARGET_PROC_APPS
value and makes it configurable. Also we keep the current value for
existing SoCs. (suggested by Bjorn Andersson)Changes since v1:
- Updated the total number of pins (suggested by Bjorn Andersson)
- Added the missing pin info (provided by Andy Gross)
- Updated groups and functions to be consistent with other pinctrls.
(suggested by Andy Gross)
- Removed unused functions, qdss and test pins. (suggested by Andy Gross)
- Updated the documentation with the possible functions.Reviewed-by: Andy Gross
Acked-by: Bjorn Andersson
Signed-off-by: Georgi Djakov
Signed-off-by: Linus Walleij
04 Sep, 2014
3 commits
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The vtable named *pinmux_ops in the affected files are not really
about pin multiplexing, but a struct related to some PFC-specific
operations, inclusing pin config (bias setting). Rename the variable
so as to avoid confusions.Acked-by: Laurent Pinchart
Signed-off-by: Linus Walleij -
This moves all the Freescale-related drivers (i.MX and MXS) to
its own subdirectory to clear the view.Cc: Alexander Shiyan
Cc: Anson Huang
Cc: Fabio Estevam
Cc: Denis Carikli
Cc: Markus Pargmann
Cc: Greg Ungerer
Cc: Sascha Hauer
Acked-by: Shawn Guo
Signed-off-by: Linus Walleij -
commit 2243a87d90b42eb38bc281957df3e57c712b5e56
"pinctrl: avoid duplicated calling enable_pinmux_setting for a pin"
removed the .disable callback from the struct pinmux_ops,
making the .enable() callback the only remaining callback.However .enable() is a bad name as it seems to imply that a
muxing can also be disabled. Rename the callback to .set_mux()
and also take this opportunity to clean out any remaining
mentions of .disable() from the documentation.Acked-by: Stephen Warren
Acked-by: Bjorn Andersson
Acked-by: Fan Wu
Signed-off-by: Linus Walleij
02 Sep, 2014
3 commits
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This patch adds support for reset functions to reboot the boards
with soc apq8064.Cc: Linus Walleij
Cc: "Ivan T. Ivanov"
Cc: Stephen Boyd
Cc: Andy Gross
Acked-by: Bjorn Andersson
Signed-off-by: Pramod Gurav
Signed-off-by: Linus Walleij -
This patch releases gpiochip related resources by calling
gpiochip_remove when either of gpiochip_add_pin_range and
gpiochip_irqchip_add fails.CC: Linus Walleij
CC: "Ivan T. Ivanov"
Acked-by: Bjorn Andersson
Signed-off-by: Pramod Gurav
Signed-off-by: Linus Walleij -
There is currently a kludge to get the Makefile to move down
to sh-pfc:s drivers: the arch definitions are used twice to
get it done. However we can very well use the Kconfig symbol
for the SH PFC pin control feature itself: it doesn't matter
that it comes from a lower leaf in the Kconfig hierarchy which
is completely orthogonal.Acked-by: Laurent Pinchart
Signed-off-by: Linus Walleij
29 Aug, 2014
1 commit
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Samsung Exynos7 is a ARM64bit processor. Which does not select
the CONFIG_PLAT_SAMSUNG symbol. CONFIG_PINCTRL_SAMSUNG is being
selected for both PLAT_SAMSUNG and ARCH_EXYNOS7 symbols.This patch modifes the pinctrl/Makefile to use
CONFIG_PINCTRL_SAMSUNG symbol to compile the pinctrl/samsung/*.cSigned-off-by: Naveen Krishna Chatradhi
Cc: Tomasz Figa
Cc: linus.walleij@linaro.org
Cc: Thomas Abraham
Signed-off-by: Linus Walleij
