Eric Lee / smarc-ti-linux-kernel

23 Sep, 2014

1 commit

16 Sep, 2014

1 commit

  • 5075314e4   dsa: Split ops up, and avoid assigning tag_protocol and receive separately ... Browse Code »

    This change addresses several issues.

    First, it was possible to set tag_protocol without setting the ops pointer.
    To correct that I have reordered things so that rcv is now populated before
    we set tag_protocol.

    Second, it didn't make much sense to keep setting the device ops each time a
    new slave was registered. So by moving the receive portion out into root
    switch initialization that issue should be addressed.

    Third, I wanted to avoid sending tags if the rcv pointer was not registered
    so I changed the tag check to verify if the rcv function pointer is set on
    the root tree. If it is then we start sending DSA tagged frames.

    Finally I split the device ops pointer in the structures into two spots. I
    placed the rcv function pointer in the root switch since this makes it
    easiest to access from there, and I placed the xmit function pointer in the
    slave for the same reason.

    Signed-off-by: Alexander Duyck
    Signed-off-by: David S. Miller

    Alexander Duyck
     

28 Aug, 2014

3 commits

  • 5037d532b   net: dsa: add Broadcom tag RX/TX handler ... Browse Code »

    Add support for the 4-bytes Broadcom tag that built-in switches such as
    the Starfighter 2 might insert when receiving packets, or that we need
    to insert while targetting specific switch ports. We use a fake local
    EtherType value for this 4-bytes switch tag: ETH_P_BRCMTAG to make sure
    we can assign DSA-specific network operations within the DSA drivers.

    Signed-off-by: Florian Fainelli
    Signed-off-by: David S. Miller

    Florian Fainelli
     
  • 0d8bcdd38   net: dsa: allow for more complex PHY setups ... Browse Code »
    43

    Modify the DSA slave interface to be bound to an arbitray PHY, not just
    the ones that are available as child PHY devices of the switch MDIO bus.

    This allows us for instance to have external PHYs connected to a
    separate MDIO bus, but yet also connected to a given switch port.

    Under certain configurations, the physical port mask might not be a 1:1
    mapping to the MII PHYs mask. This is the case, if e.g: Port 1 of the
    switch is used and connects to a PHY at a MDIO address different than 1.

    Introduce a phys_mii_mask variable which allows driver to implement and
    divert their own MDIO read/writes operations for a subset of the MDIO
    PHY addresses.

    Signed-off-by: Florian Fainelli
    Signed-off-by: David S. Miller

    Florian Fainelli
     
  • 3e8a72d1d   net: dsa: reduce number of protocol hooks ... Browse Code »
    26

    DSA is currently registering one packet_type function per EtherType it
    needs to intercept in the receive path of a DSA-enabled Ethernet device.
    Right now we have three of them: trailer, DSA and eDSA, and there might
    be more in the future, this will not scale to the addition of new
    protocols.

    This patch proceeds with adding a new layer of abstraction and two new
    functions:

    dsa_switch_rcv() which will dispatch into the tag-protocol specific
    receive function implemented by net/dsa/tag_*.c

    dsa_slave_xmit() which will dispatch into the tag-protocol specific
    transmit function implemented by net/dsa/tag_*.c

    When we do create the per-port slave network devices, we iterate over
    the switch protocol to assign the DSA-specific receive and transmit
    operations.

    A new fake ethertype value is used: ETH_P_XDSA to illustrate the fact
    that this is no longer going to look like ETH_P_DSA or ETH_P_TRAILER
    like it used to be.

    This allows us to greatly simplify the check in eth_type_trans() and
    always override the skb->protocol with ETH_P_XDSA for Ethernet switches
    tagged protocol, while also reducing the number repetitive slave
    netdevice_ops assignments.

    Signed-off-by: Florian Fainelli
    Signed-off-by: David S. Miller

    Florian Fainelli
     

29 Nov, 2011

1 commit

27 Nov, 2011

2 commits

01 Sep, 2009

1 commit

22 Mar, 2009

1 commit

  • e84665c9c   dsa: add switch chip cascading support ... Browse Code »

    The initial version of the DSA driver only supported a single switch
    chip per network interface, while DSA-capable switch chips can be
    interconnected to form a tree of switch chips. This patch adds support
    for multiple switch chips on a network interface.

    An example topology for a 16-port device with an embedded CPU is as
    follows:

    +-----+ +--------+ +--------+
    | |eth0 10| switch |9 10| switch |
    | CPU +----------+ +-------+ |
    | | | chip 0 | | chip 1 |
    +-----+ +---++---+ +---++---+
    || ||
    || ||
    ||1000baseT ||1000baseT
    ||ports 1-8 ||ports 9-16

    This requires a couple of interdependent changes in the DSA layer:

    - The dsa platform driver data needs to be extended: there is still
    only one netdevice per DSA driver instance (eth0 in the example
    above), but each of the switch chips in the tree needs its own
    mii_bus device pointer, MII management bus address, and port name
    array. (include/net/dsa.h) The existing in-tree dsa users need
    some small changes to deal with this. (arch/arm)

    - The DSA and Ethertype DSA tagging modules need to be extended to
    use the DSA device ID field on receive and demultiplex the packet
    accordingly, and fill in the DSA device ID field on transmit
    according to which switch chip the packet is heading to.
    (net/dsa/tag_{dsa,edsa}.c)

    - The concept of "CPU port", which is the switch chip port that the
    CPU is connected to (port 10 on switch chip 0 in the example), needs
    to be extended with the concept of "upstream port", which is the
    port on the switch chip that will bring us one hop closer to the CPU
    (port 10 for both switch chips in the example above).

    - The dsa platform data needs to specify which ports on which switch
    chips are links to other switch chips, so that we can enable DSA
    tagging mode on them. (For inter-switch links, we always use
    non-EtherType DSA tagging, since it has lower overhead. The CPU
    link uses dsa or edsa tagging depending on what the 'root' switch
    chip supports.) This is done by specifying "dsa" for the given
    port in the port array.

    - The dsa platform data needs to be extended with information on via
    which port to reach any given switch chip from any given switch chip.
    This info is specified via the per-switch chip data struct ->rtable[]
    array, which gives the nexthop ports for each of the other switches
    in the tree.

    For the example topology above, the dsa platform data would look
    something like this:

    static struct dsa_chip_data sw[2] = {
    {
    .mii_bus = &foo,
    .sw_addr = 1,
    .port_names[0] = "p1",
    .port_names[1] = "p2",
    .port_names[2] = "p3",
    .port_names[3] = "p4",
    .port_names[4] = "p5",
    .port_names[5] = "p6",
    .port_names[6] = "p7",
    .port_names[7] = "p8",
    .port_names[9] = "dsa",
    .port_names[10] = "cpu",
    .rtable = (s8 []){ -1, 9, },
    }, {
    .mii_bus = &foo,
    .sw_addr = 2,
    .port_names[0] = "p9",
    .port_names[1] = "p10",
    .port_names[2] = "p11",
    .port_names[3] = "p12",
    .port_names[4] = "p13",
    .port_names[5] = "p14",
    .port_names[6] = "p15",
    .port_names[7] = "p16",
    .port_names[10] = "dsa",
    .rtable = (s8 []){ 10, -1, },
    },
    },

    static struct dsa_platform_data pd = {
    .netdev = &foo,
    .nr_switches = 2,
    .sw = sw,
    };

    Signed-off-by: Lennert Buytenhek
    Tested-by: Gary Thomas
    Signed-off-by: David S. Miller

    Lennert Buytenhek
     

09 Oct, 2008

3 commits

  • 396138f03   dsa: add support for Trailer tagging format ... Browse Code »

    This adds support for the Trailer switch tagging format. This is
    another tagging that doesn't explicitly mark tagged packets with a
    distinct ethertype, so that we need to add a similar hack in the
    receive path as for the Original DSA tagging format.

    Signed-off-by: Lennert Buytenhek
    Tested-by: Byron Bradley
    Tested-by: Tim Ellis
    Signed-off-by: David S. Miller

    Lennert Buytenhek
     
  • cf85d08fd   dsa: add support for original DSA tagging format ... Browse Code »

    Most of the DSA switches currently in the field do not support the
    Ethertype DSA tagging format that one of the previous patches added
    support for, but only the original DSA tagging format.

    The original DSA tagging format carries the same information as the
    Ethertype DSA tagging format, but with the difference that it does not
    have an ethertype field. In other words, when receiving a packet that
    is tagged with an original DSA tag, there is no way of telling in
    eth_type_trans() that this packet is in fact a DSA-tagged packet.

    This patch adds a hook into eth_type_trans() which is only compiled in
    if support for a switch chip that doesn't support Ethertype DSA is
    selected, and which checks whether there is a DSA switch driver
    instance attached to this network device which uses the old tag format.
    If so, it sets the protocol field to ETH_P_DSA without looking at the
    packet, so that the packet ends up in the right place.

    Signed-off-by: Lennert Buytenhek
    Tested-by: Nicolas Pitre
    Tested-by: Peter van Valderen
    Tested-by: Dirk Teurlings
    Signed-off-by: David S. Miller

    Lennert Buytenhek
     
  • 91da11f87   net: Distributed Switch Architecture protocol support ... Browse Code »

    Distributed Switch Architecture is a protocol for managing hardware
    switch chips. It consists of a set of MII management registers and
    commands to configure the switch, and an ethernet header format to
    signal which of the ports of the switch a packet was received from
    or is intended to be sent to.

    The switches that this driver supports are typically embedded in
    access points and routers, and a typical setup with a DSA switch
    looks something like this:

    +-----------+ +-----------+
    | | RGMII | |
    | +-------+ +------ 1000baseT MDI ("WAN")
    | | | 6-port +------ 1000baseT MDI ("LAN1")
    | CPU | | ethernet +------ 1000baseT MDI ("LAN2")
    | |MIImgmt| switch +------ 1000baseT MDI ("LAN3")
    | +-------+ w/5 PHYs +------ 1000baseT MDI ("LAN4")
    | | | |
    +-----------+ +-----------+

    The switch driver presents each port on the switch as a separate
    network interface to Linux, polls the switch to maintain software
    link state of those ports, forwards MII management interface
    accesses to those network interfaces (e.g. as done by ethtool) to
    the switch, and exposes the switch's hardware statistics counters
    via the appropriate Linux kernel interfaces.

    This initial patch supports the MII management interface register
    layout of the Marvell 88E6123, 88E6161 and 88E6165 switch chips, and
    supports the "Ethertype DSA" packet tagging format.

    (There is no officially registered ethertype for the Ethertype DSA
    packet format, so we just grab a random one. The ethertype to use
    is programmed into the switch, and the switch driver uses the value
    of ETH_P_EDSA for this, so this define can be changed at any time in
    the future if the one we chose is allocated to another protocol or
    if Ethertype DSA gets its own officially registered ethertype, and
    everything will continue to work.)

    Signed-off-by: Lennert Buytenhek
    Tested-by: Nicolas Pitre
    Tested-by: Byron Bradley
    Tested-by: Tim Ellis
    Tested-by: Peter van Valderen
    Tested-by: Dirk Teurlings
    Signed-off-by: David S. Miller

    Lennert Buytenhek