22 Feb, 2011

13 commits

  • …git/kgene/linux-samsung

    * 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
    ARM: S5PV210: Fix regulator names
    ARM: S5PV210: Update max8998_platform_data
    ARM: SAMSUNG: Drop exporting s3c24xx_ts_set_platdata
    ARM: S5P: Fix end address in memory resource information for UART devices
    ARM: S5P64X0: Cleanup map.h file
    ARM: S5P6442: Cleanup map.h file
    ARM: S5PC100: Clenaup map.h file
    ARM: S5PV210: Cleanup map.h file
    ARM: S5PV310: Cleanup map.h file

    Linus Torvalds
     
  • * 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm:
    ARM: 6745/1: kprobes insn decoding fix
    ARM: tlb: move noMMU tlb_flush() to asm/tlb.h
    ARM: tlb: delay page freeing for SMP and ARMv7 CPUs
    ARM: Keep exit text/data around for SMP_ON_UP
    ARM: Ensure predictable endian state on signal handler entry
    ARM: 6740/1: Place correctly notes section in the linker script
    ARM: 6700/1: SPEAr: Correct SOC config base address for spear320
    ARM: 6722/1: SPEAr: sp810: switch to slow mode before reset
    ARM: 6712/1: SPEAr: replace readl(), writel() with relaxed versions in uncompress.h
    ARM: 6720/1: SPEAr: Append UL to VMALLOC_END
    ARM: 6676/1: Correct the cpu_architecture() function for ARMv7
    ARM: 6739/1: update .gitignore for boot/compressed
    ARM: 6743/1: errata: interrupted ICALLUIS may prevent completion of broadcasted operation
    ARM: 6742/1: pmu: avoid setting IRQ affinity on UP systems
    ARM: 6741/1: errata: pl310 cache sync operation may be faulty

    Linus Torvalds
     
  • * 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6:
    [S390] net: provide architecture specific NET_SKB_PAD
    [S390] atomic: use inline asm
    [S390] correct ipl parameter block safe guard
    [S390] atomic: use ACCESS_ONCE() for atomic_read()
    [S390] dasd: correct device table

    Linus Torvalds
     
  • Marcin Slusarz says:

    > In arch/arm/kernel/kprobes-decode.c there's a function
    > arm_kprobe_decode_insn which does:
    >
    > } else if ((insn & 0x0e000000) == 0x0c400000) {
    > ...
    >
    > This is always false, so code below is dead.
    > I found this bug by coccinelle (http://coccinelle.lip6.fr/).

    Reported-by: Marcin Slusarz
    Signed-off-by: Nicolas Pitre
    Signed-off-by: Russell King

    Nicolas Pitre
     
  • There's no need to noMMU to put tlb_flush() in asm/tlbflush.h - it's
    part of the tlb shootdown interface. Move it to asm/tlb.h instead, as
    per x86.

    Signed-off-by: Russell King

    Russell King
     
  • We need to delay freeing any mapped page on SMP and ARMv7 systems to
    ensure that the data is not accessed by other CPUs, or is used for
    speculative prefetch with ARMv7. This includes not only mapped pages
    but also pages used for the page tables themselves.

    This avoids races with the MMU/other CPUs accessing pages after they've
    been freed but before we've invalidated the TLB.

    Signed-off-by: Russell King

    Russell King
     
  • When SMP_ON_UP is used and the spinlocks are inlined, we end up with
    inline spinlocks in the exit code, with references from the SMP
    alternatives section to the exit sections. This causes link time
    errors. Avoid this by placing the exit sections in the init-discarded
    region.

    Cc:
    Tested-by: Dave Martin
    Signed-off-by: Russell King

    Russell King
     
  • Ensure a predictable endian state when entering signal handlers. This
    avoids programs which use SETEND to momentarily switch their endian
    state from having their signal handlers entered with an unpredictable
    endian state.

    Cc:
    Acked-by: Dave Martin
    Signed-off-by: Russell King

    Russell King
     
  • Commit 18991197b4b588255ccabf472ebc84db7b66a19c added --build-id
    linker option when toolchain supports it. ARM one does, but for some
    reason places the section at 0 when linker script doesn't mention it
    explicitly.

    The 1e621a8e3752367d4aae78a8ab00a18fb2793f34 worked around the problem
    removing this section from binary image with explicit objcopy options,
    but it still exists in vmlinux, confusing tools like debuggers and perf.

    This problem was discussed here:
    http://lists.infradead.org/pipermail/linux-arm-kernel/2010-May/015994.html
    http://lists.infradead.org/pipermail/linux-arm-kernel/2010-May/015994.html
    but the proposed changes to the linker script were substantial.

    This patch simply places NOTES (36 bytes long, at least when compiled
    with CodeSourcery toolchain) between data and bss, which seem to be
    the right place (and suggested by the sample linker script in
    include/asm-generic/vmlinux.lds.h).

    It is enough to place it correctly in vmlinux (so debuggers are happy):

    Section Headers:
    [11] .data PROGBITS c07ce000 7ce000 020fc0 00 WA 0 0 32
    [12] .notes NOTE c07eefc0 7eefc0 000024 00 AX 0 0 4
    [13] .bss NOBITS c07ef000 7eefe4 01e628 00 WA 0 0 32
    Program Headers:
    LOAD 0x008000 0xc0008000 0xc0008000 0x7e6fe4 0x805628 RWE 0x8000
    NOTE 0x7eefc0 0xc07eefc0 0xc07eefc0 0x00024 0x00024 R E 0x4
    Section to Segment mapping:
    Segment Sections...
    00 .data .notes .bss
    01 .notes

    and to get it exposed as /sys/kernel/notes used by perf tools.

    Signed-off-by: Pawel Moll
    Signed-off-by: Russell King

    Pawel Moll
     
  • SPEAR320_SOC_CONFIG_BASE was wrong, causing the wrong registers to be
    accessed.

    Reviewed-by: Stanley Miao
    Signed-off-by: Viresh Kumar
    Signed-off-by: Russell King

    viresh kumar
     
  • In sysctl_soft_reset(), switch to slow mode before resetting the system
    via the system controller. This is required.

    Reviewed-by: Stanley Miao
    Signed-off-by: Shiraz Hashim
    Signed-off-by: Russell King

    Shiraz Hashim
     
  • readl() and writel() calls the outer cache maintainance operations
    which are not available during Linux uncompression. This patch replaces
    readl() and writel() with readl_relaxed() and writel_relaxed() to avoid
    the link time errors.

    Reviewed-by: Stanley Miao
    Signed-off-by: Viresh Kumar
    Signed-off-by: Russell King

    viresh kumar
     
  • This patch fixes following warning:
    arch/arm/mm/init.c:606: warning: format '%08lx' expects type 'long unsigned int', but argument 12 has type 'unsigned int'

    by appending UL to VMALLOC_END's Number.

    Reviewed-by: Stanley Miao
    Signed-off-by: Viresh Kumar
    Signed-off-by: Russell King

    viresh kumar
     

19 Feb, 2011

5 commits

  • If ID_MMFR0[3:0] >= 3, the architecture version is ARMv7. The code was
    currently only testing for ID_MMFR0[3:0] == 3.

    Signed-off-by: Catalin Marinas
    Signed-off-by: Russell King

    Catalin Marinas
     
  • Signed-off-by: Nicolas Pitre
    Signed-off-by: Russell King

    Nicolas Pitre
     
  • On versions of the Cortex-A9 prior to r3p0, an interrupted ICIALLUIS
    operation may prevent the completion of a following broadcasted
    operation if the second operation is received by a CPU before the
    ICIALLUIS has completed, potentially leading to corrupted entries in
    the cache or TLB.

    This workaround sets a bit in the diagnostic register of the Cortex-A9,
    causing CP15 maintenance operations to be uninterruptible.

    Acked-by: Catalin Marinas
    Signed-off-by: Will Deacon
    Signed-off-by: Russell King

    Will Deacon
     
  • Now that we can execute a CONFIG_SMP kernel on a uniprocessor system,
    extra care has to be taken in the PMU IRQ affinity setting code to
    ensure that we don't always fail to initialise.

    This patch changes the CPU PMU initialisation code so that when we
    only have a single IRQ, whose affinity can not be changed at the
    controller, we report success (0) rather than -EINVAL.

    Reported-by: Avik Sil
    Acked-by: Jamie Iles
    Signed-off-by: Will Deacon
    Signed-off-by: Russell King

    Will Deacon
     
  • The effect of cache sync operation is to drain the store buffer and
    wait for all internal buffers to be empty. In normal conditions, store
    buffer is able to merge the normal memory writes within its 32-byte
    data buffers. Due to this erratum present in r3p0, the effect of cache
    sync operation on the store buffer still remains when the operation
    completes. This means that the store buffer is always asked to drain
    and this prevents it from merging any further writes.

    This can severely affect performance on the write traffic esp. on
    Normal memory NC one.

    The proposed workaround is to replace the normal offset of cache sync
    operation(0x730) by another offset targeting an unmapped PL310
    register 0x740.

    Signed-off-by: srinidhi kasagar
    Acked-by: Linus Walleij
    Acked-by: Catalin Marinas
    Signed-off-by: Russell King

    Srinidhi Kasagar
     

18 Feb, 2011

4 commits

  • Since commit 1130e5b3ff4 regulators are exported to debugfs. The names
    of the regulators that contains slash ('/') causes an ops during kernel
    boot. This patch fixes this issue.

    Signed-off-by: Marek Szyprowski
    Signed-off-by: Kyungmin Park
    Signed-off-by: Kukjin Kim

    Marek Szyprowski
     
  • Max8998 PMIC driver's platform data has been changed once again in
    commit 735a3d9efdc. This patch fixes build break caused by that commit.

    Signed-off-by: Marek Szyprowski
    Signed-off-by: Kyungmin Park
    Signed-off-by: Kukjin Kim

    Marek Szyprowski
     
  • s3c24xx_ts_set_platdata is annotated __init and not used by any module,
    thus don't export it.

    This patch fixes below warning:

    WARNING: arch/arm/plat-samsung/built-in.o(__ksymtab+0x90): Section mismatch
    in reference from the variable __ksymtab_s3c24xx_ts_set_platdata to the
    function .init.text:s3c24xx_ts_set_platdata()

    The symbol s3c24xx_ts_set_platdata is exported and annotated __init
    Fix this by removing the __init annotation of s3c24xx_ts_set_platdata
    or drop the export.

    Signed-off-by: Axel Lin
    Signed-off-by: Kukjin Kim

    Axel Lin
     
  • * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
    sparc64: Fix NMI startup bug which also breaks perf.
    sparc: fix size argument to find_next_zero_bit()
    sparc: use bitmap_set()
    sparc32: unaligned memory access (MNA) trap handler bug

    Linus Torvalds
     

17 Feb, 2011

11 commits


16 Feb, 2011

7 commits

  • * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu:
    m68knommu: set flow handler for secondary interrupt controller of 5249
    m68knommu: remove use of IRQ_FLG_LOCK from 68360 platform support
    m68knommu: fix dereference of port.tty
    m68knommu: add missing linker __modver section
    m68knommu: fix mis-named variable int set_irq_chip loop
    m68knommu: add optimize memmove() function
    m68k: remove arch specific non-optimized memcmp()
    m68knommu: fix use of un-defined _TIF_WORK_MASK
    m68knommu: Rename m548x_wdt.c to m54xx_wdt.c
    m68knommu: fix m548x_wdt.c compilation after headers renaming
    m68knommu: Remove dependencies on nonexistent M68KNOMMU

    Linus Torvalds
     
  • The secondary interrupt controller of the ColdFire 5249 code is not
    setting the edge triggered flow handler. Set it.

    Signed-off-by: Greg Ungerer

    Greg Ungerer
     
  • The m68knommu arch does not define or use IRQ_FLG_LOCK in its irq
    subsystem. Remove obsolete use of it.

    Signed-off-by: Greg Ungerer

    Greg Ungerer
     
  • Add missing linker section __modver to fix:

    LD vmlinux
    /usr/local/bin/../m68k-uclinux/bin/ld.real: error: no memory region specified for loadable section `__modver'

    Signed-off-by: Greg Ungerer

    Greg Ungerer
     
  • Compiling for 68360 targets gives:

    CC arch/m68knommu/platform/68360/ints.o
    arch/m68knommu/platform/68360/ints.c: In function ‘init_IRQ’:
    arch/m68knommu/platform/68360/ints.c:135:16: error: ‘irq’ undeclared (first use in this function)
    arch/m68knommu/platform/68360/ints.c:135:16: note: each undeclared identifier is reported only once for each function it appears in

    Fix variable name used.

    Signed-off-by: Greg Ungerer

    Greg Ungerer
     
  • Add an m68k/coldfire optimized memmove() function for the m68knommu arch.
    This is the same function as used by m68k. Simple speed tests show this
    is faster once buffers are larger than 4 bytes, and significantly faster
    on much larger buffers (4 times faster above about 100 bytes).

    This also goes part of the way to fixing a regression caused by commit
    ea61bc461d09e8d331a307916530aaae808c72a2 ("m68k/m68knommu: merge MMU and
    non-MMU string.h"), which breaks non-coldfire non-mmu builds (which is
    the 68x328 and 68360 families). They currently have no memmove() fucntion
    defined, since there was none in the m68knommu/lib functions.

    Signed-off-by: Greg Ungerer

    Greg Ungerer
     
  • The m68k arch implements its own memcmp() function. It is not optimized
    in any way (it is the most strait forward coding of memcmp you can get).
    Remove it and use the kernels standard memcmp() implementation.

    This also goes part of the way to fixing a regression caused by commit
    ea61bc461d09e8d331a307916530aaae808c72a2 ("m68k/m68knommu: merge MMU and
    non-MMU string.h"), which breaks non-coldfire non-mmu builds (which is
    the 68x328 and 68360 families). They currently have no memcmp() function
    defined, since there is none in the m68knommu/lib functions.

    Signed-off-by: Greg Ungerer
    Acked-by: Geert Uytterhoeven

    Greg Ungerer