09 Oct, 2014
1 commit
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Pull irq updates from Thomas Gleixner:
"The irq departement delivers:- a cleanup series to get rid of mindlessly copied code.
- another bunch of new pointlessly different interrupt chip drivers.
Adding homebrewn irq chips (and timers) to SoCs must provide a
value add which is beyond the imagination of mere mortals.- the usual SoC irq controller updates, IOW my second cat herding
project"* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (44 commits)
irqchip: gic-v3: Implement CPU PM notifier
irqchip: gic-v3: Refactor gic_enable_redist to support both enabling and disabling
irqchip: renesas-intc-irqpin: Add minimal runtime PM support
irqchip: renesas-intc-irqpin: Add helper variable dev = &pdev->dev
irqchip: atmel-aic5: Add sama5d4 support
irqchip: atmel-aic5: The sama5d3 has 48 IRQs
Documentation: bcm7120-l2: Add Broadcom BCM7120-style L2 binding
irqchip: bcm7120-l2: Add Broadcom BCM7120-style Level 2 interrupt controller
irqchip: renesas-irqc: Add binding docs for new R-Car Gen2 SoCs
irqchip: renesas-irqc: Add DT binding documentation
irqchip: renesas-intc-irqpin: Document SoC-specific bindings
openrisc: Get rid of handle_IRQ
arm64: Get rid of handle_IRQ
ARM: omap2: irq: Convert to handle_domain_irq
ARM: imx: tzic: Convert to handle_domain_irq
ARM: imx: avic: Convert to handle_domain_irq
irqchip: or1k-pic: Convert to handle_domain_irq
irqchip: atmel-aic5: Convert to handle_domain_irq
irqchip: atmel-aic: Convert to handle_domain_irq
irqchip: gic-v3: Convert to handle_domain_irq
...
17 Sep, 2014
8 commits
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no fuctional changes.
Acked-by: Jason Cooper
Signed-off-by: Felipe Balbi
Signed-off-by: Tony Lindgren -
maximum number of MIR register is 4, rather than 3.
Fix that.Acked-by: Jason Cooper
Signed-off-by: Felipe Balbi
Signed-off-by: Tony Lindgren -
When TURBO bit is set in the INTC_IDLE register,
the input synchronizer clock will be autogated
based on activity on the INTC.Because this idle mode increases the interrupt
latency by 2 clock cycles, we're only enabling
it during suspend.Acked-by: Jason Cooper
Signed-off-by: Felipe Balbi
Signed-off-by: Tony Lindgren -
When PROTECTION bit in enabled in PROTECTION
register, INTC's registers are only accessible
from privileged mode.Acked-by: Jason Cooper
Signed-off-by: Felipe Balbi
Signed-off-by: Tony Lindgren -
of_iomap(), which is called from omap_init_irq_of(),
already takes care of making sure we have a valid
resource to deal with. Because of that, we can
safely remove our explicit call to of_address_to_resource().Acked-by: Jason Cooper
Signed-off-by: Felipe Balbi
Signed-off-by: Tony Lindgren -
no functional changes, just making sure comment
follows Coding Style.Acked-by: Jason Cooper
Signed-off-by: Felipe Balbi
Signed-off-by: Tony Lindgren -
We already hold the number of Pending registers
in omap_nr_pending. Let's use that instead.Acked-by: Jason Cooper
Signed-off-by: Felipe Balbi
Signed-off-by: Tony Lindgren -
Just move the code over as it has no dependencies
on arch/arm/ anymore.Signed-off-by: Felipe Balbi
Signed-off-by: Tony Lindgren
