06 Jan, 2015

1 commit

  • 64KiB is allocated for qspi dtb partition which is not
    sufficient, so updating the partition table size to 512KiB
    for device tree partition.

    This also aligns the QSPI partition definitions between
    kernel and U-Boot.

    Fixes: dc2dd5b8 ("ARM: dts: dra7: Add qspi device")

    Signed-off-by: Mugunthan V N
    Signed-off-by: Tony Lindgren

    Mugunthan V N
     

11 Dec, 2014

2 commits

  • As per the latest Data Manual, for newer samples,
    the nominal voltage required for VDD_CORE at OPP_NOM can be
    upto 1.06V which was 1.03V earlier.

    Update the regulator max voltage constraint for SMPS7,
    connected to VDD_CORE, to meet this requirement.

    Document reference:
    DRA74 Data Manual, SPRS857M - Dec 2012, Revised Oct 2014.
    DRA72 Data Manual, SPRS906G - Dec 2012, revised Oct 2014.

    Signed-off-by: Ravikumar Kattekola
    Acked-by: Nishanth Menon
    Signed-off-by: Tony Lindgren

    Ravikumar Kattekola
     
  • The max expected voltage for VDD_GPU, connected to SMPS6, is 1.25V.
    Correct regulator max voltage constraint to meet this requirement.

    Document reference: DRA74 Data Manual, SPRS857M - Dec 2012,
    Revised Oct 2014.

    Fixes: c56a831ca47e ("ARM: dts: DRA7: Add TPS659038 PMIC nodes")

    Signed-off-by: Ravikumar Kattekola
    Acked-by: Nishanth Menon
    Signed-off-by: Tony Lindgren

    Ravikumar Kattekola
     

24 Nov, 2014

1 commit

  • The board has 2 CAN ports but only the first one can be used.
    Enable the first CAN port.

    WAKEUP0 pin doesn't have INPUT enable bit so we just disable
    weak PULLs.

    The second CAN port cannot be used without hardware modification
    so we don't enable the second port.

    Signed-off-by: Roger Quadros
    Signed-off-by: Tony Lindgren

    Roger Quadros
     

11 Nov, 2014

2 commits

  • DRA7 Data Manual (SPRS857L - August 2014) section 4.1.1 states: "All
    unused power supply balls must be supplied with the voltages specified
    in the Section 5.2, Recommended Operating Conditions".

    This implies that all unused voltage rails for Vayu can never be
    switched off even if the hardware blocks inside that voltage domain is
    unused. Switching off these unused rails may result in stability issues
    on other domains and increased leakage and power-on-hour impacts.

    J6eco-evm dts file already considers this, however j6evm-dts file needs
    to be fixed to consider this constraint of the SoC.

    Signed-off-by: Nishanth Menon
    Acked-by: Roger Quadros
    Signed-off-by: Tony Lindgren

    Nishanth Menon
     
  • Adding CPSW phy-id, CPSW and MDIO pinmux configuration for active and
    sleep states and enable them in board evm dts file.

    Signed-off-by: Mugunthan V N
    Signed-off-by: Tony Lindgren

    Mugunthan V N
     

09 Oct, 2014

1 commit

  • Pull ARM SoC DT updates from Arnd Bergmann:
    "As usual, this is the largest branch, though this time a little under
    half of the total changes with 307 individual non-merge changesets.

    The largest changes are the addition of new machines, in particular
    the Tegra based Chromebook, the Renesas r8a7794 SoC, and DT support
    for the old i.MX1 platform.

    Other changes include
    - at91: various sam9 and sama5 updates
    - exynos: much extended Peach Pi/Pit (Chromebook 2) support
    - keystone: new peripherals
    - meson: added DT for meson6 SoC
    - mvebu: new device support for Armada 370/375
    - qcom: improved support for IPQ8064 and MSM8x60
    - rockchip: much improved support for rk3288
    - shmobile: lots of updates all over the place
    - sunxi: dts license change
    - sunxi: more a23 device support
    - vexpress: CLCD DT description"

    * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (308 commits)
    ARM: DTS: meson: update DTSI to add watchdog node
    ARM: dts: keystone-k2l: fix mdio io start address
    ARM: dts: keystone-k2e: fix mdio io start address
    ARM: dts: keystone-k2e: update usb1 node for dma properties
    ARM: dts: keystone: fix io range for usb_phy0
    Revert "Merge tag 'hix5hd2-dt-for-3.18' of git://github.com/hisilicon/linux-hisi into next/dt"
    Revert "ARM: dts: hix5hd2: add wdg node"
    ARM: dts: add rk3288 i2s controller
    ARM: vexpress: Add CLCD Device Tree properties
    ARM: bcm2835: add I2S pinctrl to device tree
    ARM: meson: documentation: add bindings documentation
    ARM: meson: dts: add basic Meson/Meson6/Meson6-atv1200 DTSI/DTS
    ARM: dts: mt6589: Change compatible string for GIC
    ARM: dts: mediatek: Add compatible property for aquaris5
    ARM: dts: mt6589-aquaris5: Add boot argument earlyprintk
    ARM: dts: mt6589: Fix typo in GIC unit address
    ARM: dts: Build dtb for Mediatek board
    ARM: dts: keystone: fix bindings for pcie and usb clock nodes
    ARM: dts: keystone: k2l: Fix chip selects for SPI devices
    ARM: dts: keystone: add dsp gpio controllers nodes
    ...

    Linus Torvalds
     

10 Sep, 2014

1 commit

  • The nand timings were scaled down by 2 to account for
    the 2x rate returned by clk_get_rate(gpmc_fclk).

    As the clock data got fixed by [1], revert back to actual
    timings (i.e. scale them up by 2).

    Without this NAND doesn't work on dra7-evm.

    [1] - commit dd94324b983afe114ba9e7ee3649313b451f63ce
    ARM: dts: dra7xx-clocks: Fix the l3 and l4 clock rates

    Fixes: ff66a3c86e00 ("ARM: dts: dra7: add support for parallel NAND flash")
    Cc: [3.16]
    Signed-off-by: Roger Quadros
    Signed-off-by: Tony Lindgren

    Roger Quadros
     

09 Sep, 2014

1 commit


05 Sep, 2014

2 commits

  • DRA7 evm REV G and later boards uses a vtt regulator for DDR3
    termination and this is controlled by gpio7_11. This gpio is
    configured in boot loader. gpio7_11, which is only available only on
    Pad A22, in previous boards, is connected only to an unused pad on
    expansion connector EXP_P3 and is safe to be muxed as GPIO on all
    DRA7-evm versions (without a need to spin off another dts file).

    Since gpio7_11 is used to control VTT and should not be reset or kept
    in idle state during boot up else VTT will be disconnected and DDR
    gets corrupted. So, as part of this change, mark gpio7 as no-reset and
    no-idle on init.

    Signed-off-by: Lokesh Vutla
    Signed-off-by: Nishanth Menon
    Signed-off-by: Tony Lindgren

    Lokesh Vutla
     
  • While auditing the various pin ctrl configurations using the following
    command:
    grep PIN_ arch/arm/boot/dts/dra7-evm.dts|(while read line;
    do
    v=`echo "$line" | sed -e "s/\s\s*/|/g" | cut -d '|' -f1 |
    cut -d 'x' -f2|tr [a-z] [A-Z]`;
    HEX=`echo "obase=16;ibase=16;4A003400+$v"| bc`;
    echo "$HEX ===> $line";
    done)
    against DRA75x/74x NDA TRM revision S(SPRUHI2S August 2014),
    documentation errors were found for spi1 pinctrl. Fix the same.

    Fixes: 6e58b8f1daaf1af ("ARM: dts: DRA7: Add the dts files for dra7 SoC and dra7-evm board")
    Signed-off-by: Nishanth Menon
    Signed-off-by: Tony Lindgren

    Nishanth Menon
     

04 Sep, 2014

2 commits


20 Jul, 2014

1 commit


09 Jul, 2014

1 commit


07 Jul, 2014

1 commit

  • After clarification from the hardware team it was found that
    this 1.8V PHY supply can't be switched OFF when SoC is Active.

    Since the PHY IPs don't contain isolation logic built in the design to
    allow the power rail to be switched off, there is a very high risk
    of IP reliability and additional leakage paths which can result in
    additional power consumption.

    The only scenario where this rail can be switched off is part of Power on
    reset sequencing, but it needs to be kept always-on during operation.

    This patch is required for proper functionality of USB, SATA
    and PCIe on DRA7-evm.

    CC: Rajendra Nayak
    CC: Tero Kristo
    Signed-off-by: Roger Quadros
    Signed-off-by: Tony Lindgren

    Roger Quadros
     

20 May, 2014

1 commit

  • DRA7xx platform has in-build GPMC and ELM h/w engines which can be used
    for accessing externel NAND flash device. This patch:
    - adds generic DT binding in dra7.dtsi for enabling GPMC and ELM h/w engines
    - adds DT binding for Micron NAND Flash (MT29F2G16AADWP) present on dra7-evm
    *Important*
    On DRA7 EVM, GPMC_WPN and NAND_BOOTn are controlled by DIP switch
    So following board settings are required for NAND device detection:
    SW5.9 (GPMC_WPN) = LOW
    SW5.1 (NAND_BOOTn) = HIGH

    Signed-off-by: Minal Shah
    Signed-off-by: Pekon Gupta
    Reviewed-by: Javier Martinez Canillas
    Signed-off-by: Tony Lindgren

    Minal Shah
     

15 May, 2014

1 commit


07 May, 2014

3 commits


22 Oct, 2013

1 commit


12 Oct, 2013

3 commits

  • Add mmc2 dt node to dra7-evm board
    and model eMMC vcc as fixed regulator.

    Signed-off-by: Balaji T K
    Acked-by: Sekhar Nori
    Signed-off-by: Benoit Cousson

    Balaji T K
     
  • Add mmc1 dt node to dra7-evm board.
    Input for ldo1 regulator is controlled by gpio 5 of pcf8575 chip (0x21)
    on i2c1 bus. When dt support for gpio-pcf857x is available, input supply
    will be modelled as cascaded regulator.

    Signed-off-by: Balaji T K
    Acked-by: Sekhar Nori
    Signed-off-by: Benoit Cousson

    Balaji T K
     
  • Add DT nodes for TPS659038 PMIC on DRA7 boards.

    It is based on top of:
    http://comments.gmane.org/gmane.linux.ports.arm.omap/102459.

    Documentation:
    - Documentation/devicetree/bindings/mfd/palmas.txt
    - Documentation/devicetree/bindings/regulator/palmas-pmic.txt

    Boot Tested on DRA7 d1 Board.

    Signed-off-by: Keerthy
    Acked-by: Nishanth Menon
    [bcousson@baylibre.com: Fix indentation and changelog]
    Signed-off-by: Benoit Cousson

    Keerthy
     

08 Oct, 2013

1 commit

  • Add minimal device tree source needed for DRA7 based SoCs.
    Also add a board dts file for the dra7-evm (based on dra752)
    which contains 1.5G of memory with 1G interleaved and 512MB
    non-interleaved. Also added in the board file are pin configuration
    details for i2c, mcspi and uart devices on board.

    Signed-off-by: R Sricharan
    Signed-off-by: Rajendra Nayak
    Signed-off-by: Sourav Poddar
    Signed-off-by: Benoit Cousson

    R Sricharan