09 Oct, 2015
2 commits
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…nel/platform-linux-feature-tree into ti-linux-4.1.y
TI-Feature: platform_base
TI-Tree: git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree.git
TI-Branch: platform-ti-linux-4.1.y* 'platform-ti-linux-4.1.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree:
dmaengine: edma: Optimize memcpy operation
dmaengine: edma: Remove alignment constraint for memcpy
ARM: cmpxchg: avoid warnings from macro-ized cmpxchg() implementations
ARM: dts: omap5-uevm: Add Uart wakeup interrupt
ARM: dts: omap5-uevm.dts: fix i2c5 pinctrl offsets
PM / Runtime: Update last_busy in rpm_resume
ARM: dts: keystone: Update SoC specific compatible flags
ARM: keystone: Update compatible to have SoC specific matches
Documentation: dt: keystone: provide SoC specific compatible flags
ARM: 8422/1: enable imprecise aborts during early kernel startup
ti_config_fragments/baseport.cfg: Support RamdiskSigned-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
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commit fa46296bf5ebfed8a24dc1ba5d617ede599771e4 upstream.
Update the compatible flags to allow specific SoC identification.
Signed-off-by: Nishanth Menon
Signed-off-by: Santosh Shilimkar
01 Oct, 2015
1 commit
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commit 85ad3deea4525504355560649be7a41348111a60 upstream.
Currently mdio bindings are defined in keystone.dtsi and this results
in incorrect unit address for the node on K2E and K2L SoCs. Fix this
by moving them to SoC specific DTS file.Signed-off-by: Murali Karicheri
Signed-off-by: Sekhar Nori
24 Jul, 2015
2 commits
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commit 8b4769cc535adf9dd4ae5d82725ca1de254f007c upstream.
Now that PCIe DT binding is disabled in SoC specific DTS,
we need a way to override it in a board specific DTS. So
rename the PCIe nodes accordingly.Signed-off-by: Murali Karicheri
Signed-off-by: Santosh Shilimkar
Signed-off-by: Sekhar Nori -
commit 9dd4f28f361df401f738927963af015134f23a1c upstream.
Currently PCIe DT bindings are broken. PCIe driver can't function
without having a SerDes driver that provide the phy configuration.
On K2E EVM, this causes problem since the EVM has Marvell SATA
controller present and with default values in the SerDes register,
it seems to pass the PCIe link check, but causes issues since
the configuration is not correct. The manifestation is that when
EVM is booted with NFS rootfs, the boot hangs. We shouldn't enable
PCIe on this EVM since to work, SerDes driver has to be present as
well. So by default, the PCIe DT binding should be disabled in SoC
specific DTS. It can be enabled in the board specific DTS when the
SerDes device driver is also present.So fix the status of PCIe DT bindings in the SoC specific DTS to
"disabled". To enable PCIe, the status should be set to "ok" in
the EVM DTS file when SerDes driver support becomes available in
the upstream tree.Signed-off-by: Murali Karicheri
Signed-off-by: Santosh Shilimkar
Signed-off-by: Sekhar Nori
18 Jul, 2015
1 commit
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This add DT bindings for PCI SerDes Phy for port 1 available on K2E
SoCs.Signed-off-by: Murali Karicheri
Signed-off-by: Sekhar Nori
02 Jul, 2015
1 commit
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commit cb4c81706fd373e498f6f41a3f7d67a490035d40 upstream.
This patch enables networking on k2e evm by adding device
bindings for netcp, knav and qmss. See device binding
documentation below for details.Documentation/devicetree/bindings/net/keystone-netcp.txt
Signed-off-by: WingMan Kwok
Signed-off-by: Murali Karicheri
Signed-off-by: Santosh Shilimkar
Signed-off-by: Murali Karicheri
Signed-off-by: Sekhar Nori
05 Nov, 2014
1 commit
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K2E SoC has a second PCI port based on Synopsis Designware PCIe h/w.
Add DT bindings to support PCI controller for port 1 for this SoC.Signed-off-by: Murali Karicheri
Signed-off-by: Santosh Shilimkar
01 Oct, 2014
2 commits
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The K2E MDIO io space has different start address.
Hence, fix it to be 0x24200f00 according to TRM.Signed-off-by: Grygorii Strashko
Signed-off-by: Santosh Shilimkar -
Keystone supports dma-coherent on USB master and also needs
dma-ranges to specify the hardware alias memory range in which DMA
can be operational.
Such configuration applied for USB0 devices, but It's missed for
USB1 device which is present only in K2E SoC - hence apply it.Signed-off-by: Grygorii Strashko
Signed-off-by: Santosh Shilimkar
23 Sep, 2014
1 commit
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Add Keystone 2 DSP GPIO nodes for SoCs:
k2hk:
DSP GPIO banks 0-7 correspond to DSP0-DSP7
k2l:
DSP GPIO banks 0-3 correspond to DSP0-DSP3
k2e:
DSP GPIO bank 0 corresponds to DSP0Signed-off-by: Grygorii Strashko
Signed-off-by: Santosh Shilimkar
26 Feb, 2014
1 commit
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Keystone2 Edison (K2E) is a Quad Cortex A15 based SoC with
1 DSP. It has standard peripherals such as i2c, spi, uart, timer,
pcie, etc similar to k2hk, but without wireless hardwares. This
patch add support for k2 Edison SoC and EVM. This re-uses the common
keystone.dtsi to include common bindings across the various k2
devices.Signed-off-by: Murali Karicheri
Signed-off-by: Santosh Shilimkar