Eric Lee / smarc-ti-linux-kernel

09 Oct, 2015

2 commits

  • 8c5c15b02   Merge branch 'platform-ti-linux-4.1.y' of git://git.ti.com/~rrnayak/ti-linux-ker… ... Browse Code »

    …nel/platform-linux-feature-tree into ti-linux-4.1.y

    TI-Feature: platform_base
    TI-Tree: git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree.git
    TI-Branch: platform-ti-linux-4.1.y

    * 'platform-ti-linux-4.1.y' of git://git.ti.com/~rrnayak/ti-linux-kernel/platform-linux-feature-tree:
    dmaengine: edma: Optimize memcpy operation
    dmaengine: edma: Remove alignment constraint for memcpy
    ARM: cmpxchg: avoid warnings from macro-ized cmpxchg() implementations
    ARM: dts: omap5-uevm: Add Uart wakeup interrupt
    ARM: dts: omap5-uevm.dts: fix i2c5 pinctrl offsets
    PM / Runtime: Update last_busy in rpm_resume
    ARM: dts: keystone: Update SoC specific compatible flags
    ARM: keystone: Update compatible to have SoC specific matches
    Documentation: dt: keystone: provide SoC specific compatible flags
    ARM: 8422/1: enable imprecise aborts during early kernel startup
    ti_config_fragments/baseport.cfg: Support Ramdisk

    Signed-off-by: Texas Instruments Auto Merger <lcpd_integration@list.ti.com>

    Texas Instruments Auto Merger
     
  • de7f9ad12   ARM: dts: keystone: Update SoC specific compatible flags ... Browse Code »

    commit fa46296bf5ebfed8a24dc1ba5d617ede599771e4 upstream.

    Update the compatible flags to allow specific SoC identification.

    Signed-off-by: Nishanth Menon
    Signed-off-by: Santosh Shilimkar

    Nishanth Menon
     

01 Oct, 2015

2 commits

01 Aug, 2015

1 commit

24 Jul, 2015

2 commits

  • 0982e9330   ARM: keystone: dts: rename pcie nodes to help override status ... Browse Code »

    commit 8b4769cc535adf9dd4ae5d82725ca1de254f007c upstream.

    Now that PCIe DT binding is disabled in SoC specific DTS,
    we need a way to override it in a board specific DTS. So
    rename the PCIe nodes accordingly.

    Signed-off-by: Murali Karicheri
    Signed-off-by: Santosh Shilimkar
    Signed-off-by: Sekhar Nori

    Murali Karicheri
     
  • b1bd9bf68   ARM: keystone: dts: fix dt bindings for PCIe ... Browse Code »

    commit 9dd4f28f361df401f738927963af015134f23a1c upstream.

    Currently PCIe DT bindings are broken. PCIe driver can't function
    without having a SerDes driver that provide the phy configuration.
    On K2E EVM, this causes problem since the EVM has Marvell SATA
    controller present and with default values in the SerDes register,
    it seems to pass the PCIe link check, but causes issues since
    the configuration is not correct. The manifestation is that when
    EVM is booted with NFS rootfs, the boot hangs. We shouldn't enable
    PCIe on this EVM since to work, SerDes driver has to be present as
    well. So by default, the PCIe DT binding should be disabled in SoC
    specific DTS. It can be enabled in the board specific DTS when the
    SerDes device driver is also present.

    So fix the status of PCIe DT bindings in the SoC specific DTS to
    "disabled". To enable PCIe, the status should be set to "ok" in
    the EVM DTS file when SerDes driver support becomes available in
    the upstream tree.

    Signed-off-by: Murali Karicheri
    Signed-off-by: Santosh Shilimkar
    Signed-off-by: Sekhar Nori

    Murali Karicheri
     

18 Jul, 2015

1 commit

05 Nov, 2014

1 commit

01 Oct, 2014

1 commit

23 Sep, 2014

1 commit

18 Jul, 2014

1 commit

  • 979c36c85   ARM: dts: keystone: add mdio devices entries ... Browse Code »

    The Keystone 2 has MDIO HW block which are compatible
    to Davinci SoCs:
    See "Gigabit Ethernet (GbE) Switch Subsystem"
    See http://www.ti.com/lit/ug/sprugv9d/sprugv9d.pdf

    Hence, add corresponding DT entry for Keystone 2.

    Signed-off-by: Grygorii Strashko
    Signed-off-by: Santosh Shilimkar

    Grygorii Strashko
     

12 Jun, 2014

1 commit

  • 2dc24b0d0   Merge tag 'soc2-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc ... Browse Code »

    Pull part two of ARM SoC updates from Arnd Bergmann:
    "This is a small follow-up to the larger ARM SoC updates merged last
    week, almost entirely for the keystone platform.

    The main change here is to use the new dma-ranges parsing code that
    came in through Russell's ARM tree. This allows the keystone platform
    to do cache-coherent DMA and to finally support all the available
    physical memory when LPAE is enabled.

    Aside from this, the keystone reset driver has been rewritten, and
    there is a small bug fix to allow building the orion5x platform again"

    * tag 'soc2-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
    ARM: keystone: Drop use of meminfo since its not available anymore
    ARM: orion5x: fix mvebu_mbus_dt_init call
    ARM: configs: keystone: enable reset driver support
    ARM: dts: keystone: update reset node to work with reset driver
    ARM: keystone: remove redundant reset stuff
    ARM: keystone: Update the dma offset for non-dt platform devices
    ARM: keystone: Switch over to coherent memory address space
    ARM: configs: keystone: add MTD_SPI_NOR (new dependency for M25P80)
    ARM: configs: keystone: drop CONFIG_COMMON_CLK_DEBUG

    Linus Torvalds
     

27 May, 2014

1 commit

  • ded79bebc   ARM: dts: keystone: update reset node to work with reset driver ... Browse Code »

    The pll controller register set and device state control registers
    include sets of registers with different purposes, so it's logically
    to add syscon entry to be able to access them from appropriate places.

    So added pll controller and device state control syscon entries.

    The keystone driver requires the next additional properties:

    "ti,syscon-pll" - phandle/offset pair. The phandle to syscon used to
    access pll controller registers and the offset to use
    reset control registers.

    "ti,syscon-dev" - phandle/offset pair. The phandle to syscon used to
    access device state control registers and the offset
    in order to use mux block registers for all watchdogs.

    "ti,wdt-list" - option to declare what watchdogs are used to reboot
    the SoC, so set "0" WDT as default.

    Reviewed-by: Arnd Bergmann
    Signed-off-by: Ivan Khoronzhuk
    Signed-off-by: Santosh Shilimkar

    Ivan Khoronzhuk
     

09 May, 2014

6 commits

  • 86156978a   ARM: dts: keystone: Update USB node for dma properties ... Browse Code »

    Keystone supports dma-coherent on USB master and also needs
    dma-ranges to specify the hardware alias memory range in which DMA
    can be operational.

    Cc: Russell King
    Cc: Arnd Bergmann
    Cc: Olof Johansson
    Cc: Grant Likely
    Cc: Rob Herring
    Signed-off-by: Santosh Shilimkar

    Santosh Shilimkar
     
  • 4d46596d7   ARM: dts: keystone: Use dma-ranges property ... Browse Code »

    The dma-ranges property has to be specified per bus and has format:
    < DMA addr > - Base DMA address for Bus (Bus format 32-bits)
    < CPU addr > - Corresponding base CPU address (CPU format 64-bits)
    < DMA range size > - Size of supported DMA range

    Cc: Russell King
    Cc: Arnd Bergmann
    Cc: Olof Johansson
    Cc: Grant Likely
    Cc: Rob Herring
    Signed-off-by: Grygorii Strashko
    Signed-off-by: Santosh Shilimkar

    Grygorii Strashko
     
  • 509046a7b   ARM: dts: keystone: add cell's information to spi nodes ... Browse Code »

    SPI nodes should always have #address-cells and #size-cells defined,
    otherwise warnings will be produced in case of adding any child
    nodes to the SPI bus in DT:
    Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/spi@21000400/n25q128a11@0
    Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/spi@21000400/n25q128a11@0

    Hence, ensure that all SPIx nodes have #address-cells and #size-cells
    properties defined.

    Signed-off-by: Grygorii Strashko
    Signed-off-by: Santosh Shilimkar

    Grygorii Strashko
     
  • e42d8a7f9   ARM: dts: keystone: move i2c0 device node from SoC to board files ... Browse Code »

    I2C devices are not the part of Keystone SoC and have to be
    defined in board DTS files.
    Hence, move i2c0 EEPROM device node from Keystone SoC to
    k2hk, k2e, k2l EVM files as they all have similar EEPROM SoCs
    installed.

    Signed-off-by: Grygorii Strashko
    Signed-off-by: Santosh Shilimkar

    Grygorii Strashko
     
  • 3953505af   ARM: dts: keystone: add cell's information to i2c nodes ... Browse Code »

    I2C nodes should always have #address-cells and #size-cells defined,
    otherwise warnings will be produced in case of adding child
    nodes to the I2C bus in DT:
    Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/i2c@2530800/pca@20
    Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/i2c@2530800/pca@20

    Hence, ensure that all i2cX nodes have #address-cells and #size-cells
    properties defined.

    Signed-off-by: Grygorii Strashko
    Signed-off-by: Santosh Shilimkar

    Grygorii Strashko
     
  • 5e014d0c0   ARM: dts: keystone: drop address and size cells from GIC node ... Browse Code »

    This is likely a copy-and-paste error from the
    ARM GIC documentation, that has already been fixed.

    address-cells should have been set to 0, as with the size
    cells. As having those properties set to 0 is the
    same thing as not specifying them, drop them completely.

    Signed-off-by: Lucas Stach
    Acked-by: Rob Herring
    Signed-off-by: Santosh Shilimkar

    Lucas Stach
     

01 Mar, 2014

1 commit

26 Feb, 2014

1 commit

  • a20676762   ARM: dts: keystone: preparatory patch to support K2L and K2E SOCs ... Browse Code »

    Current keystone.dtsi includes SoC specific definitions for K2HK
    SoCs. In order to support two addition keystone devices, k2 Edison
    and K2 Lamarr and corresponding EVMs, This patch restructure the
    dts files for the following:-

    - All clock nodes that are only available in k2hk SoC are moved
    from keystone-clocks.dtsi to a new k2hk-clocks.dtsi include file
    - The CPU nodes are now part of the soc specific k2hk.dtsi.
    - Change the compatibility string to ti,k2hk-evm and change
    the model name accordingly
    - Finally include k2hk-clocks.dtsi in k2hk.dtsi and that in
    k2hk-evm.dts

    Cc: Olof Johansson
    Cc: Arnd Bergmann
    Cc: Rob Herring
    Cc: Kumar Gala
    Cc: Mark Rutland
    Signed-off-by: Murali Karicheri
    Signed-off-by: Santosh Shilimkar

    Murali Karicheri
     

17 Feb, 2014

3 commits

13 Dec, 2013

5 commits