Commit 032ec49f5351e9cb242b1a1c367d14415043ab95
1 parent
4f3e8d263d
Exists in
smarc-l5.0.0_1.0.0-ga
and in
5 other branches
usb: musb: drop useless board_mode usage
we are compiling the driver always with full OTG capabilities, so that board_mode trick becomes useless. Signed-off-by: Felipe Balbi <balbi@ti.com>
Showing 11 changed files with 159 additions and 334 deletions Side-by-side Diff
- drivers/usb/musb/am35x.c
- drivers/usb/musb/blackfin.c
- drivers/usb/musb/da8xx.c
- drivers/usb/musb/davinci.c
- drivers/usb/musb/musb_core.c
- drivers/usb/musb/musb_core.h
- drivers/usb/musb/musb_dsps.c
- drivers/usb/musb/musb_gadget.c
- drivers/usb/musb/musb_virthub.c
- drivers/usb/musb/omap2430.c
- drivers/usb/musb/tusb6010.c
drivers/usb/musb/am35x.c
... | ... | @@ -107,9 +107,8 @@ |
107 | 107 | musb_writel(reg_base, CORE_INTR_MASK_SET_REG, AM35X_INTR_USB_MASK); |
108 | 108 | |
109 | 109 | /* Force the DRVVBUS IRQ so we can start polling for ID change. */ |
110 | - if (is_otg_enabled(musb)) | |
111 | - musb_writel(reg_base, CORE_INTR_SRC_SET_REG, | |
112 | - AM35X_INTR_DRVVBUS << AM35X_INTR_USB_SHIFT); | |
110 | + musb_writel(reg_base, CORE_INTR_SRC_SET_REG, | |
111 | + AM35X_INTR_DRVVBUS << AM35X_INTR_USB_SHIFT); | |
113 | 112 | } |
114 | 113 | |
115 | 114 | /* |
... | ... | @@ -173,9 +172,6 @@ |
173 | 172 | MUSB_INTR_VBUSERROR << AM35X_INTR_USB_SHIFT); |
174 | 173 | break; |
175 | 174 | case OTG_STATE_B_IDLE: |
176 | - if (!is_peripheral_enabled(musb)) | |
177 | - break; | |
178 | - | |
179 | 175 | devctl = musb_readb(mregs, MUSB_DEVCTL); |
180 | 176 | if (devctl & MUSB_DEVCTL_BDEVICE) |
181 | 177 | mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); |
... | ... | @@ -192,9 +188,6 @@ |
192 | 188 | { |
193 | 189 | static unsigned long last_timer; |
194 | 190 | |
195 | - if (!is_otg_enabled(musb)) | |
196 | - return; | |
197 | - | |
198 | 191 | if (timeout == 0) |
199 | 192 | timeout = jiffies + msecs_to_jiffies(3); |
200 | 193 | |
... | ... | @@ -271,8 +264,7 @@ |
271 | 264 | u8 devctl = musb_readb(mregs, MUSB_DEVCTL); |
272 | 265 | int err; |
273 | 266 | |
274 | - err = is_host_enabled(musb) && (musb->int_usb & | |
275 | - MUSB_INTR_VBUSERROR); | |
267 | + err = musb->int_usb & MUSB_INTR_VBUSERROR; | |
276 | 268 | if (err) { |
277 | 269 | /* |
278 | 270 | * The Mentor core doesn't debounce VBUS as needed |
... | ... | @@ -289,7 +281,7 @@ |
289 | 281 | musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; |
290 | 282 | mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); |
291 | 283 | WARNING("VBUS error workaround (delay coming)\n"); |
292 | - } else if (is_host_enabled(musb) && drvvbus) { | |
284 | + } else if (drvvbus) { | |
293 | 285 | MUSB_HST_MODE(musb); |
294 | 286 | otg->default_a = 1; |
295 | 287 | musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; |
... | ... | @@ -326,7 +318,7 @@ |
326 | 318 | } |
327 | 319 | |
328 | 320 | /* Poll for ID change */ |
329 | - if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE) | |
321 | + if (musb->xceiv->state == OTG_STATE_B_IDLE) | |
330 | 322 | mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); |
331 | 323 | |
332 | 324 | spin_unlock_irqrestore(&musb->lock, flags); |
... | ... | @@ -369,8 +361,7 @@ |
369 | 361 | if (IS_ERR_OR_NULL(musb->xceiv)) |
370 | 362 | return -ENODEV; |
371 | 363 | |
372 | - if (is_host_enabled(musb)) | |
373 | - setup_timer(&otg_workaround, otg_timer, (unsigned long) musb); | |
364 | + setup_timer(&otg_workaround, otg_timer, (unsigned long) musb); | |
374 | 365 | |
375 | 366 | /* Reset the musb */ |
376 | 367 | if (data->reset) |
... | ... | @@ -400,8 +391,7 @@ |
400 | 391 | struct musb_hdrc_platform_data *plat = dev->platform_data; |
401 | 392 | struct omap_musb_board_data *data = plat->board_data; |
402 | 393 | |
403 | - if (is_host_enabled(musb)) | |
404 | - del_timer_sync(&otg_workaround); | |
394 | + del_timer_sync(&otg_workaround); | |
405 | 395 | |
406 | 396 | /* Shutdown the on-chip PHY and its PLL. */ |
407 | 397 | if (data->set_phy_power) |
drivers/usb/musb/blackfin.c
... | ... | @@ -184,8 +184,8 @@ |
184 | 184 | } |
185 | 185 | |
186 | 186 | /* Start sampling ID pin, when plug is removed from MUSB */ |
187 | - if ((is_otg_enabled(musb) && (musb->xceiv->state == OTG_STATE_B_IDLE | |
188 | - || musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) || | |
187 | + if ((musb->xceiv->state == OTG_STATE_B_IDLE | |
188 | + || musb->xceiv->state == OTG_STATE_A_WAIT_BCON) || | |
189 | 189 | (musb->int_usb & MUSB_INTR_DISCONNECT && is_host_active(musb))) { |
190 | 190 | mod_timer(&musb_conn_timer, jiffies + TIMER_DELAY); |
191 | 191 | musb->a_wait_bcon = TIMER_DELAY; |
192 | 192 | |
... | ... | @@ -228,18 +228,13 @@ |
228 | 228 | |
229 | 229 | val = MUSB_INTR_SUSPEND | MUSB_INTR_VBUSERROR; |
230 | 230 | musb_writeb(musb->mregs, MUSB_INTRUSB, val); |
231 | - if (is_otg_enabled(musb)) | |
232 | - musb->xceiv->state = OTG_STATE_B_IDLE; | |
233 | - else | |
234 | - musb_writeb(musb->mregs, MUSB_POWER, MUSB_POWER_HSENAB); | |
231 | + musb->xceiv->state = OTG_STATE_B_IDLE; | |
235 | 232 | } |
236 | 233 | mod_timer(&musb_conn_timer, jiffies + TIMER_DELAY); |
237 | 234 | break; |
238 | 235 | case OTG_STATE_B_IDLE: |
239 | - | |
240 | - if (!is_peripheral_enabled(musb)) | |
241 | - break; | |
242 | - /* Start a new session. It seems that MUSB needs taking | |
236 | + /* | |
237 | + * Start a new session. It seems that MUSB needs taking | |
243 | 238 | * some time to recognize the type of the plug inserted? |
244 | 239 | */ |
245 | 240 | val = musb_readw(musb->mregs, MUSB_DEVCTL); |
... | ... | @@ -295,10 +290,7 @@ |
295 | 290 | |
296 | 291 | static void bfin_musb_enable(struct musb *musb) |
297 | 292 | { |
298 | - if (!is_otg_enabled(musb) && is_host_enabled(musb)) { | |
299 | - mod_timer(&musb_conn_timer, jiffies + TIMER_DELAY); | |
300 | - musb->a_wait_bcon = TIMER_DELAY; | |
301 | - } | |
293 | + /* REVISIT is this really correct ? */ | |
302 | 294 | } |
303 | 295 | |
304 | 296 | static void bfin_musb_disable(struct musb *musb) |
... | ... | @@ -323,12 +315,6 @@ |
323 | 315 | return 0; |
324 | 316 | } |
325 | 317 | |
326 | -static void bfin_musb_try_idle(struct musb *musb, unsigned long timeout) | |
327 | -{ | |
328 | - if (!is_otg_enabled(musb) && is_host_enabled(musb)) | |
329 | - mod_timer(&musb_conn_timer, jiffies + TIMER_DELAY); | |
330 | -} | |
331 | - | |
332 | 318 | static int bfin_musb_vbus_status(struct musb *musb) |
333 | 319 | { |
334 | 320 | return 0; |
335 | 321 | |
... | ... | @@ -424,13 +410,11 @@ |
424 | 410 | |
425 | 411 | bfin_musb_reg_init(musb); |
426 | 412 | |
427 | - if (is_host_enabled(musb)) { | |
428 | - setup_timer(&musb_conn_timer, | |
429 | - musb_conn_timer_handler, (unsigned long) musb); | |
430 | - } | |
431 | - if (is_peripheral_enabled(musb)) | |
432 | - musb->xceiv->set_power = bfin_musb_set_power; | |
413 | + setup_timer(&musb_conn_timer, musb_conn_timer_handler, | |
414 | + (unsigned long) musb); | |
433 | 415 | |
416 | + musb->xceiv->set_power = bfin_musb_set_power; | |
417 | + | |
434 | 418 | musb->isr = blackfin_interrupt; |
435 | 419 | musb->double_buffer_not_ok = true; |
436 | 420 | |
... | ... | @@ -454,7 +438,6 @@ |
454 | 438 | .disable = bfin_musb_disable, |
455 | 439 | |
456 | 440 | .set_mode = bfin_musb_set_mode, |
457 | - .try_idle = bfin_musb_try_idle, | |
458 | 441 | |
459 | 442 | .vbus_status = bfin_musb_vbus_status, |
460 | 443 | .set_vbus = bfin_musb_set_vbus, |
drivers/usb/musb/da8xx.c
... | ... | @@ -155,9 +155,8 @@ |
155 | 155 | musb_writel(reg_base, DA8XX_USB_INTR_MASK_SET_REG, mask); |
156 | 156 | |
157 | 157 | /* Force the DRVVBUS IRQ so we can start polling for ID change. */ |
158 | - if (is_otg_enabled(musb)) | |
159 | - musb_writel(reg_base, DA8XX_USB_INTR_SRC_SET_REG, | |
160 | - DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT); | |
158 | + musb_writel(reg_base, DA8XX_USB_INTR_SRC_SET_REG, | |
159 | + DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT); | |
161 | 160 | } |
162 | 161 | |
163 | 162 | /** |
... | ... | @@ -231,9 +230,6 @@ |
231 | 230 | MUSB_INTR_VBUSERROR << DA8XX_INTR_USB_SHIFT); |
232 | 231 | break; |
233 | 232 | case OTG_STATE_B_IDLE: |
234 | - if (!is_peripheral_enabled(musb)) | |
235 | - break; | |
236 | - | |
237 | 233 | /* |
238 | 234 | * There's no ID-changed IRQ, so we have no good way to tell |
239 | 235 | * when to switch to the A-Default state machine (by setting |
... | ... | @@ -263,9 +259,6 @@ |
263 | 259 | { |
264 | 260 | static unsigned long last_timer; |
265 | 261 | |
266 | - if (!is_otg_enabled(musb)) | |
267 | - return; | |
268 | - | |
269 | 262 | if (timeout == 0) |
270 | 263 | timeout = jiffies + msecs_to_jiffies(3); |
271 | 264 | |
... | ... | @@ -333,8 +326,7 @@ |
333 | 326 | u8 devctl = musb_readb(mregs, MUSB_DEVCTL); |
334 | 327 | int err; |
335 | 328 | |
336 | - err = is_host_enabled(musb) && (musb->int_usb & | |
337 | - MUSB_INTR_VBUSERROR); | |
329 | + err = musb->int_usb & USB_INTR_VBUSERROR; | |
338 | 330 | if (err) { |
339 | 331 | /* |
340 | 332 | * The Mentor core doesn't debounce VBUS as needed |
... | ... | @@ -351,7 +343,7 @@ |
351 | 343 | musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; |
352 | 344 | mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); |
353 | 345 | WARNING("VBUS error workaround (delay coming)\n"); |
354 | - } else if (is_host_enabled(musb) && drvvbus) { | |
346 | + } else if (drvvbus) { | |
355 | 347 | MUSB_HST_MODE(musb); |
356 | 348 | otg->default_a = 1; |
357 | 349 | musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; |
... | ... | @@ -382,7 +374,7 @@ |
382 | 374 | musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0); |
383 | 375 | |
384 | 376 | /* Poll for ID change */ |
385 | - if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE) | |
377 | + if (musb->xceiv->state == OTG_STATE_B_IDLE) | |
386 | 378 | mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); |
387 | 379 | |
388 | 380 | spin_unlock_irqrestore(&musb->lock, flags); |
... | ... | @@ -430,8 +422,7 @@ |
430 | 422 | if (IS_ERR_OR_NULL(musb->xceiv)) |
431 | 423 | goto fail; |
432 | 424 | |
433 | - if (is_host_enabled(musb)) | |
434 | - setup_timer(&otg_workaround, otg_timer, (unsigned long)musb); | |
425 | + setup_timer(&otg_workaround, otg_timer, (unsigned long)musb); | |
435 | 426 | |
436 | 427 | /* Reset the controller */ |
437 | 428 | musb_writel(reg_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK); |
... | ... | @@ -454,8 +445,7 @@ |
454 | 445 | |
455 | 446 | static int da8xx_musb_exit(struct musb *musb) |
456 | 447 | { |
457 | - if (is_host_enabled(musb)) | |
458 | - del_timer_sync(&otg_workaround); | |
448 | + del_timer_sync(&otg_workaround); | |
459 | 449 | |
460 | 450 | phy_off(); |
461 | 451 |
drivers/usb/musb/davinci.c
... | ... | @@ -115,8 +115,7 @@ |
115 | 115 | dma_off = 0; |
116 | 116 | |
117 | 117 | /* force a DRVVBUS irq so we can start polling for ID change */ |
118 | - if (is_otg_enabled(musb)) | |
119 | - musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG, | |
118 | + musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG, | |
120 | 119 | DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT); |
121 | 120 | } |
122 | 121 | |
... | ... | @@ -234,10 +233,8 @@ |
234 | 233 | MUSB_INTR_VBUSERROR << DAVINCI_USB_USBINT_SHIFT); |
235 | 234 | break; |
236 | 235 | case OTG_STATE_B_IDLE: |
237 | - if (!is_peripheral_enabled(musb)) | |
238 | - break; | |
239 | - | |
240 | - /* There's no ID-changed IRQ, so we have no good way to tell | |
236 | + /* | |
237 | + * There's no ID-changed IRQ, so we have no good way to tell | |
241 | 238 | * when to switch to the A-Default state machine (by setting |
242 | 239 | * the DEVCTL.SESSION flag). |
243 | 240 | * |
... | ... | @@ -315,8 +312,7 @@ |
315 | 312 | u8 devctl = musb_readb(mregs, MUSB_DEVCTL); |
316 | 313 | int err = musb->int_usb & MUSB_INTR_VBUSERROR; |
317 | 314 | |
318 | - err = is_host_enabled(musb) | |
319 | - && (musb->int_usb & MUSB_INTR_VBUSERROR); | |
315 | + err = musb->int_usb & MUSB_INTR_VBUSERROR; | |
320 | 316 | if (err) { |
321 | 317 | /* The Mentor core doesn't debounce VBUS as needed |
322 | 318 | * to cope with device connect current spikes. This |
... | ... | @@ -332,7 +328,7 @@ |
332 | 328 | musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; |
333 | 329 | mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); |
334 | 330 | WARNING("VBUS error workaround (delay coming)\n"); |
335 | - } else if (is_host_enabled(musb) && drvvbus) { | |
331 | + } else if (drvvbus) { | |
336 | 332 | MUSB_HST_MODE(musb); |
337 | 333 | otg->default_a = 1; |
338 | 334 | musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; |
... | ... | @@ -365,8 +361,7 @@ |
365 | 361 | musb_writel(tibase, DAVINCI_USB_EOI_REG, 0); |
366 | 362 | |
367 | 363 | /* poll for ID change */ |
368 | - if (is_otg_enabled(musb) | |
369 | - && musb->xceiv->state == OTG_STATE_B_IDLE) | |
364 | + if (musb->xceiv->state == OTG_STATE_B_IDLE) | |
370 | 365 | mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); |
371 | 366 | |
372 | 367 | spin_unlock_irqrestore(&musb->lock, flags); |
... | ... | @@ -397,8 +392,7 @@ |
397 | 392 | if (revision == 0) |
398 | 393 | goto fail; |
399 | 394 | |
400 | - if (is_host_enabled(musb)) | |
401 | - setup_timer(&otg_workaround, otg_timer, (unsigned long) musb); | |
395 | + setup_timer(&otg_workaround, otg_timer, (unsigned long) musb); | |
402 | 396 | |
403 | 397 | davinci_musb_source_power(musb, 0, 1); |
404 | 398 | |
... | ... | @@ -419,12 +413,7 @@ |
419 | 413 | if (cpu_is_davinci_dm355()) { |
420 | 414 | u32 deepsleep = __raw_readl(DM355_DEEPSLEEP); |
421 | 415 | |
422 | - if (is_host_enabled(musb)) { | |
423 | - deepsleep &= ~DRVVBUS_OVERRIDE; | |
424 | - } else { | |
425 | - deepsleep &= ~DRVVBUS_FORCE; | |
426 | - deepsleep |= DRVVBUS_OVERRIDE; | |
427 | - } | |
416 | + deepsleep &= ~DRVVBUS_FORCE; | |
428 | 417 | __raw_writel(deepsleep, DM355_DEEPSLEEP); |
429 | 418 | } |
430 | 419 | |
... | ... | @@ -453,8 +442,7 @@ |
453 | 442 | |
454 | 443 | static int davinci_musb_exit(struct musb *musb) |
455 | 444 | { |
456 | - if (is_host_enabled(musb)) | |
457 | - del_timer_sync(&otg_workaround); | |
445 | + del_timer_sync(&otg_workaround); | |
458 | 446 | |
459 | 447 | /* force VBUS off */ |
460 | 448 | if (cpu_is_davinci_dm355()) { |
... | ... | @@ -468,7 +456,7 @@ |
468 | 456 | davinci_musb_source_power(musb, 0 /*off*/, 1); |
469 | 457 | |
470 | 458 | /* delay, to avoid problems with module reload */ |
471 | - if (is_host_enabled(musb) && musb->xceiv->otg->default_a) { | |
459 | + if (musb->xceiv->otg->default_a) { | |
472 | 460 | int maxdelay = 30; |
473 | 461 | u8 devctl, warn = 0; |
474 | 462 |
drivers/usb/musb/musb_core.c
... | ... | @@ -649,8 +649,7 @@ |
649 | 649 | break; |
650 | 650 | case OTG_STATE_B_PERIPHERAL: |
651 | 651 | musb_g_suspend(musb); |
652 | - musb->is_active = is_otg_enabled(musb) | |
653 | - && otg->gadget->b_hnp_enable; | |
652 | + musb->is_active = otg->gadget->b_hnp_enable; | |
654 | 653 | if (musb->is_active) { |
655 | 654 | musb->xceiv->state = OTG_STATE_B_WAIT_ACON; |
656 | 655 | dev_dbg(musb->controller, "HNP: Setting timer for b_ase0_brst\n"); |
... | ... | @@ -666,8 +665,7 @@ |
666 | 665 | break; |
667 | 666 | case OTG_STATE_A_HOST: |
668 | 667 | musb->xceiv->state = OTG_STATE_A_SUSPEND; |
669 | - musb->is_active = is_otg_enabled(musb) | |
670 | - && otg->host->b_hnp_enable; | |
668 | + musb->is_active = otg->host->b_hnp_enable; | |
671 | 669 | break; |
672 | 670 | case OTG_STATE_B_HOST: |
673 | 671 | /* Transition to B_PERIPHERAL, see 6.8.2.6 p 44 */ |
... | ... | @@ -755,7 +753,7 @@ |
755 | 753 | case OTG_STATE_A_SUSPEND: |
756 | 754 | usb_hcd_resume_root_hub(musb_to_hcd(musb)); |
757 | 755 | musb_root_disconnect(musb); |
758 | - if (musb->a_wait_bcon != 0 && is_otg_enabled(musb)) | |
756 | + if (musb->a_wait_bcon != 0) | |
759 | 757 | musb_platform_try_idle(musb, jiffies |
760 | 758 | + msecs_to_jiffies(musb->a_wait_bcon)); |
761 | 759 | break; |
762 | 760 | |
... | ... | @@ -931,25 +929,16 @@ |
931 | 929 | devctl = musb_readb(regs, MUSB_DEVCTL); |
932 | 930 | devctl &= ~MUSB_DEVCTL_SESSION; |
933 | 931 | |
934 | - if (is_otg_enabled(musb)) { | |
935 | - /* session started after: | |
936 | - * (a) ID-grounded irq, host mode; | |
937 | - * (b) vbus present/connect IRQ, peripheral mode; | |
938 | - * (c) peripheral initiates, using SRP | |
939 | - */ | |
940 | - if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS) | |
941 | - musb->is_active = 1; | |
942 | - else | |
943 | - devctl |= MUSB_DEVCTL_SESSION; | |
944 | - | |
945 | - } else if (is_host_enabled(musb)) { | |
946 | - /* assume ID pin is hard-wired to ground */ | |
932 | + /* session started after: | |
933 | + * (a) ID-grounded irq, host mode; | |
934 | + * (b) vbus present/connect IRQ, peripheral mode; | |
935 | + * (c) peripheral initiates, using SRP | |
936 | + */ | |
937 | + if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS) | |
938 | + musb->is_active = 1; | |
939 | + else | |
947 | 940 | devctl |= MUSB_DEVCTL_SESSION; |
948 | 941 | |
949 | - } else /* peripheral is enabled */ { | |
950 | - if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS) | |
951 | - musb->is_active = 1; | |
952 | - } | |
953 | 942 | musb_platform_enable(musb); |
954 | 943 | musb_writeb(regs, MUSB_DEVCTL, devctl); |
955 | 944 | } |
... | ... | @@ -1013,8 +1002,6 @@ |
1013 | 1002 | musb_generic_disable(musb); |
1014 | 1003 | spin_unlock_irqrestore(&musb->lock, flags); |
1015 | 1004 | |
1016 | - if (!is_otg_enabled(musb) && is_host_enabled(musb)) | |
1017 | - usb_remove_hcd(musb_to_hcd(musb)); | |
1018 | 1005 | musb_writeb(musb->mregs, MUSB_DEVCTL, 0); |
1019 | 1006 | musb_platform_exit(musb); |
1020 | 1007 | |
... | ... | @@ -1885,6 +1872,7 @@ |
1885 | 1872 | int status; |
1886 | 1873 | struct musb *musb; |
1887 | 1874 | struct musb_hdrc_platform_data *plat = dev->platform_data; |
1875 | + struct usb_hcd *hcd; | |
1888 | 1876 | |
1889 | 1877 | /* The driver might handle more features than the board; OK. |
1890 | 1878 | * Fail when the board needs a feature that's not enabled. |
... | ... | @@ -1907,7 +1895,6 @@ |
1907 | 1895 | pm_runtime_enable(musb->controller); |
1908 | 1896 | |
1909 | 1897 | spin_lock_init(&musb->lock); |
1910 | - musb->board_mode = plat->mode; | |
1911 | 1898 | musb->board_set_power = plat->set_power; |
1912 | 1899 | musb->min_power = plat->min_power; |
1913 | 1900 | musb->ops = plat->platform_ops; |
... | ... | @@ -1978,7 +1965,7 @@ |
1978 | 1965 | goto fail3; |
1979 | 1966 | } |
1980 | 1967 | musb->nIrq = nIrq; |
1981 | -/* FIXME this handles wakeup irqs wrong */ | |
1968 | + /* FIXME this handles wakeup irqs wrong */ | |
1982 | 1969 | if (enable_irq_wake(nIrq) == 0) { |
1983 | 1970 | musb->irq_wake = 1; |
1984 | 1971 | device_init_wakeup(dev, 1); |
1985 | 1972 | |
1986 | 1973 | |
1987 | 1974 | |
1988 | 1975 | |
... | ... | @@ -1987,58 +1974,25 @@ |
1987 | 1974 | } |
1988 | 1975 | |
1989 | 1976 | /* host side needs more setup */ |
1990 | - if (is_host_enabled(musb)) { | |
1991 | - struct usb_hcd *hcd = musb_to_hcd(musb); | |
1977 | + hcd = musb_to_hcd(musb); | |
1978 | + otg_set_host(musb->xceiv->otg, &hcd->self); | |
1979 | + hcd->self.otg_port = 1; | |
1980 | + musb->xceiv->otg->host = &hcd->self; | |
1981 | + hcd->power_budget = 2 * (plat->power ? : 250); | |
1992 | 1982 | |
1993 | - otg_set_host(musb->xceiv->otg, &hcd->self); | |
1994 | - | |
1995 | - if (is_otg_enabled(musb)) | |
1996 | - hcd->self.otg_port = 1; | |
1997 | - musb->xceiv->otg->host = &hcd->self; | |
1998 | - hcd->power_budget = 2 * (plat->power ? : 250); | |
1999 | - | |
2000 | - /* program PHY to use external vBus if required */ | |
2001 | - if (plat->extvbus) { | |
2002 | - u8 busctl = musb_read_ulpi_buscontrol(musb->mregs); | |
2003 | - busctl |= MUSB_ULPI_USE_EXTVBUS; | |
2004 | - musb_write_ulpi_buscontrol(musb->mregs, busctl); | |
2005 | - } | |
1983 | + /* program PHY to use external vBus if required */ | |
1984 | + if (plat->extvbus) { | |
1985 | + u8 busctl = musb_read_ulpi_buscontrol(musb->mregs); | |
1986 | + busctl |= MUSB_ULPI_USE_EXTVBUS; | |
1987 | + musb_write_ulpi_buscontrol(musb->mregs, busctl); | |
2006 | 1988 | } |
2007 | 1989 | |
2008 | - /* For the host-only role, we can activate right away. | |
2009 | - * (We expect the ID pin to be forcibly grounded!!) | |
2010 | - * Otherwise, wait till the gadget driver hooks up. | |
2011 | - */ | |
2012 | - if (!is_otg_enabled(musb) && is_host_enabled(musb)) { | |
2013 | - struct usb_hcd *hcd = musb_to_hcd(musb); | |
1990 | + MUSB_DEV_MODE(musb); | |
1991 | + musb->xceiv->otg->default_a = 0; | |
1992 | + musb->xceiv->state = OTG_STATE_B_IDLE; | |
2014 | 1993 | |
2015 | - MUSB_HST_MODE(musb); | |
2016 | - musb->xceiv->otg->default_a = 1; | |
2017 | - musb->xceiv->state = OTG_STATE_A_IDLE; | |
1994 | + status = musb_gadget_setup(musb); | |
2018 | 1995 | |
2019 | - status = usb_add_hcd(musb_to_hcd(musb), 0, 0); | |
2020 | - | |
2021 | - hcd->self.uses_pio_for_control = 1; | |
2022 | - dev_dbg(musb->controller, "%s mode, status %d, devctl %02x %c\n", | |
2023 | - "HOST", status, | |
2024 | - musb_readb(musb->mregs, MUSB_DEVCTL), | |
2025 | - (musb_readb(musb->mregs, MUSB_DEVCTL) | |
2026 | - & MUSB_DEVCTL_BDEVICE | |
2027 | - ? 'B' : 'A')); | |
2028 | - | |
2029 | - } else /* peripheral is enabled */ { | |
2030 | - MUSB_DEV_MODE(musb); | |
2031 | - musb->xceiv->otg->default_a = 0; | |
2032 | - musb->xceiv->state = OTG_STATE_B_IDLE; | |
2033 | - | |
2034 | - status = musb_gadget_setup(musb); | |
2035 | - | |
2036 | - dev_dbg(musb->controller, "%s mode, status %d, dev%02x\n", | |
2037 | - is_otg_enabled(musb) ? "OTG" : "PERIPHERAL", | |
2038 | - status, | |
2039 | - musb_readb(musb->mregs, MUSB_DEVCTL)); | |
2040 | - | |
2041 | - } | |
2042 | 1996 | if (status < 0) |
2043 | 1997 | goto fail3; |
2044 | 1998 | |
2045 | 1999 | |
... | ... | @@ -2054,28 +2008,13 @@ |
2054 | 2008 | |
2055 | 2009 | pm_runtime_put(musb->controller); |
2056 | 2010 | |
2057 | - dev_info(dev, "USB %s mode controller at %p using %s, IRQ %d\n", | |
2058 | - ({char *s; | |
2059 | - switch (musb->board_mode) { | |
2060 | - case MUSB_HOST: s = "Host"; break; | |
2061 | - case MUSB_PERIPHERAL: s = "Peripheral"; break; | |
2062 | - default: s = "OTG"; break; | |
2063 | - }; s; }), | |
2064 | - ctrl, | |
2065 | - (is_dma_capable() && musb->dma_controller) | |
2066 | - ? "DMA" : "PIO", | |
2067 | - musb->nIrq); | |
2068 | - | |
2069 | 2011 | return 0; |
2070 | 2012 | |
2071 | 2013 | fail5: |
2072 | 2014 | musb_exit_debugfs(musb); |
2073 | 2015 | |
2074 | 2016 | fail4: |
2075 | - if (!is_otg_enabled(musb) && is_host_enabled(musb)) | |
2076 | - usb_remove_hcd(musb_to_hcd(musb)); | |
2077 | - else | |
2078 | - musb_gadget_cleanup(musb); | |
2017 | + musb_gadget_cleanup(musb); | |
2079 | 2018 | |
2080 | 2019 | fail3: |
2081 | 2020 | pm_runtime_put_sync(musb->controller); |
... | ... | @@ -2166,11 +2105,9 @@ |
2166 | 2105 | void __iomem *musb_base = musb->mregs; |
2167 | 2106 | void __iomem *epio; |
2168 | 2107 | |
2169 | - if (is_host_enabled(musb)) { | |
2170 | - musb->context.frame = musb_readw(musb_base, MUSB_FRAME); | |
2171 | - musb->context.testmode = musb_readb(musb_base, MUSB_TESTMODE); | |
2172 | - musb->context.busctl = musb_read_ulpi_buscontrol(musb->mregs); | |
2173 | - } | |
2108 | + musb->context.frame = musb_readw(musb_base, MUSB_FRAME); | |
2109 | + musb->context.testmode = musb_readb(musb_base, MUSB_TESTMODE); | |
2110 | + musb->context.busctl = musb_read_ulpi_buscontrol(musb->mregs); | |
2174 | 2111 | musb->context.power = musb_readb(musb_base, MUSB_POWER); |
2175 | 2112 | musb->context.intrtxe = musb_readw(musb_base, MUSB_INTRTXE); |
2176 | 2113 | musb->context.intrrxe = musb_readw(musb_base, MUSB_INTRRXE); |
2177 | 2114 | |
2178 | 2115 | |
... | ... | @@ -2209,30 +2146,29 @@ |
2209 | 2146 | musb->context.index_regs[i].rxfifosz = |
2210 | 2147 | musb_read_rxfifosz(musb_base); |
2211 | 2148 | } |
2212 | - if (is_host_enabled(musb)) { | |
2213 | - musb->context.index_regs[i].txtype = | |
2214 | - musb_readb(epio, MUSB_TXTYPE); | |
2215 | - musb->context.index_regs[i].txinterval = | |
2216 | - musb_readb(epio, MUSB_TXINTERVAL); | |
2217 | - musb->context.index_regs[i].rxtype = | |
2218 | - musb_readb(epio, MUSB_RXTYPE); | |
2219 | - musb->context.index_regs[i].rxinterval = | |
2220 | - musb_readb(epio, MUSB_RXINTERVAL); | |
2221 | 2149 | |
2222 | - musb->context.index_regs[i].txfunaddr = | |
2223 | - musb_read_txfunaddr(musb_base, i); | |
2224 | - musb->context.index_regs[i].txhubaddr = | |
2225 | - musb_read_txhubaddr(musb_base, i); | |
2226 | - musb->context.index_regs[i].txhubport = | |
2227 | - musb_read_txhubport(musb_base, i); | |
2150 | + musb->context.index_regs[i].txtype = | |
2151 | + musb_readb(epio, MUSB_TXTYPE); | |
2152 | + musb->context.index_regs[i].txinterval = | |
2153 | + musb_readb(epio, MUSB_TXINTERVAL); | |
2154 | + musb->context.index_regs[i].rxtype = | |
2155 | + musb_readb(epio, MUSB_RXTYPE); | |
2156 | + musb->context.index_regs[i].rxinterval = | |
2157 | + musb_readb(epio, MUSB_RXINTERVAL); | |
2228 | 2158 | |
2229 | - musb->context.index_regs[i].rxfunaddr = | |
2230 | - musb_read_rxfunaddr(musb_base, i); | |
2231 | - musb->context.index_regs[i].rxhubaddr = | |
2232 | - musb_read_rxhubaddr(musb_base, i); | |
2233 | - musb->context.index_regs[i].rxhubport = | |
2234 | - musb_read_rxhubport(musb_base, i); | |
2235 | - } | |
2159 | + musb->context.index_regs[i].txfunaddr = | |
2160 | + musb_read_txfunaddr(musb_base, i); | |
2161 | + musb->context.index_regs[i].txhubaddr = | |
2162 | + musb_read_txhubaddr(musb_base, i); | |
2163 | + musb->context.index_regs[i].txhubport = | |
2164 | + musb_read_txhubport(musb_base, i); | |
2165 | + | |
2166 | + musb->context.index_regs[i].rxfunaddr = | |
2167 | + musb_read_rxfunaddr(musb_base, i); | |
2168 | + musb->context.index_regs[i].rxhubaddr = | |
2169 | + musb_read_rxhubaddr(musb_base, i); | |
2170 | + musb->context.index_regs[i].rxhubport = | |
2171 | + musb_read_rxhubport(musb_base, i); | |
2236 | 2172 | } |
2237 | 2173 | } |
2238 | 2174 | |
... | ... | @@ -2243,11 +2179,9 @@ |
2243 | 2179 | void __iomem *ep_target_regs; |
2244 | 2180 | void __iomem *epio; |
2245 | 2181 | |
2246 | - if (is_host_enabled(musb)) { | |
2247 | - musb_writew(musb_base, MUSB_FRAME, musb->context.frame); | |
2248 | - musb_writeb(musb_base, MUSB_TESTMODE, musb->context.testmode); | |
2249 | - musb_write_ulpi_buscontrol(musb->mregs, musb->context.busctl); | |
2250 | - } | |
2182 | + musb_writew(musb_base, MUSB_FRAME, musb->context.frame); | |
2183 | + musb_writeb(musb_base, MUSB_TESTMODE, musb->context.testmode); | |
2184 | + musb_write_ulpi_buscontrol(musb->mregs, musb->context.busctl); | |
2251 | 2185 | musb_writeb(musb_base, MUSB_POWER, musb->context.power); |
2252 | 2186 | musb_writew(musb_base, MUSB_INTRTXE, musb->context.intrtxe); |
2253 | 2187 | musb_writew(musb_base, MUSB_INTRRXE, musb->context.intrrxe); |
2254 | 2188 | |
2255 | 2189 | |
2256 | 2190 | |
2257 | 2191 | |
2258 | 2192 | |
2259 | 2193 | |
2260 | 2194 | |
2261 | 2195 | |
2262 | 2196 | |
2263 | 2197 | |
2264 | 2198 | |
... | ... | @@ -2286,33 +2220,31 @@ |
2286 | 2220 | musb->context.index_regs[i].rxfifoadd); |
2287 | 2221 | } |
2288 | 2222 | |
2289 | - if (is_host_enabled(musb)) { | |
2290 | - musb_writeb(epio, MUSB_TXTYPE, | |
2223 | + musb_writeb(epio, MUSB_TXTYPE, | |
2291 | 2224 | musb->context.index_regs[i].txtype); |
2292 | - musb_writeb(epio, MUSB_TXINTERVAL, | |
2225 | + musb_writeb(epio, MUSB_TXINTERVAL, | |
2293 | 2226 | musb->context.index_regs[i].txinterval); |
2294 | - musb_writeb(epio, MUSB_RXTYPE, | |
2227 | + musb_writeb(epio, MUSB_RXTYPE, | |
2295 | 2228 | musb->context.index_regs[i].rxtype); |
2296 | - musb_writeb(epio, MUSB_RXINTERVAL, | |
2229 | + musb_writeb(epio, MUSB_RXINTERVAL, | |
2297 | 2230 | |
2298 | - musb->context.index_regs[i].rxinterval); | |
2299 | - musb_write_txfunaddr(musb_base, i, | |
2231 | + musb->context.index_regs[i].rxinterval); | |
2232 | + musb_write_txfunaddr(musb_base, i, | |
2300 | 2233 | musb->context.index_regs[i].txfunaddr); |
2301 | - musb_write_txhubaddr(musb_base, i, | |
2234 | + musb_write_txhubaddr(musb_base, i, | |
2302 | 2235 | musb->context.index_regs[i].txhubaddr); |
2303 | - musb_write_txhubport(musb_base, i, | |
2236 | + musb_write_txhubport(musb_base, i, | |
2304 | 2237 | musb->context.index_regs[i].txhubport); |
2305 | 2238 | |
2306 | - ep_target_regs = | |
2307 | - musb_read_target_reg_base(i, musb_base); | |
2239 | + ep_target_regs = | |
2240 | + musb_read_target_reg_base(i, musb_base); | |
2308 | 2241 | |
2309 | - musb_write_rxfunaddr(ep_target_regs, | |
2242 | + musb_write_rxfunaddr(ep_target_regs, | |
2310 | 2243 | musb->context.index_regs[i].rxfunaddr); |
2311 | - musb_write_rxhubaddr(ep_target_regs, | |
2244 | + musb_write_rxhubaddr(ep_target_regs, | |
2312 | 2245 | musb->context.index_regs[i].rxhubaddr); |
2313 | - musb_write_rxhubport(ep_target_regs, | |
2246 | + musb_write_rxhubport(ep_target_regs, | |
2314 | 2247 | musb->context.index_regs[i].rxhubport); |
2315 | - } | |
2316 | 2248 | } |
2317 | 2249 | musb_writeb(musb_base, MUSB_INDEX, musb->context.index); |
2318 | 2250 | } |
drivers/usb/musb/musb_core.h
... | ... | @@ -71,10 +71,6 @@ |
71 | 71 | #include <linux/usb/hcd.h> |
72 | 72 | #include "musb_host.h" |
73 | 73 | |
74 | -#define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST) | |
75 | -#define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL) | |
76 | -#define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG) | |
77 | - | |
78 | 74 | /* NOTE: otg and peripheral-only state machines start at B_IDLE. |
79 | 75 | * OTG or host-only go to A_IDLE when ID is sensed. |
80 | 76 | */ |
... | ... | @@ -376,7 +372,6 @@ |
376 | 372 | u16 epmask; |
377 | 373 | u8 nr_endpoints; |
378 | 374 | |
379 | - u8 board_mode; /* enum musb_mode */ | |
380 | 375 | int (*board_set_power)(int state); |
381 | 376 | |
382 | 377 | u8 min_power; /* vbus for periph, in mA/2 */ |
drivers/usb/musb/musb_dsps.c
... | ... | @@ -137,9 +137,8 @@ |
137 | 137 | dsps_writel(reg_base, wrp->epintr_set, epmask); |
138 | 138 | dsps_writel(reg_base, wrp->coreintr_set, coremask); |
139 | 139 | /* Force the DRVVBUS IRQ so we can start polling for ID change. */ |
140 | - if (is_otg_enabled(musb)) | |
141 | - dsps_writel(reg_base, wrp->coreintr_set, | |
142 | - (1 << wrp->drvvbus) << wrp->usb_shift); | |
140 | + dsps_writel(reg_base, wrp->coreintr_set, | |
141 | + (1 << wrp->drvvbus) << wrp->usb_shift); | |
143 | 142 | } |
144 | 143 | |
145 | 144 | /** |
... | ... | @@ -200,9 +199,6 @@ |
200 | 199 | MUSB_INTR_VBUSERROR << wrp->usb_shift); |
201 | 200 | break; |
202 | 201 | case OTG_STATE_B_IDLE: |
203 | - if (!is_peripheral_enabled(musb)) | |
204 | - break; | |
205 | - | |
206 | 202 | devctl = dsps_readb(mregs, MUSB_DEVCTL); |
207 | 203 | if (devctl & MUSB_DEVCTL_BDEVICE) |
208 | 204 | mod_timer(&glue->timer, |
... | ... | @@ -223,9 +219,6 @@ |
223 | 219 | struct dsps_glue *glue = platform_get_drvdata(pdev); |
224 | 220 | static unsigned long last_timer; |
225 | 221 | |
226 | - if (!is_otg_enabled(musb)) | |
227 | - return; | |
228 | - | |
229 | 222 | if (timeout == 0) |
230 | 223 | timeout = jiffies + msecs_to_jiffies(3); |
231 | 224 | |
... | ... | @@ -293,7 +286,7 @@ |
293 | 286 | * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. |
294 | 287 | * Also, DRVVBUS pulses for SRP (but not at 5V) ... |
295 | 288 | */ |
296 | - if ((usbintr & MUSB_INTR_BABBLE) && is_host_enabled(musb)) | |
289 | + if (usbintr & MUSB_INTR_BABBLE) | |
297 | 290 | pr_info("CAUTION: musb: Babble Interrupt Occured\n"); |
298 | 291 | |
299 | 292 | if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { |
... | ... | @@ -302,8 +295,7 @@ |
302 | 295 | u8 devctl = dsps_readb(mregs, MUSB_DEVCTL); |
303 | 296 | int err; |
304 | 297 | |
305 | - err = is_host_enabled(musb) && (musb->int_usb & | |
306 | - MUSB_INTR_VBUSERROR); | |
298 | + err = musb->int_usb & MUSB_INTR_VBUSERROR; | |
307 | 299 | if (err) { |
308 | 300 | /* |
309 | 301 | * The Mentor core doesn't debounce VBUS as needed |
... | ... | @@ -321,7 +313,7 @@ |
321 | 313 | mod_timer(&glue->timer, |
322 | 314 | jiffies + wrp->poll_seconds * HZ); |
323 | 315 | WARNING("VBUS error workaround (delay coming)\n"); |
324 | - } else if (is_host_enabled(musb) && drvvbus) { | |
316 | + } else if (drvvbus) { | |
325 | 317 | musb->is_active = 1; |
326 | 318 | MUSB_HST_MODE(musb); |
327 | 319 | musb->xceiv->otg->default_a = 1; |
... | ... | @@ -352,7 +344,7 @@ |
352 | 344 | dsps_writel(reg_base, wrp->eoi, 1); |
353 | 345 | |
354 | 346 | /* Poll for ID change */ |
355 | - if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE) | |
347 | + if (musb->xceiv->state == OTG_STATE_B_IDLE) | |
356 | 348 | mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); |
357 | 349 | |
358 | 350 | spin_unlock_irqrestore(&musb->lock, flags); |
... | ... | @@ -388,8 +380,7 @@ |
388 | 380 | goto err0; |
389 | 381 | } |
390 | 382 | |
391 | - if (is_host_enabled(musb)) | |
392 | - setup_timer(&glue->timer, otg_timer, (unsigned long) musb); | |
383 | + setup_timer(&glue->timer, otg_timer, (unsigned long) musb); | |
393 | 384 | |
394 | 385 | /* Reset the musb */ |
395 | 386 | dsps_writel(reg_base, wrp->control, (1 << wrp->reset)); |
... | ... | @@ -423,8 +414,7 @@ |
423 | 414 | struct platform_device *pdev = to_platform_device(dev->parent); |
424 | 415 | struct dsps_glue *glue = platform_get_drvdata(pdev); |
425 | 416 | |
426 | - if (is_host_enabled(musb)) | |
427 | - del_timer_sync(&glue->timer); | |
417 | + del_timer_sync(&glue->timer); | |
428 | 418 | |
429 | 419 | /* Shutdown the on-chip PHY and its PLL. */ |
430 | 420 | if (data->set_phy_power) |
drivers/usb/musb/musb_gadget.c
... | ... | @@ -1864,8 +1864,7 @@ |
1864 | 1864 | musb->g.dev.release = musb_gadget_release; |
1865 | 1865 | musb->g.name = musb_driver_name; |
1866 | 1866 | |
1867 | - if (is_otg_enabled(musb)) | |
1868 | - musb->g.is_otg = 1; | |
1867 | + musb->g.is_otg = 1; | |
1869 | 1868 | |
1870 | 1869 | musb_g_init_endpoints(musb); |
1871 | 1870 | |
1872 | 1871 | |
1873 | 1872 | |
... | ... | @@ -1911,11 +1910,14 @@ |
1911 | 1910 | { |
1912 | 1911 | struct musb *musb = gadget_to_musb(g); |
1913 | 1912 | struct usb_otg *otg = musb->xceiv->otg; |
1913 | + struct usb_hcd *hcd = musb_to_hcd(musb); | |
1914 | 1914 | unsigned long flags; |
1915 | - int retval = -EINVAL; | |
1915 | + int retval = 0; | |
1916 | 1916 | |
1917 | - if (driver->max_speed < USB_SPEED_HIGH) | |
1918 | - goto err0; | |
1917 | + if (driver->max_speed < USB_SPEED_HIGH) { | |
1918 | + retval = -EINVAL; | |
1919 | + goto err; | |
1920 | + } | |
1919 | 1921 | |
1920 | 1922 | pm_runtime_get_sync(musb->controller); |
1921 | 1923 | |
1922 | 1924 | |
1923 | 1925 | |
1924 | 1926 | |
1925 | 1927 | |
1926 | 1928 | |
1927 | 1929 | |
... | ... | @@ -1929,49 +1931,30 @@ |
1929 | 1931 | |
1930 | 1932 | otg_set_peripheral(otg, &musb->g); |
1931 | 1933 | musb->xceiv->state = OTG_STATE_B_IDLE; |
1934 | + spin_unlock_irqrestore(&musb->lock, flags); | |
1932 | 1935 | |
1933 | - /* | |
1934 | - * FIXME this ignores the softconnect flag. Drivers are | |
1935 | - * allowed hold the peripheral inactive until for example | |
1936 | - * userspace hooks up printer hardware or DSP codecs, so | |
1937 | - * hosts only see fully functional devices. | |
1936 | + /* REVISIT: funcall to other code, which also | |
1937 | + * handles power budgeting ... this way also | |
1938 | + * ensures HdrcStart is indirectly called. | |
1938 | 1939 | */ |
1940 | + retval = usb_add_hcd(hcd, 0, 0); | |
1941 | + if (retval < 0) { | |
1942 | + dev_dbg(musb->controller, "add_hcd failed, %d\n", retval); | |
1943 | + goto err; | |
1944 | + } | |
1939 | 1945 | |
1940 | - if (!is_otg_enabled(musb)) | |
1941 | - musb_start(musb); | |
1946 | + if ((musb->xceiv->last_event == USB_EVENT_ID) | |
1947 | + && otg->set_vbus) | |
1948 | + otg_set_vbus(otg, 1); | |
1942 | 1949 | |
1943 | - spin_unlock_irqrestore(&musb->lock, flags); | |
1950 | + hcd->self.uses_pio_for_control = 1; | |
1944 | 1951 | |
1945 | - if (is_otg_enabled(musb)) { | |
1946 | - struct usb_hcd *hcd = musb_to_hcd(musb); | |
1947 | - | |
1948 | - dev_dbg(musb->controller, "OTG startup...\n"); | |
1949 | - | |
1950 | - /* REVISIT: funcall to other code, which also | |
1951 | - * handles power budgeting ... this way also | |
1952 | - * ensures HdrcStart is indirectly called. | |
1953 | - */ | |
1954 | - retval = usb_add_hcd(musb_to_hcd(musb), 0, 0); | |
1955 | - if (retval < 0) { | |
1956 | - dev_dbg(musb->controller, "add_hcd failed, %d\n", retval); | |
1957 | - goto err2; | |
1958 | - } | |
1959 | - | |
1960 | - if ((musb->xceiv->last_event == USB_EVENT_ID) | |
1961 | - && otg->set_vbus) | |
1962 | - otg_set_vbus(otg, 1); | |
1963 | - | |
1964 | - hcd->self.uses_pio_for_control = 1; | |
1965 | - } | |
1966 | 1952 | if (musb->xceiv->last_event == USB_EVENT_NONE) |
1967 | 1953 | pm_runtime_put(musb->controller); |
1968 | 1954 | |
1969 | 1955 | return 0; |
1970 | 1956 | |
1971 | -err2: | |
1972 | - if (!is_otg_enabled(musb)) | |
1973 | - musb_stop(musb); | |
1974 | -err0: | |
1957 | +err: | |
1975 | 1958 | return retval; |
1976 | 1959 | } |
1977 | 1960 | |
1978 | 1961 | |
... | ... | @@ -2049,17 +2032,13 @@ |
2049 | 2032 | musb_platform_try_idle(musb, 0); |
2050 | 2033 | spin_unlock_irqrestore(&musb->lock, flags); |
2051 | 2034 | |
2052 | - if (is_otg_enabled(musb)) { | |
2053 | - usb_remove_hcd(musb_to_hcd(musb)); | |
2054 | - /* FIXME we need to be able to register another | |
2055 | - * gadget driver here and have everything work; | |
2056 | - * that currently misbehaves. | |
2057 | - */ | |
2058 | - } | |
2035 | + usb_remove_hcd(musb_to_hcd(musb)); | |
2036 | + /* | |
2037 | + * FIXME we need to be able to register another | |
2038 | + * gadget driver here and have everything work; | |
2039 | + * that currently misbehaves. | |
2040 | + */ | |
2059 | 2041 | |
2060 | - if (!is_otg_enabled(musb)) | |
2061 | - musb_stop(musb); | |
2062 | - | |
2063 | 2042 | pm_runtime_put(musb->controller); |
2064 | 2043 | |
2065 | 2044 | return 0; |
2066 | 2045 | |
2067 | 2046 | |
... | ... | @@ -2220,14 +2199,12 @@ |
2220 | 2199 | if (devctl & MUSB_DEVCTL_BDEVICE) { |
2221 | 2200 | musb->xceiv->state = OTG_STATE_B_PERIPHERAL; |
2222 | 2201 | musb->g.is_a_peripheral = 0; |
2223 | - } else if (is_otg_enabled(musb)) { | |
2202 | + } else { | |
2224 | 2203 | musb->xceiv->state = OTG_STATE_A_PERIPHERAL; |
2225 | 2204 | musb->g.is_a_peripheral = 1; |
2226 | - } else | |
2227 | - WARN_ON(1); | |
2205 | + } | |
2228 | 2206 | |
2229 | 2207 | /* start with default limits on VBUS power draw */ |
2230 | - (void) musb_gadget_vbus_draw(&musb->g, | |
2231 | - is_otg_enabled(musb) ? 8 : 100); | |
2208 | + (void) musb_gadget_vbus_draw(&musb->g, 8); | |
2232 | 2209 | } |
drivers/usb/musb/musb_virthub.c
... | ... | @@ -81,8 +81,7 @@ |
81 | 81 | switch (musb->xceiv->state) { |
82 | 82 | case OTG_STATE_A_HOST: |
83 | 83 | musb->xceiv->state = OTG_STATE_A_SUSPEND; |
84 | - musb->is_active = is_otg_enabled(musb) | |
85 | - && otg->host->b_hnp_enable; | |
84 | + musb->is_active = otg->host->b_hnp_enable; | |
86 | 85 | if (musb->is_active) |
87 | 86 | mod_timer(&musb->otg_timer, jiffies |
88 | 87 | + msecs_to_jiffies( |
... | ... | @@ -91,8 +90,7 @@ |
91 | 90 | break; |
92 | 91 | case OTG_STATE_B_HOST: |
93 | 92 | musb->xceiv->state = OTG_STATE_B_WAIT_ACON; |
94 | - musb->is_active = is_otg_enabled(musb) | |
95 | - && otg->host->b_hnp_enable; | |
93 | + musb->is_active = otg->host->b_hnp_enable; | |
96 | 94 | musb_platform_try_idle(musb, 0); |
97 | 95 | break; |
98 | 96 | default: |
... | ... | @@ -190,8 +188,7 @@ |
190 | 188 | |
191 | 189 | switch (musb->xceiv->state) { |
192 | 190 | case OTG_STATE_A_SUSPEND: |
193 | - if (is_otg_enabled(musb) | |
194 | - && otg->host->b_hnp_enable) { | |
191 | + if (otg->host->b_hnp_enable) { | |
195 | 192 | musb->xceiv->state = OTG_STATE_A_PERIPHERAL; |
196 | 193 | musb->g.is_a_peripheral = 1; |
197 | 194 | break; |
... | ... | @@ -273,7 +270,7 @@ |
273 | 270 | musb_port_suspend(musb, false); |
274 | 271 | break; |
275 | 272 | case USB_PORT_FEAT_POWER: |
276 | - if (!(is_otg_enabled(musb) && hcd->self.is_b_host)) | |
273 | + if (!hcd->self.is_b_host) | |
277 | 274 | musb_platform_set_vbus(musb, 0); |
278 | 275 | break; |
279 | 276 | case USB_PORT_FEAT_C_CONNECTION: |
... | ... | @@ -369,7 +366,7 @@ |
369 | 366 | * initialization logic, e.g. for OTG, or change any |
370 | 367 | * logic relating to VBUS power-up. |
371 | 368 | */ |
372 | - if (!(is_otg_enabled(musb) && hcd->self.is_b_host)) | |
369 | + if (!hcd->self.is_b_host) | |
373 | 370 | musb_start(musb); |
374 | 371 | break; |
375 | 372 | case USB_PORT_FEAT_RESET: |
drivers/usb/musb/omap2430.c
... | ... | @@ -258,7 +258,7 @@ |
258 | 258 | otg->default_a = true; |
259 | 259 | musb->xceiv->state = OTG_STATE_A_IDLE; |
260 | 260 | musb->xceiv->last_event = USB_EVENT_ID; |
261 | - if (!is_otg_enabled(musb) || musb->gadget_driver) { | |
261 | + if (musb->gadget_driver) { | |
262 | 262 | pm_runtime_get_sync(dev); |
263 | 263 | usb_phy_init(musb->xceiv); |
264 | 264 | omap2430_musb_set_vbus(musb, 1); |
... | ... | @@ -281,11 +281,10 @@ |
281 | 281 | dev_dbg(dev, "VBUS Disconnect\n"); |
282 | 282 | |
283 | 283 | musb->xceiv->last_event = USB_EVENT_NONE; |
284 | - if (is_otg_enabled(musb) || is_peripheral_enabled(musb)) | |
285 | - if (musb->gadget_driver) { | |
286 | - pm_runtime_mark_last_busy(dev); | |
287 | - pm_runtime_put_autosuspend(dev); | |
288 | - } | |
284 | + if (musb->gadget_driver) { | |
285 | + pm_runtime_mark_last_busy(dev); | |
286 | + pm_runtime_put_autosuspend(dev); | |
287 | + } | |
289 | 288 | |
290 | 289 | if (data->interface_type == MUSB_INTERFACE_UTMI) { |
291 | 290 | if (musb->xceiv->otg->set_vbus) |
drivers/usb/musb/tusb6010.c
... | ... | @@ -437,14 +437,13 @@ |
437 | 437 | if (is_host_active(musb) && (musb->port1_status >> 16)) |
438 | 438 | goto done; |
439 | 439 | |
440 | - if (is_peripheral_enabled(musb) && !musb->gadget_driver) { | |
440 | + if (!musb->gadget_driver) { | |
441 | 441 | wakeups = 0; |
442 | 442 | } else { |
443 | 443 | wakeups = TUSB_PRCM_WHOSTDISCON |
444 | 444 | | TUSB_PRCM_WBUS |
445 | 445 | | TUSB_PRCM_WVBUS; |
446 | - if (is_otg_enabled(musb)) | |
447 | - wakeups |= TUSB_PRCM_WID; | |
446 | + wakeups |= TUSB_PRCM_WID; | |
448 | 447 | } |
449 | 448 | tusb_allow_idle(musb, wakeups); |
450 | 449 | } |
451 | 450 | |
... | ... | @@ -582,21 +581,12 @@ |
582 | 581 | * |
583 | 582 | * Note that if a mini-A cable is plugged in the ID line will stay down as |
584 | 583 | * the weak ID pull-up is not able to pull the ID up. |
585 | - * | |
586 | - * REVISIT: It would be possible to add support for changing between host | |
587 | - * and peripheral modes in non-OTG configurations by reconfiguring hardware | |
588 | - * and then setting musb->board_mode. For now, only support OTG mode. | |
589 | 584 | */ |
590 | 585 | static int tusb_musb_set_mode(struct musb *musb, u8 musb_mode) |
591 | 586 | { |
592 | 587 | void __iomem *tbase = musb->ctrl_base; |
593 | 588 | u32 otg_stat, phy_otg_ctrl, phy_otg_ena, dev_conf; |
594 | 589 | |
595 | - if (musb->board_mode != MUSB_OTG) { | |
596 | - ERR("Changing mode currently only supported in OTG mode\n"); | |
597 | - return -EINVAL; | |
598 | - } | |
599 | - | |
600 | 590 | otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT); |
601 | 591 | phy_otg_ctrl = musb_readl(tbase, TUSB_PHY_OTG_CTRL); |
602 | 592 | phy_otg_ena = musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE); |
... | ... | @@ -652,10 +642,7 @@ |
652 | 642 | if ((int_src & TUSB_INT_SRC_ID_STATUS_CHNG)) { |
653 | 643 | int default_a; |
654 | 644 | |
655 | - if (is_otg_enabled(musb)) | |
656 | - default_a = !(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS); | |
657 | - else | |
658 | - default_a = is_host_enabled(musb); | |
645 | + default_a = !(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS); | |
659 | 646 | dev_dbg(musb->controller, "Default-%c\n", default_a ? 'A' : 'B'); |
660 | 647 | otg->default_a = default_a; |
661 | 648 | tusb_musb_set_vbus(musb, default_a); |
... | ... | @@ -669,8 +656,7 @@ |
669 | 656 | if (int_src & TUSB_INT_SRC_VBUS_SENSE_CHNG) { |
670 | 657 | |
671 | 658 | /* B-dev state machine: no vbus ~= disconnect */ |
672 | - if ((is_otg_enabled(musb) && !otg->default_a) | |
673 | - || !is_host_enabled(musb)) { | |
659 | + if (!otg->default_a) { | |
674 | 660 | /* ? musb_root_disconnect(musb); */ |
675 | 661 | musb->port1_status &= |
676 | 662 | ~(USB_PORT_STAT_CONNECTION |
... | ... | @@ -1119,10 +1105,8 @@ |
1119 | 1105 | } |
1120 | 1106 | musb->isr = tusb_musb_interrupt; |
1121 | 1107 | |
1122 | - if (is_peripheral_enabled(musb)) { | |
1123 | - musb->xceiv->set_power = tusb_draw_power; | |
1124 | - the_musb = musb; | |
1125 | - } | |
1108 | + musb->xceiv->set_power = tusb_draw_power; | |
1109 | + the_musb = musb; | |
1126 | 1110 | |
1127 | 1111 | setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb); |
1128 | 1112 |