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Commit 11ad14f86a7847b084d3e3f114180be39b1c7322

Authored by Jorge Eduardo Candelaria
Committed by Liam Girdwood
1 parent 83545d836c
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

TPS65911: Add support for added GPIO lines 

GPIO 1 to 8 are added for TPS65911 chip version. The gpio driver
now handles more than one gpio lines. Subsequent versions of the
chip family can add new GPIO lines with minimal driver changes.

Signed-off-by: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>

Showing 2 changed files with 33 additions and 86 deletions Side-by-side Diff

drivers/gpio/tps65910-gpio.c
Diff comments   View file @ 11ad14f
... ... @@ -25,9 +25,9 @@
25 25 struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio);
26 26 uint8_t val;
27 27  
28   - tps65910->read(tps65910, TPS65910_GPIO0, 1, &val);
  28 + tps65910->read(tps65910, TPS65910_GPIO0 + offset, 1, &val);
29 29  
30   - if (val & GPIO0_GPIO_STS_MASK)
  30 + if (val & GPIO_STS_MASK)
31 31 return 1;
32 32  
33 33 return 0;
34 34  
... ... @@ -39,11 +39,11 @@
39 39 struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio);
40 40  
41 41 if (value)
42   - tps65910_set_bits(tps65910, TPS65910_GPIO0,
43   - GPIO0_GPIO_SET_MASK);
  42 + tps65910_set_bits(tps65910, TPS65910_GPIO0 + offset,
  43 + GPIO_SET_MASK);
44 44 else
45   - tps65910_clear_bits(tps65910, TPS65910_GPIO0,
46   - GPIO0_GPIO_SET_MASK);
  45 + tps65910_clear_bits(tps65910, TPS65910_GPIO0 + offset,
  46 + GPIO_SET_MASK);
47 47 }
48 48  
49 49 static int tps65910_gpio_output(struct gpio_chip *gc, unsigned offset,
50 50  
... ... @@ -54,15 +54,16 @@
54 54 /* Set the initial value */
55 55 tps65910_gpio_set(gc, 0, value);
56 56  
57   - return tps65910_set_bits(tps65910, TPS65910_GPIO0, GPIO0_GPIO_CFG_MASK);
  57 + return tps65910_set_bits(tps65910, TPS65910_GPIO0 + offset,
  58 + GPIO_CFG_MASK);
58 59 }
59 60  
60 61 static int tps65910_gpio_input(struct gpio_chip *gc, unsigned offset)
61 62 {
62 63 struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio);
63 64  
64   - return tps65910_clear_bits(tps65910, TPS65910_GPIO0,
65   - GPIO0_GPIO_CFG_MASK);
  65 + return tps65910_clear_bits(tps65910, TPS65910_GPIO0 + offset,
  66 + GPIO_CFG_MASK);
66 67 }
67 68  
68 69 void tps65910_gpio_init(struct tps65910 *tps65910, int gpio_base)
... ... @@ -76,7 +77,15 @@
76 77 tps65910->gpio.label = tps65910->i2c_client->name;
77 78 tps65910->gpio.dev = tps65910->dev;
78 79 tps65910->gpio.base = gpio_base;
79   - tps65910->gpio.ngpio = 1;
  80 +
  81 + switch(tps65910_chip_id(tps65910)) {
  82 + case TPS65910:
  83 + tps65910->gpio.ngpio = 6;
  84 + case TPS65911:
  85 + tps65910->gpio.ngpio = 9;
  86 + default:
  87 + return;
  88 + }
80 89 tps65910->gpio.can_sleep = 1;
81 90  
82 91 tps65910->gpio.direction_input = tps65910_gpio_input;
include/linux/mfd/tps65910.h
Diff comments   View file @ 11ad14f
... ... @@ -101,6 +101,9 @@
101 101 #define TPS65910_GPIO3 0x63
102 102 #define TPS65910_GPIO4 0x64
103 103 #define TPS65910_GPIO5 0x65
  104 +#define TPS65910_GPIO6 0x66
  105 +#define TPS65910_GPIO7 0x67
  106 +#define TPS65910_GPIO8 0x68
104 107 #define TPS65910_JTAGVERNUM 0x80
105 108 #define TPS65910_MAX_REGISTER 0x80
106 109  
... ... @@ -650,82 +653,17 @@
650 653 #define INT_MSK3_GPIO4_R_IT_MSK_SHIFT 0
651 654  
652 655  
653   -/*Register GPIO0 (0x80) register.RegisterDescription */
654   -#define GPIO0_GPIO_DEB_MASK 0x10
655   -#define GPIO0_GPIO_DEB_SHIFT 4
656   -#define GPIO0_GPIO_PUEN_MASK 0x08
657   -#define GPIO0_GPIO_PUEN_SHIFT 3
658   -#define GPIO0_GPIO_CFG_MASK 0x04
659   -#define GPIO0_GPIO_CFG_SHIFT 2
660   -#define GPIO0_GPIO_STS_MASK 0x02
661   -#define GPIO0_GPIO_STS_SHIFT 1
662   -#define GPIO0_GPIO_SET_MASK 0x01
663   -#define GPIO0_GPIO_SET_SHIFT 0
664   -
665   -
666   -/*Register GPIO1 (0x80) register.RegisterDescription */
667   -#define GPIO1_GPIO_DEB_MASK 0x10
668   -#define GPIO1_GPIO_DEB_SHIFT 4
669   -#define GPIO1_GPIO_PUEN_MASK 0x08
670   -#define GPIO1_GPIO_PUEN_SHIFT 3
671   -#define GPIO1_GPIO_CFG_MASK 0x04
672   -#define GPIO1_GPIO_CFG_SHIFT 2
673   -#define GPIO1_GPIO_STS_MASK 0x02
674   -#define GPIO1_GPIO_STS_SHIFT 1
675   -#define GPIO1_GPIO_SET_MASK 0x01
676   -#define GPIO1_GPIO_SET_SHIFT 0
677   -
678   -
679   -/*Register GPIO2 (0x80) register.RegisterDescription */
680   -#define GPIO2_GPIO_DEB_MASK 0x10
681   -#define GPIO2_GPIO_DEB_SHIFT 4
682   -#define GPIO2_GPIO_PUEN_MASK 0x08
683   -#define GPIO2_GPIO_PUEN_SHIFT 3
684   -#define GPIO2_GPIO_CFG_MASK 0x04
685   -#define GPIO2_GPIO_CFG_SHIFT 2
686   -#define GPIO2_GPIO_STS_MASK 0x02
687   -#define GPIO2_GPIO_STS_SHIFT 1
688   -#define GPIO2_GPIO_SET_MASK 0x01
689   -#define GPIO2_GPIO_SET_SHIFT 0
690   -
691   -
692   -/*Register GPIO3 (0x80) register.RegisterDescription */
693   -#define GPIO3_GPIO_DEB_MASK 0x10
694   -#define GPIO3_GPIO_DEB_SHIFT 4
695   -#define GPIO3_GPIO_PUEN_MASK 0x08
696   -#define GPIO3_GPIO_PUEN_SHIFT 3
697   -#define GPIO3_GPIO_CFG_MASK 0x04
698   -#define GPIO3_GPIO_CFG_SHIFT 2
699   -#define GPIO3_GPIO_STS_MASK 0x02
700   -#define GPIO3_GPIO_STS_SHIFT 1
701   -#define GPIO3_GPIO_SET_MASK 0x01
702   -#define GPIO3_GPIO_SET_SHIFT 0
703   -
704   -
705   -/*Register GPIO4 (0x80) register.RegisterDescription */
706   -#define GPIO4_GPIO_DEB_MASK 0x10
707   -#define GPIO4_GPIO_DEB_SHIFT 4
708   -#define GPIO4_GPIO_PUEN_MASK 0x08
709   -#define GPIO4_GPIO_PUEN_SHIFT 3
710   -#define GPIO4_GPIO_CFG_MASK 0x04
711   -#define GPIO4_GPIO_CFG_SHIFT 2
712   -#define GPIO4_GPIO_STS_MASK 0x02
713   -#define GPIO4_GPIO_STS_SHIFT 1
714   -#define GPIO4_GPIO_SET_MASK 0x01
715   -#define GPIO4_GPIO_SET_SHIFT 0
716   -
717   -
718   -/*Register GPIO5 (0x80) register.RegisterDescription */
719   -#define GPIO5_GPIO_DEB_MASK 0x10
720   -#define GPIO5_GPIO_DEB_SHIFT 4
721   -#define GPIO5_GPIO_PUEN_MASK 0x08
722   -#define GPIO5_GPIO_PUEN_SHIFT 3
723   -#define GPIO5_GPIO_CFG_MASK 0x04
724   -#define GPIO5_GPIO_CFG_SHIFT 2
725   -#define GPIO5_GPIO_STS_MASK 0x02
726   -#define GPIO5_GPIO_STS_SHIFT 1
727   -#define GPIO5_GPIO_SET_MASK 0x01
728   -#define GPIO5_GPIO_SET_SHIFT 0
  656 +/*Register GPIO (0x80) register.RegisterDescription */
  657 +#define GPIO_DEB_MASK 0x10
  658 +#define GPIO_DEB_SHIFT 4
  659 +#define GPIO_PUEN_MASK 0x08
  660 +#define GPIO_PUEN_SHIFT 3
  661 +#define GPIO_CFG_MASK 0x04
  662 +#define GPIO_CFG_SHIFT 2
  663 +#define GPIO_STS_MASK 0x02
  664 +#define GPIO_STS_SHIFT 1
  665 +#define GPIO_SET_MASK 0x01
  666 +#define GPIO_SET_SHIFT 0
729 667  
730 668  
731 669 /*Register JTAGVERNUM (0x80) register.RegisterDescription */