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Commit 1b20f6a9adaa4b88d520d279c3d605f65b898625

Authored by Sergei Shtylyov
Committed by Tejun Heo
1 parent 8bfbeed586
Exists in smarc-imx_3.14.28_1.0.0_ga and in 1 other branch imx_3.14.28_1.0.0_ga

sata_rcar: add 'base' local variable to some functions 

The 'base' field of 'struct sata_rcar_priv' is used very often
throughout the driver, so it seems worth loading it into a local
variable if it's used more than once in a function.

While at it, put some unitialized variables after intialized ones for
aesthetic reasons. :-)

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Tejun Heo <tj@kernel.org>

Showing 1 changed file with 57 additions and 45 deletions Side-by-side Diff

drivers/ata/sata_rcar.c
Diff comments   View file @ 1b20f6a
... ... @@ -130,41 +130,44 @@
130 130  
131 131 static void sata_rcar_phy_initialize(struct sata_rcar_priv *priv)
132 132 {
  133 + void __iomem *base = priv->base;
  134 +
133 135 /* idle state */
134   - iowrite32(0, priv->base + SATAPHYADDR_REG);
  136 + iowrite32(0, base + SATAPHYADDR_REG);
135 137 /* reset */
136   - iowrite32(SATAPHYRESET_PHYRST, priv->base + SATAPHYRESET_REG);
  138 + iowrite32(SATAPHYRESET_PHYRST, base + SATAPHYRESET_REG);
137 139 udelay(10);
138 140 /* deassert reset */
139   - iowrite32(0, priv->base + SATAPHYRESET_REG);
  141 + iowrite32(0, base + SATAPHYRESET_REG);
140 142 }
141 143  
142 144 static void sata_rcar_phy_write(struct sata_rcar_priv *priv, u16 reg, u32 val,
143 145 int group)
144 146 {
  147 + void __iomem *base = priv->base;
145 148 int timeout;
146 149  
147 150 /* deassert reset */
148   - iowrite32(0, priv->base + SATAPHYRESET_REG);
  151 + iowrite32(0, base + SATAPHYRESET_REG);
149 152 /* lane 1 */
150   - iowrite32(SATAPHYACCEN_PHYLANE, priv->base + SATAPHYACCEN_REG);
  153 + iowrite32(SATAPHYACCEN_PHYLANE, base + SATAPHYACCEN_REG);
151 154 /* write phy register value */
152   - iowrite32(val, priv->base + SATAPHYWDATA_REG);
  155 + iowrite32(val, base + SATAPHYWDATA_REG);
153 156 /* set register group */
154 157 if (group)
155 158 reg |= SATAPHYADDR_PHYRATEMODE;
156 159 /* write command */
157   - iowrite32(SATAPHYADDR_PHYCMD_WRITE | reg, priv->base + SATAPHYADDR_REG);
  160 + iowrite32(SATAPHYADDR_PHYCMD_WRITE | reg, base + SATAPHYADDR_REG);
158 161 /* wait for ack */
159 162 for (timeout = 0; timeout < 100; timeout++) {
160   - val = ioread32(priv->base + SATAPHYACK_REG);
  163 + val = ioread32(base + SATAPHYACK_REG);
161 164 if (val & SATAPHYACK_PHYACK)
162 165 break;
163 166 }
164 167 if (timeout >= 100)
165 168 pr_err("%s timeout\n", __func__);
166 169 /* idle state */
167   - iowrite32(0, priv->base + SATAPHYADDR_REG);
  170 + iowrite32(0, base + SATAPHYADDR_REG);
168 171 }
169 172  
170 173 static void sata_rcar_freeze(struct ata_port *ap)
171 174  
172 175  
... ... @@ -180,14 +183,15 @@
180 183 static void sata_rcar_thaw(struct ata_port *ap)
181 184 {
182 185 struct sata_rcar_priv *priv = ap->host->private_data;
  186 + void __iomem *base = priv->base;
183 187  
184 188 /* ack */
185   - iowrite32(~SATA_RCAR_INT_MASK, priv->base + SATAINTSTAT_REG);
  189 + iowrite32(~SATA_RCAR_INT_MASK, base + SATAINTSTAT_REG);
186 190  
187 191 ata_sff_thaw(ap);
188 192  
189 193 /* unmask */
190   - iowrite32(0x7ff & ~SATA_RCAR_INT_MASK, priv->base + SATAINTMASK_REG);
  194 + iowrite32(0x7ff & ~SATA_RCAR_INT_MASK, base + SATAINTMASK_REG);
191 195 }
192 196  
193 197 static void sata_rcar_ioread16_rep(void __iomem *reg, void *buffer, int count)
194 198  
195 199  
196 200  
... ... @@ -509,15 +513,16 @@
509 513 {
510 514 struct ata_port *ap = qc->ap;
511 515 unsigned int rw = qc->tf.flags & ATA_TFLAG_WRITE;
512   - u32 dmactl;
513 516 struct sata_rcar_priv *priv = ap->host->private_data;
  517 + void __iomem *base = priv->base;
  518 + u32 dmactl;
514 519  
515 520 /* load PRD table addr. */
516 521 mb(); /* make sure PRD table writes are visible to controller */
517   - iowrite32(ap->bmdma_prd_dma, priv->base + ATAPI_DTB_ADR_REG);
  522 + iowrite32(ap->bmdma_prd_dma, base + ATAPI_DTB_ADR_REG);
518 523  
519 524 /* specify data direction, triple-check start bit is clear */
520   - dmactl = ioread32(priv->base + ATAPI_CONTROL1_REG);
  525 + dmactl = ioread32(base + ATAPI_CONTROL1_REG);
521 526 dmactl &= ~(ATAPI_CONTROL1_RW | ATAPI_CONTROL1_STOP);
522 527 if (dmactl & ATAPI_CONTROL1_START) {
523 528 dmactl &= ~ATAPI_CONTROL1_START;
... ... @@ -525,7 +530,7 @@
525 530 }
526 531 if (!rw)
527 532 dmactl |= ATAPI_CONTROL1_RW;
528   - iowrite32(dmactl, priv->base + ATAPI_CONTROL1_REG);
  533 + iowrite32(dmactl, base + ATAPI_CONTROL1_REG);
529 534  
530 535 /* issue r/w command */
531 536 ap->ops->sff_exec_command(ap, &qc->tf);
532 537  
533 538  
534 539  
535 540  
536 541  
537 542  
... ... @@ -534,27 +539,29 @@
534 539 static void sata_rcar_bmdma_start(struct ata_queued_cmd *qc)
535 540 {
536 541 struct ata_port *ap = qc->ap;
537   - u32 dmactl;
538 542 struct sata_rcar_priv *priv = ap->host->private_data;
  543 + void __iomem *base = priv->base;
  544 + u32 dmactl;
539 545  
540 546 /* start host DMA transaction */
541   - dmactl = ioread32(priv->base + ATAPI_CONTROL1_REG);
  547 + dmactl = ioread32(base + ATAPI_CONTROL1_REG);
542 548 dmactl |= ATAPI_CONTROL1_START;
543   - iowrite32(dmactl, priv->base + ATAPI_CONTROL1_REG);
  549 + iowrite32(dmactl, base + ATAPI_CONTROL1_REG);
544 550 }
545 551  
546 552 static void sata_rcar_bmdma_stop(struct ata_queued_cmd *qc)
547 553 {
548 554 struct ata_port *ap = qc->ap;
549 555 struct sata_rcar_priv *priv = ap->host->private_data;
  556 + void __iomem *base = priv->base;
550 557 u32 dmactl;
551 558  
552 559 /* force termination of DMA transfer if active */
553   - dmactl = ioread32(priv->base + ATAPI_CONTROL1_REG);
  560 + dmactl = ioread32(base + ATAPI_CONTROL1_REG);
554 561 if (dmactl & ATAPI_CONTROL1_START) {
555 562 dmactl &= ~ATAPI_CONTROL1_START;
556 563 dmactl |= ATAPI_CONTROL1_STOP;
557   - iowrite32(dmactl, priv->base + ATAPI_CONTROL1_REG);
  564 + iowrite32(dmactl, base + ATAPI_CONTROL1_REG);
558 565 }
559 566  
560 567 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
561 568  
... ... @@ -564,8 +571,8 @@
564 571 static u8 sata_rcar_bmdma_status(struct ata_port *ap)
565 572 {
566 573 struct sata_rcar_priv *priv = ap->host->private_data;
567   - u32 status;
568 574 u8 host_stat = 0;
  575 + u32 status;
569 576  
570 577 status = ioread32(priv->base + ATAPI_STATUS_REG);
571 578 if (status & ATAPI_STATUS_DEVINT)
572 579  
573 580  
574 581  
... ... @@ -666,19 +673,19 @@
666 673 {
667 674 struct ata_host *host = dev_instance;
668 675 struct sata_rcar_priv *priv = host->private_data;
669   - struct ata_port *ap;
  676 + void __iomem *base = priv->base;
670 677 unsigned int handled = 0;
  678 + struct ata_port *ap;
671 679 u32 sataintstat;
672 680 unsigned long flags;
673 681  
674 682 spin_lock_irqsave(&host->lock, flags);
675 683  
676   - sataintstat = ioread32(priv->base + SATAINTSTAT_REG);
  684 + sataintstat = ioread32(base + SATAINTSTAT_REG);
677 685 if (!sataintstat)
678 686 goto done;
679 687 /* ack */
680   - iowrite32(sataintstat & ~SATA_RCAR_INT_MASK,
681   - priv->base + SATAINTSTAT_REG);
  688 + iowrite32(sataintstat & ~SATA_RCAR_INT_MASK, base + SATAINTSTAT_REG);
682 689  
683 690 ap = host->ports[0];
684 691  
685 692  
... ... @@ -699,15 +706,16 @@
699 706 struct ata_port *ap = host->ports[0];
700 707 struct ata_ioports *ioaddr = &ap->ioaddr;
701 708 struct sata_rcar_priv *priv = host->private_data;
  709 + void __iomem *base = priv->base;
702 710  
703 711 ap->ops = &sata_rcar_port_ops;
704 712 ap->pio_mask = ATA_PIO4;
705 713 ap->udma_mask = ATA_UDMA6;
706 714 ap->flags |= ATA_FLAG_SATA;
707 715  
708   - ioaddr->cmd_addr = priv->base + SDATA_REG;
709   - ioaddr->ctl_addr = priv->base + SSDEVCON_REG;
710   - ioaddr->scr_addr = priv->base + SCRSSTS_REG;
  716 + ioaddr->cmd_addr = base + SDATA_REG;
  717 + ioaddr->ctl_addr = base + SSDEVCON_REG;
  718 + ioaddr->scr_addr = base + SCRSSTS_REG;
711 719 ioaddr->altstatus_addr = ioaddr->ctl_addr;
712 720  
713 721 ioaddr->data_addr = ioaddr->cmd_addr + (ATA_REG_DATA << 2);
... ... @@ -725,6 +733,7 @@
725 733 static void sata_rcar_init_controller(struct ata_host *host)
726 734 {
727 735 struct sata_rcar_priv *priv = host->private_data;
  736 + void __iomem *base = priv->base;
728 737 u32 val;
729 738  
730 739 /* reset and setup phy */
731 740  
732 741  
733 742  
734 743  
735 744  
736 745  
737 746  
... ... @@ -737,27 +746,27 @@
737 746 sata_rcar_phy_write(priv, SATAPCTLR4_REG, 0x28E80000, 0);
738 747  
739 748 /* SATA-IP reset state */
740   - val = ioread32(priv->base + ATAPI_CONTROL1_REG);
  749 + val = ioread32(base + ATAPI_CONTROL1_REG);
741 750 val |= ATAPI_CONTROL1_RESET;
742   - iowrite32(val, priv->base + ATAPI_CONTROL1_REG);
  751 + iowrite32(val, base + ATAPI_CONTROL1_REG);
743 752  
744 753 /* ISM mode, PRD mode, DTEND flag at bit 0 */
745   - val = ioread32(priv->base + ATAPI_CONTROL1_REG);
  754 + val = ioread32(base + ATAPI_CONTROL1_REG);
746 755 val |= ATAPI_CONTROL1_ISM;
747 756 val |= ATAPI_CONTROL1_DESE;
748 757 val |= ATAPI_CONTROL1_DTA32M;
749   - iowrite32(val, priv->base + ATAPI_CONTROL1_REG);
  758 + iowrite32(val, base + ATAPI_CONTROL1_REG);
750 759  
751 760 /* Release the SATA-IP from the reset state */
752   - val = ioread32(priv->base + ATAPI_CONTROL1_REG);
  761 + val = ioread32(base + ATAPI_CONTROL1_REG);
753 762 val &= ~ATAPI_CONTROL1_RESET;
754   - iowrite32(val, priv->base + ATAPI_CONTROL1_REG);
  763 + iowrite32(val, base + ATAPI_CONTROL1_REG);
755 764  
756 765 /* ack and mask */
757   - iowrite32(0, priv->base + SATAINTSTAT_REG);
758   - iowrite32(0x7ff, priv->base + SATAINTMASK_REG);
  766 + iowrite32(0, base + SATAINTSTAT_REG);
  767 + iowrite32(0x7ff, base + SATAINTMASK_REG);
759 768 /* enable interrupts */
760   - iowrite32(ATAPI_INT_ENABLE_SATAINT, priv->base + ATAPI_INT_ENABLE_REG);
  769 + iowrite32(ATAPI_INT_ENABLE_SATAINT, base + ATAPI_INT_ENABLE_REG);
761 770 }
762 771  
763 772 static int sata_rcar_probe(struct platform_device *pdev)
764 773  
765 774  
... ... @@ -824,14 +833,15 @@
824 833 {
825 834 struct ata_host *host = platform_get_drvdata(pdev);
826 835 struct sata_rcar_priv *priv = host->private_data;
  836 + void __iomem *base = priv->base;
827 837  
828 838 ata_host_detach(host);
829 839  
830 840 /* disable interrupts */
831   - iowrite32(0, priv->base + ATAPI_INT_ENABLE_REG);
  841 + iowrite32(0, base + ATAPI_INT_ENABLE_REG);
832 842 /* ack and mask */
833   - iowrite32(0, priv->base + SATAINTSTAT_REG);
834   - iowrite32(0x7ff, priv->base + SATAINTMASK_REG);
  843 + iowrite32(0, base + SATAINTSTAT_REG);
  844 + iowrite32(0x7ff, base + SATAINTMASK_REG);
835 845  
836 846 clk_disable(priv->clk);
837 847  
838 848  
839 849  
... ... @@ -843,14 +853,15 @@
843 853 {
844 854 struct ata_host *host = dev_get_drvdata(dev);
845 855 struct sata_rcar_priv *priv = host->private_data;
  856 + void __iomem *base = priv->base;
846 857 int ret;
847 858  
848 859 ret = ata_host_suspend(host, PMSG_SUSPEND);
849 860 if (!ret) {
850 861 /* disable interrupts */
851   - iowrite32(0, priv->base + ATAPI_INT_ENABLE_REG);
  862 + iowrite32(0, base + ATAPI_INT_ENABLE_REG);
852 863 /* mask */
853   - iowrite32(0x7ff, priv->base + SATAINTMASK_REG);
  864 + iowrite32(0x7ff, base + SATAINTMASK_REG);
854 865  
855 866 clk_disable(priv->clk);
856 867 }
857 868  
858 869  
... ... @@ -862,14 +873,15 @@
862 873 {
863 874 struct ata_host *host = dev_get_drvdata(dev);
864 875 struct sata_rcar_priv *priv = host->private_data;
  876 + void __iomem *base = priv->base;
865 877  
866 878 clk_enable(priv->clk);
867 879  
868 880 /* ack and mask */
869   - iowrite32(0, priv->base + SATAINTSTAT_REG);
870   - iowrite32(0x7ff, priv->base + SATAINTMASK_REG);
  881 + iowrite32(0, base + SATAINTSTAT_REG);
  882 + iowrite32(0x7ff, base + SATAINTMASK_REG);
871 883 /* enable interrupts */
872   - iowrite32(ATAPI_INT_ENABLE_SATAINT, priv->base + ATAPI_INT_ENABLE_REG);
  884 + iowrite32(ATAPI_INT_ENABLE_SATAINT, base + ATAPI_INT_ENABLE_REG);
873 885  
874 886 ata_host_resume(host);
875 887