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Commit 55bf75b7dd8ec875d048824f3cdecf8254e292e5

Authored by Michel Stempin
Committed by Artem Bityutskiy
1 parent 62116e5171
Exists in smarc-l5.0.0_1.0.0-ga and in 5 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga

mtd: chips: Add support for GigaDevice GD25Q32/GD25Q64 SPI Flash in m25p80.c 

Add support for GigaDevice GD25Q32 32 Mbit (4 MB) SPI Flash (see datasheet:
http://www.gigadevice.com/UserFiles/GD25Q32_Rev0.2(1).pdf) used in Hame MPR-A1
and clones, and for GigaDevice GD25Q64 64 Mbit (8 MB) SPI Flash used in
Hame MPR-A2 devices (datasheet: http://www.gigadevice.com/UserFiles/GD25Q64.pdf).

Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>

Showing 1 changed file with 4 additions and 0 deletions Side-by-side Diff

drivers/mtd/devices/m25p80.c
Diff comments   View file @ 55bf75b
... ... @@ -732,6 +732,10 @@
732 732 /* Everspin */
733 733 { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2) },
734 734  
  735 + /* GigaDevice */
  736 + { "gd25q32", INFO(0xc84016, 0, 64 * 1024, 64, SECT_4K) },
  737 + { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
  738 +
735 739 /* Intel/Numonyx -- xxxs33b */
736 740 { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, 0) },
737 741 { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, 0) },