clk: add device tree fixed-factor-clock binding support

Add support for DT "fixed-factor-clock" binding to the common fixed factor clock support. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>

clk: add device tree fixed-factor-clock binding support
Add support for DT "fixed-factor-clock" binding to the common fixed factor clock support. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Gregory CLEMENT · Mike Turquette
1 parent fb72a0590b
Showing 3 changed files with 62 additions and 0 deletions Side-by-side Diff
Documentation/devicetree/bindings/clock/fixed-factor-clock.txt
drivers/clk/clk-fixed-factor.c
include/linux/clk-provider.h
+Binding for simple fixed factor rate clock sources.
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+Required properties:
+- compatible : shall be "fixed-factor-clock".
+- #clock-cells : from common clock binding; shall be set to 0.
+- clock-div: fixed divider.
+- clock-mult: fixed multiplier.
+- clocks: parent clock.
+
+Optional properties:
+- clock-output-names : From common clock binding.
+
+Example:
+	clock {
+		compatible = "fixed-factor-clock";
+		clocks = <&parentclk>;
+		#clock-cells = <0>;
+		div = <2>;
+		mult = <1>;
+	};
@@ -11,6 +11,7 @@
 #include <linux/clk-provider.h>
 #include <linux/slab.h>
 #include <linux/err.h>
+#include <linux/of.h>
  
 /*
  * DOC: basic fixed multiplier and divider clock that cannot gate
@@ -96,4 +97,39 @@
  
 	return clk;
 }
+#ifdef CONFIG_OF
+/**
+ * of_fixed_factor_clk_setup() - Setup function for simple fixed factor clock
+ */
+void __init of_fixed_factor_clk_setup(struct device_node *node)
+{
+	struct clk *clk;
+	const char *clk_name = node->name;
+	const char *parent_name;
+	u32 div, mult;
+
+	if (of_property_read_u32(node, "clock-div", &div)) {
+		pr_err("%s Fixed factor clock <%s> must have a clock-div property\n",
+			__func__, node->name);
+		return;
+	}
+
+	if (of_property_read_u32(node, "clock-mult", &mult)) {
+		pr_err("%s Fixed factor clock <%s> must have a clokc-mult property\n",
+			__func__, node->name);
+		return;
+	}
+
+	of_property_read_string(node, "clock-output-names", &clk_name);
+	parent_name = of_clk_get_parent_name(node, 0);
+
+	clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0,
+					mult, div);
+	if (!IS_ERR(clk))
+		of_clk_add_provider(node, of_clk_src_simple_get, clk);
+}
+EXPORT_SYMBOL_GPL(of_fixed_factor_clk_setup);
+CLK_OF_DECLARE(fixed_factor_clk, "fixed-factor-clock",
+		of_fixed_factor_clk_setup);
+#endif
@@ -325,6 +325,8 @@
 		void __iomem *reg, u8 shift, u32 mask,
 		u8 clk_mux_flags, u32 *table, spinlock_t *lock);
  
+void of_fixed_factor_clk_setup(struct device_node *node);
+
 /**
  * struct clk_fixed_factor - fixed multiplier and divider clock
  *
	1	+Binding for simple fixed factor rate clock sources.
	2	+
	3	+This binding uses the common clock binding[1].
	4	+
	5	+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
	6	+
	7	+Required properties:
	8	+- compatible : shall be "fixed-factor-clock".
	9	+- #clock-cells : from common clock binding; shall be set to 0.
	10	+- clock-div: fixed divider.
	11	+- clock-mult: fixed multiplier.
	12	+- clocks: parent clock.
	13	+
	14	+Optional properties:
	15	+- clock-output-names : From common clock binding.
	16	+
	17	+Example:
	18	+ clock {
	19	+ compatible = "fixed-factor-clock";
	20	+ clocks = <&parentclk>;
	21	+ #clock-cells = <0>;
	22	+ div = <2>;
	23	+ mult = <1>;
	24	+ };
...	...	@@ -11,6 +11,7 @@
11	11	#include <linux/clk-provider.h>
12	12	#include <linux/slab.h>
13	13	#include <linux/err.h>
	14	+#include <linux/of.h>
14	15
15	16	/*
16	17	* DOC: basic fixed multiplier and divider clock that cannot gate
...	...	@@ -96,4 +97,39 @@
96	97
97	98	return clk;
98	99	}
	100	+#ifdef CONFIG_OF
	101	+/**
	102	+ * of_fixed_factor_clk_setup() - Setup function for simple fixed factor clock
	103	+ */
	104	+void __init of_fixed_factor_clk_setup(struct device_node *node)
	105	+{
	106	+ struct clk *clk;
	107	+ const char *clk_name = node->name;
	108	+ const char *parent_name;
	109	+ u32 div, mult;
	110	+
	111	+ if (of_property_read_u32(node, "clock-div", &div)) {
	112	+ pr_err("%s Fixed factor clock <%s> must have a clock-div property\n",
	113	+ __func__, node->name);
	114	+ return;
	115	+ }
	116	+
	117	+ if (of_property_read_u32(node, "clock-mult", &mult)) {
	118	+ pr_err("%s Fixed factor clock <%s> must have a clokc-mult property\n",
	119	+ __func__, node->name);
	120	+ return;
	121	+ }
	122	+
	123	+ of_property_read_string(node, "clock-output-names", &clk_name);
	124	+ parent_name = of_clk_get_parent_name(node, 0);
	125	+
	126	+ clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0,
	127	+ mult, div);
	128	+ if (!IS_ERR(clk))
	129	+ of_clk_add_provider(node, of_clk_src_simple_get, clk);
	130	+}
	131	+EXPORT_SYMBOL_GPL(of_fixed_factor_clk_setup);
	132	+CLK_OF_DECLARE(fixed_factor_clk, "fixed-factor-clock",
	133	+ of_fixed_factor_clk_setup);
	134	+#endif
...	...	@@ -325,6 +325,8 @@
325	325	void __iomem *reg, u8 shift, u32 mask,
326	326	u8 clk_mux_flags, u32 table, spinlock_t lock);
327	327
	328	+void of_fixed_factor_clk_setup(struct device_node *node);
	329	+
328	330	/**
329	331	* struct clk_fixed_factor - fixed multiplier and divider clock
330	332	*