Commit 7d0857a54aedbd47b3de503933d65ce462970bd6
1 parent
57e26e5745
Exists in
smarc-imx_3.14.28_1.0.0_ga
and in
1 other branch
ARC: [SMP] Disallow RTSC
RTSC is strictly incore and must not be allowed in SMP configs Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Showing 2 changed files with 5 additions and 8 deletions Side-by-side Diff
arch/arc/Kconfig
... | ... | @@ -136,9 +136,6 @@ |
136 | 136 | config ARC_HAS_COH_CACHES |
137 | 137 | def_bool n |
138 | 138 | |
139 | -config ARC_HAS_COH_RTSC | |
140 | - def_bool n | |
141 | - | |
142 | 139 | config ARC_HAS_REENTRANT_IRQ_LV2 |
143 | 140 | def_bool n |
144 | 141 | |
... | ... | @@ -332,8 +329,7 @@ |
332 | 329 | bool "Insn: RTSC (64-bit r/o cycle counter)" |
333 | 330 | default y |
334 | 331 | depends on ARC_CPU_REL_4_10 |
335 | - # if SMP, enable RTSC only if counter is coherent across cores | |
336 | - depends on !SMP || ARC_HAS_COH_RTSC | |
332 | + depends on !SMP | |
337 | 333 | |
338 | 334 | endmenu # "ARC CPU Configuration" |
339 | 335 |
arch/arc/kernel/time.c
... | ... | @@ -63,9 +63,10 @@ |
63 | 63 | |
64 | 64 | int arc_counter_setup(void) |
65 | 65 | { |
66 | - /* RTSC insn taps into cpu clk, needs no setup */ | |
67 | - | |
68 | - /* For SMP, only allowed if cross-core-sync, hence usable as cs */ | |
66 | + /* | |
67 | + * For SMP this needs to be 0. However Kconfig glue doesn't | |
68 | + * enable this option for SMP configs | |
69 | + */ | |
69 | 70 | return 1; |
70 | 71 | } |
71 | 72 |