Doug / smarc-fsl-linux-kernel

Download as
Browse Code ยป

Commit 94c657853bd228ebbc2c590b7f81efcc1dde3329

Authored by Tony Lindgren
2 parents 27615a97b2 2b6c4e7324
Exists in smarc-l5.0.0_1.0.0-ga and in 5 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga

Merge branch 'omap-for-v3.8/cleanup-headers-dma' into omap-for-v3.8/cleanup-headers 

Conflicts:
	drivers/crypto/omap-aes.c
	drivers/crypto/omap-sham.c
	drivers/dma/omap-dma.c

Showing 53 changed files Side-by-side Diff

arch/arm/mach-omap1/board-h2.c
Diff comments   View file @ 94c6578
... ... @@ -39,7 +39,7 @@
39 39 #include <asm/mach/map.h>
40 40  
41 41 #include <mach/mux.h>
42   -#include <plat/dma.h>
  42 +#include <plat-omap/dma-omap.h>
43 43 #include <plat/tc.h>
44 44 #include <mach/irda.h>
45 45 #include <linux/platform_data/keypad-omap.h>
... ... @@ -50,6 +50,7 @@
50 50  
51 51 #include "common.h"
52 52 #include "board-h2.h"
  53 +#include "dma.h"
53 54  
54 55 /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
55 56 #define OMAP1610_ETHR_START 0x04000300
arch/arm/mach-omap1/board-h3.c
Diff comments   View file @ 94c6578
... ... @@ -43,7 +43,7 @@
43 43 #include <mach/mux.h>
44 44 #include <plat/tc.h>
45 45 #include <linux/platform_data/keypad-omap.h>
46   -#include <plat/dma.h>
  46 +#include <plat-omap/dma-omap.h>
47 47 #include <mach/flash.h>
48 48  
49 49 #include <mach/hardware.h>
arch/arm/mach-omap1/board-palmte.c
Diff comments   View file @ 94c6578
... ... @@ -37,7 +37,7 @@
37 37 #include <mach/flash.h>
38 38 #include <mach/mux.h>
39 39 #include <plat/tc.h>
40   -#include <plat/dma.h>
  40 +#include <plat-omap/dma-omap.h>
41 41 #include <mach/irda.h>
42 42 #include <linux/platform_data/keypad-omap.h>
43 43  
... ... @@ -45,6 +45,7 @@
45 45 #include <mach/usb.h>
46 46  
47 47 #include "common.h"
  48 +#include "dma.h"
48 49  
49 50 #define PALMTE_USBDETECT_GPIO 0
50 51 #define PALMTE_USB_OR_DC_GPIO 1
arch/arm/mach-omap1/board-palmtt.c
Diff comments   View file @ 94c6578
... ... @@ -36,7 +36,7 @@
36 36 #include <plat/led.h>
37 37 #include <mach/flash.h>
38 38 #include <mach/mux.h>
39   -#include <plat/dma.h>
  39 +#include <plat-omap/dma-omap.h>
40 40 #include <plat/tc.h>
41 41 #include <mach/irda.h>
42 42 #include <linux/platform_data/keypad-omap.h>
... ... @@ -45,6 +45,7 @@
45 45 #include <mach/usb.h>
46 46  
47 47 #include "common.h"
  48 +#include "dma.h"
48 49  
49 50 #define PALMTT_USBDETECT_GPIO 0
50 51 #define PALMTT_CABLE_GPIO 1
arch/arm/mach-omap1/board-palmz71.c
Diff comments   View file @ 94c6578
... ... @@ -38,7 +38,7 @@
38 38  
39 39 #include <mach/flash.h>
40 40 #include <mach/mux.h>
41   -#include <plat/dma.h>
  41 +#include <plat-omap/dma-omap.h>
42 42 #include <plat/tc.h>
43 43 #include <mach/irda.h>
44 44 #include <linux/platform_data/keypad-omap.h>
... ... @@ -47,6 +47,7 @@
47 47 #include <mach/usb.h>
48 48  
49 49 #include "common.h"
  50 +#include "dma.h"
50 51  
51 52 #define PALMZ71_USBDETECT_GPIO 0
52 53 #define PALMZ71_PENIRQ_GPIO 6
arch/arm/mach-omap1/board-sx1.c
Diff comments   View file @ 94c6578
... ... @@ -36,7 +36,7 @@
36 36  
37 37 #include <mach/flash.h>
38 38 #include <mach/mux.h>
39   -#include <plat/dma.h>
  39 +#include <plat-omap/dma-omap.h>
40 40 #include <mach/irda.h>
41 41 #include <plat/tc.h>
42 42 #include <mach/board-sx1.h>
... ... @@ -45,6 +45,7 @@
45 45 #include <mach/usb.h>
46 46  
47 47 #include "common.h"
  48 +#include "dma.h"
48 49  
49 50 /* Write to I2C device */
50 51 int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value)
arch/arm/mach-omap1/devices.c
Diff comments   View file @ 94c6578
... ... @@ -21,7 +21,6 @@
21 21  
22 22 #include <plat/tc.h>
23 23 #include <mach/mux.h>
24   -#include <plat/dma.h>
25 24 #include <plat/mmc.h>
26 25  
27 26 #include <mach/omap7xx.h>
... ... @@ -30,6 +29,7 @@
30 29  
31 30 #include "common.h"
32 31 #include "clock.h"
  32 +#include "dma.h"
33 33  
34 34 #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
35 35  
arch/arm/mach-omap1/dma.c
Diff comments   View file @ 94c6578
... ... @@ -25,10 +25,12 @@
25 25 #include <linux/device.h>
26 26 #include <linux/io.h>
27 27  
28   -#include <plat/dma.h>
  28 +#include <plat-omap/dma-omap.h>
29 29 #include <plat/tc.h>
30 30  
31 31 #include <mach/irqs.h>
  32 +
  33 +#include "dma.h"
32 34  
33 35 #define OMAP1_DMA_BASE (0xfffed800)
34 36 #define OMAP1_LOGICAL_DMA_CH_COUNT 17
arch/arm/mach-omap1/dma.h
Diff comments   View file @ 94c6578
  1 +/*
  2 + * OMAP1 DMA channel definitions
  3 + *
  4 + * This program is free software; you can redistribute it and/or modify
  5 + * it under the terms of the GNU General Public License as published by
  6 + * the Free Software Foundation; either version 2 of the License, or
  7 + * (at your option) any later version.
  8 + *
  9 + * This program is distributed in the hope that it will be useful,
  10 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12 + * GNU General Public License for more details.
  13 + *
  14 + * You should have received a copy of the GNU General Public License
  15 + * along with this program; if not, write to the Free Software
  16 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  17 + */
  18 +
  19 +#ifndef __OMAP1_DMA_CHANNEL_H
  20 +#define __OMAP1_DMA_CHANNEL_H
  21 +
  22 +/* DMA channels for omap1 */
  23 +#define OMAP_DMA_NO_DEVICE 0
  24 +#define OMAP_DMA_MCSI1_TX 1
  25 +#define OMAP_DMA_MCSI1_RX 2
  26 +#define OMAP_DMA_I2C_RX 3
  27 +#define OMAP_DMA_I2C_TX 4
  28 +#define OMAP_DMA_EXT_NDMA_REQ 5
  29 +#define OMAP_DMA_EXT_NDMA_REQ2 6
  30 +#define OMAP_DMA_UWIRE_TX 7
  31 +#define OMAP_DMA_MCBSP1_TX 8
  32 +#define OMAP_DMA_MCBSP1_RX 9
  33 +#define OMAP_DMA_MCBSP3_TX 10
  34 +#define OMAP_DMA_MCBSP3_RX 11
  35 +#define OMAP_DMA_UART1_TX 12
  36 +#define OMAP_DMA_UART1_RX 13
  37 +#define OMAP_DMA_UART2_TX 14
  38 +#define OMAP_DMA_UART2_RX 15
  39 +#define OMAP_DMA_MCBSP2_TX 16
  40 +#define OMAP_DMA_MCBSP2_RX 17
  41 +#define OMAP_DMA_UART3_TX 18
  42 +#define OMAP_DMA_UART3_RX 19
  43 +#define OMAP_DMA_CAMERA_IF_RX 20
  44 +#define OMAP_DMA_MMC_TX 21
  45 +#define OMAP_DMA_MMC_RX 22
  46 +#define OMAP_DMA_NAND 23
  47 +#define OMAP_DMA_IRQ_LCD_LINE 24
  48 +#define OMAP_DMA_MEMORY_STICK 25
  49 +#define OMAP_DMA_USB_W2FC_RX0 26
  50 +#define OMAP_DMA_USB_W2FC_RX1 27
  51 +#define OMAP_DMA_USB_W2FC_RX2 28
  52 +#define OMAP_DMA_USB_W2FC_TX0 29
  53 +#define OMAP_DMA_USB_W2FC_TX1 30
  54 +#define OMAP_DMA_USB_W2FC_TX2 31
  55 +
  56 +/* These are only for 1610 */
  57 +#define OMAP_DMA_CRYPTO_DES_IN 32
  58 +#define OMAP_DMA_SPI_TX 33
  59 +#define OMAP_DMA_SPI_RX 34
  60 +#define OMAP_DMA_CRYPTO_HASH 35
  61 +#define OMAP_DMA_CCP_ATTN 36
  62 +#define OMAP_DMA_CCP_FIFO_NOT_EMPTY 37
  63 +#define OMAP_DMA_CMT_APE_TX_CHAN_0 38
  64 +#define OMAP_DMA_CMT_APE_RV_CHAN_0 39
  65 +#define OMAP_DMA_CMT_APE_TX_CHAN_1 40
  66 +#define OMAP_DMA_CMT_APE_RV_CHAN_1 41
  67 +#define OMAP_DMA_CMT_APE_TX_CHAN_2 42
  68 +#define OMAP_DMA_CMT_APE_RV_CHAN_2 43
  69 +#define OMAP_DMA_CMT_APE_TX_CHAN_3 44
  70 +#define OMAP_DMA_CMT_APE_RV_CHAN_3 45
  71 +#define OMAP_DMA_CMT_APE_TX_CHAN_4 46
  72 +#define OMAP_DMA_CMT_APE_RV_CHAN_4 47
  73 +#define OMAP_DMA_CMT_APE_TX_CHAN_5 48
  74 +#define OMAP_DMA_CMT_APE_RV_CHAN_5 49
  75 +#define OMAP_DMA_CMT_APE_TX_CHAN_6 50
  76 +#define OMAP_DMA_CMT_APE_RV_CHAN_6 51
  77 +#define OMAP_DMA_CMT_APE_TX_CHAN_7 52
  78 +#define OMAP_DMA_CMT_APE_RV_CHAN_7 53
  79 +#define OMAP_DMA_MMC2_TX 54
  80 +#define OMAP_DMA_MMC2_RX 55
  81 +#define OMAP_DMA_CRYPTO_DES_OUT 56
  82 +
  83 +#endif /* __OMAP1_DMA_CHANNEL_H */
arch/arm/mach-omap1/io.c
Diff comments   View file @ 94c6578
... ... @@ -18,7 +18,7 @@
18 18  
19 19 #include <mach/mux.h>
20 20 #include <plat/tc.h>
21   -#include <plat/dma.h>
  21 +#include <plat-omap/dma-omap.h>
22 22  
23 23 #include "iomap.h"
24 24 #include "common.h"
arch/arm/mach-omap1/lcd_dma.c
Diff comments   View file @ 94c6578
... ... @@ -27,10 +27,12 @@
27 27 #include <linux/interrupt.h>
28 28 #include <linux/io.h>
29 29  
30   -#include <plat/dma.h>
  30 +#include <plat-omap/dma-omap.h>
31 31  
32 32 #include <mach/hardware.h>
33 33 #include <mach/lcdc.h>
  34 +
  35 +#include "dma.h"
34 36  
35 37 int omap_lcd_dma_running(void)
36 38 {
arch/arm/mach-omap1/mcbsp.c
Diff comments   View file @ 94c6578
... ... @@ -19,7 +19,7 @@
19 19 #include <linux/platform_device.h>
20 20 #include <linux/slab.h>
21 21  
22   -#include <plat/dma.h>
  22 +#include <plat-omap/dma-omap.h>
23 23 #include <mach/mux.h>
24 24 #include <plat/cpu.h>
25 25 #include <linux/platform_data/asoc-ti-mcbsp.h>
... ... @@ -27,6 +27,7 @@
27 27 #include <mach/irqs.h>
28 28  
29 29 #include "iomap.h"
  30 +#include "dma.h"
30 31  
31 32 #define DPS_RSTCT2_PER_EN (1 << 0)
32 33 #define DSP_RSTCT2_WD_PER_EN (1 << 1)
arch/arm/mach-omap1/pm.c
Diff comments   View file @ 94c6578
... ... @@ -54,7 +54,7 @@
54 54 #include <plat/sram.h>
55 55 #include <plat/tc.h>
56 56 #include <mach/mux.h>
57   -#include <plat/dma.h>
  57 +#include <plat-omap/dma-omap.h>
58 58 #include <plat/dmtimer.h>
59 59  
60 60 #include <mach/irqs.h>
arch/arm/mach-omap2/board-3430sdp.c
Diff comments   View file @ 94c6578
... ... @@ -32,7 +32,7 @@
32 32  
33 33 #include <plat/usb.h>
34 34 #include "common.h"
35   -#include <plat/dma.h>
  35 +#include <plat-omap/dma-omap.h>
36 36 #include <plat/gpmc.h>
37 37 #include <video/omapdss.h>
38 38 #include <video/omap-panel-tfp410.h>
arch/arm/mach-omap2/board-h4.c
Diff comments   View file @ 94c6578
... ... @@ -32,7 +32,7 @@
32 32 #include <asm/mach/map.h>
33 33  
34 34 #include <plat/menelaus.h>
35   -#include <plat/dma.h>
  35 +#include <plat-omap/dma-omap.h>
36 36 #include <plat/gpmc.h>
37 37 #include "debug-devices.h"
38 38  
arch/arm/mach-omap2/board-rx51-peripherals.c
Diff comments   View file @ 94c6578
... ... @@ -31,7 +31,7 @@
31 31 #include <asm/system_info.h>
32 32  
33 33 #include "common.h"
34   -#include <plat/dma.h>
  34 +#include <plat-omap/dma-omap.h>
35 35 #include <plat/gpmc.h>
36 36 #include <plat/omap-pm.h>
37 37 #include "gpmc-smc91x.h"
arch/arm/mach-omap2/board-rx51.c
Diff comments   View file @ 94c6578
... ... @@ -24,7 +24,7 @@
24 24 #include <asm/mach/map.h>
25 25  
26 26 #include "common.h"
27   -#include <plat/dma.h>
  27 +#include <plat-omap/dma-omap.h>
28 28 #include <plat/gpmc.h>
29 29 #include <plat/usb.h>
30 30  
arch/arm/mach-omap2/devices.c
Diff comments   View file @ 94c6578
... ... @@ -24,7 +24,7 @@
24 24 #include <asm/mach/map.h>
25 25  
26 26 #include "iomap.h"
27   -#include <plat/dma.h>
  27 +#include <plat-omap/dma-omap.h>
28 28 #include <plat/omap_hwmod.h>
29 29 #include <plat/omap_device.h>
30 30 #include "omap4-keypad.h"
... ... @@ -34,6 +34,7 @@
34 34 #include "mux.h"
35 35 #include "control.h"
36 36 #include "devices.h"
  37 +#include "dma.h"
37 38  
38 39 #define L3_MODULES_MAX_LEN 12
39 40 #define L3_MODULES 3
arch/arm/mach-omap2/dma.c
Diff comments   View file @ 94c6578
... ... @@ -30,7 +30,7 @@
30 30  
31 31 #include <plat/omap_hwmod.h>
32 32 #include <plat/omap_device.h>
33   -#include <plat/dma.h>
  33 +#include <plat-omap/dma-omap.h>
34 34  
35 35 #define OMAP2_DMA_STRIDE 0x60
36 36  
arch/arm/mach-omap2/dma.h
Diff comments   View file @ 94c6578
  1 +/*
  2 + * OMAP2PLUS DMA channel definitions
  3 + *
  4 + * This program is free software; you can redistribute it and/or modify
  5 + * it under the terms of the GNU General Public License as published by
  6 + * the Free Software Foundation; either version 2 of the License, or
  7 + * (at your option) any later version.
  8 + *
  9 + * This program is distributed in the hope that it will be useful,
  10 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12 + * GNU General Public License for more details.
  13 + *
  14 + * You should have received a copy of the GNU General Public License
  15 + * along with this program; if not, write to the Free Software
  16 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  17 + */
  18 +
  19 +#ifndef __OMAP2PLUS_DMA_CHANNEL_H
  20 +#define __OMAP2PLUS_DMA_CHANNEL_H
  21 +
  22 +
  23 +/* DMA channels for 24xx */
  24 +#define OMAP24XX_DMA_NO_DEVICE 0
  25 +#define OMAP24XX_DMA_XTI_DMA 1 /* S_DMA_0 */
  26 +#define OMAP24XX_DMA_EXT_DMAREQ0 2 /* S_DMA_1 */
  27 +#define OMAP24XX_DMA_EXT_DMAREQ1 3 /* S_DMA_2 */
  28 +#define OMAP24XX_DMA_GPMC 4 /* S_DMA_3 */
  29 +#define OMAP24XX_DMA_GFX 5 /* S_DMA_4 */
  30 +#define OMAP24XX_DMA_DSS 6 /* S_DMA_5 */
  31 +#define OMAP242X_DMA_VLYNQ_TX 7 /* S_DMA_6 */
  32 +#define OMAP24XX_DMA_EXT_DMAREQ2 7 /* S_DMA_6 */
  33 +#define OMAP24XX_DMA_CWT 8 /* S_DMA_7 */
  34 +#define OMAP24XX_DMA_AES_TX 9 /* S_DMA_8 */
  35 +#define OMAP24XX_DMA_AES_RX 10 /* S_DMA_9 */
  36 +#define OMAP24XX_DMA_DES_TX 11 /* S_DMA_10 */
  37 +#define OMAP24XX_DMA_DES_RX 12 /* S_DMA_11 */
  38 +#define OMAP24XX_DMA_SHA1MD5_RX 13 /* S_DMA_12 */
  39 +#define OMAP34XX_DMA_SHA2MD5_RX 13 /* S_DMA_12 */
  40 +#define OMAP242X_DMA_EXT_DMAREQ2 14 /* S_DMA_13 */
  41 +#define OMAP242X_DMA_EXT_DMAREQ3 15 /* S_DMA_14 */
  42 +#define OMAP242X_DMA_EXT_DMAREQ4 16 /* S_DMA_15 */
  43 +#define OMAP242X_DMA_EAC_AC_RD 17 /* S_DMA_16 */
  44 +#define OMAP242X_DMA_EAC_AC_WR 18 /* S_DMA_17 */
  45 +#define OMAP242X_DMA_EAC_MD_UL_RD 19 /* S_DMA_18 */
  46 +#define OMAP242X_DMA_EAC_MD_UL_WR 20 /* S_DMA_19 */
  47 +#define OMAP242X_DMA_EAC_MD_DL_RD 21 /* S_DMA_20 */
  48 +#define OMAP242X_DMA_EAC_MD_DL_WR 22 /* S_DMA_21 */
  49 +#define OMAP242X_DMA_EAC_BT_UL_RD 23 /* S_DMA_22 */
  50 +#define OMAP242X_DMA_EAC_BT_UL_WR 24 /* S_DMA_23 */
  51 +#define OMAP242X_DMA_EAC_BT_DL_RD 25 /* S_DMA_24 */
  52 +#define OMAP242X_DMA_EAC_BT_DL_WR 26 /* S_DMA_25 */
  53 +#define OMAP243X_DMA_EXT_DMAREQ3 14 /* S_DMA_13 */
  54 +#define OMAP24XX_DMA_SPI3_TX0 15 /* S_DMA_14 */
  55 +#define OMAP24XX_DMA_SPI3_RX0 16 /* S_DMA_15 */
  56 +#define OMAP24XX_DMA_MCBSP3_TX 17 /* S_DMA_16 */
  57 +#define OMAP24XX_DMA_MCBSP3_RX 18 /* S_DMA_17 */
  58 +#define OMAP24XX_DMA_MCBSP4_TX 19 /* S_DMA_18 */
  59 +#define OMAP24XX_DMA_MCBSP4_RX 20 /* S_DMA_19 */
  60 +#define OMAP24XX_DMA_MCBSP5_TX 21 /* S_DMA_20 */
  61 +#define OMAP24XX_DMA_MCBSP5_RX 22 /* S_DMA_21 */
  62 +#define OMAP24XX_DMA_SPI3_TX1 23 /* S_DMA_22 */
  63 +#define OMAP24XX_DMA_SPI3_RX1 24 /* S_DMA_23 */
  64 +#define OMAP243X_DMA_EXT_DMAREQ4 25 /* S_DMA_24 */
  65 +#define OMAP243X_DMA_EXT_DMAREQ5 26 /* S_DMA_25 */
  66 +#define OMAP34XX_DMA_I2C3_TX 25 /* S_DMA_24 */
  67 +#define OMAP34XX_DMA_I2C3_RX 26 /* S_DMA_25 */
  68 +#define OMAP24XX_DMA_I2C1_TX 27 /* S_DMA_26 */
  69 +#define OMAP24XX_DMA_I2C1_RX 28 /* S_DMA_27 */
  70 +#define OMAP24XX_DMA_I2C2_TX 29 /* S_DMA_28 */
  71 +#define OMAP24XX_DMA_I2C2_RX 30 /* S_DMA_29 */
  72 +#define OMAP24XX_DMA_MCBSP1_TX 31 /* S_DMA_30 */
  73 +#define OMAP24XX_DMA_MCBSP1_RX 32 /* S_DMA_31 */
  74 +#define OMAP24XX_DMA_MCBSP2_TX 33 /* S_DMA_32 */
  75 +#define OMAP24XX_DMA_MCBSP2_RX 34 /* S_DMA_33 */
  76 +#define OMAP24XX_DMA_SPI1_TX0 35 /* S_DMA_34 */
  77 +#define OMAP24XX_DMA_SPI1_RX0 36 /* S_DMA_35 */
  78 +#define OMAP24XX_DMA_SPI1_TX1 37 /* S_DMA_36 */
  79 +#define OMAP24XX_DMA_SPI1_RX1 38 /* S_DMA_37 */
  80 +#define OMAP24XX_DMA_SPI1_TX2 39 /* S_DMA_38 */
  81 +#define OMAP24XX_DMA_SPI1_RX2 40 /* S_DMA_39 */
  82 +#define OMAP24XX_DMA_SPI1_TX3 41 /* S_DMA_40 */
  83 +#define OMAP24XX_DMA_SPI1_RX3 42 /* S_DMA_41 */
  84 +#define OMAP24XX_DMA_SPI2_TX0 43 /* S_DMA_42 */
  85 +#define OMAP24XX_DMA_SPI2_RX0 44 /* S_DMA_43 */
  86 +#define OMAP24XX_DMA_SPI2_TX1 45 /* S_DMA_44 */
  87 +#define OMAP24XX_DMA_SPI2_RX1 46 /* S_DMA_45 */
  88 +#define OMAP24XX_DMA_MMC2_TX 47 /* S_DMA_46 */
  89 +#define OMAP24XX_DMA_MMC2_RX 48 /* S_DMA_47 */
  90 +#define OMAP24XX_DMA_UART1_TX 49 /* S_DMA_48 */
  91 +#define OMAP24XX_DMA_UART1_RX 50 /* S_DMA_49 */
  92 +#define OMAP24XX_DMA_UART2_TX 51 /* S_DMA_50 */
  93 +#define OMAP24XX_DMA_UART2_RX 52 /* S_DMA_51 */
  94 +#define OMAP24XX_DMA_UART3_TX 53 /* S_DMA_52 */
  95 +#define OMAP24XX_DMA_UART3_RX 54 /* S_DMA_53 */
  96 +#define OMAP24XX_DMA_USB_W2FC_TX0 55 /* S_DMA_54 */
  97 +#define OMAP24XX_DMA_USB_W2FC_RX0 56 /* S_DMA_55 */
  98 +#define OMAP24XX_DMA_USB_W2FC_TX1 57 /* S_DMA_56 */
  99 +#define OMAP24XX_DMA_USB_W2FC_RX1 58 /* S_DMA_57 */
  100 +#define OMAP24XX_DMA_USB_W2FC_TX2 59 /* S_DMA_58 */
  101 +#define OMAP24XX_DMA_USB_W2FC_RX2 60 /* S_DMA_59 */
  102 +#define OMAP24XX_DMA_MMC1_TX 61 /* S_DMA_60 */
  103 +#define OMAP24XX_DMA_MMC1_RX 62 /* S_DMA_61 */
  104 +#define OMAP24XX_DMA_MS 63 /* S_DMA_62 */
  105 +#define OMAP242X_DMA_EXT_DMAREQ5 64 /* S_DMA_63 */
  106 +#define OMAP243X_DMA_EXT_DMAREQ6 64 /* S_DMA_63 */
  107 +#define OMAP34XX_DMA_EXT_DMAREQ3 64 /* S_DMA_63 */
  108 +#define OMAP34XX_DMA_AES2_TX 65 /* S_DMA_64 */
  109 +#define OMAP34XX_DMA_AES2_RX 66 /* S_DMA_65 */
  110 +#define OMAP34XX_DMA_DES2_TX 67 /* S_DMA_66 */
  111 +#define OMAP34XX_DMA_DES2_RX 68 /* S_DMA_67 */
  112 +#define OMAP34XX_DMA_SHA1MD5_RX 69 /* S_DMA_68 */
  113 +#define OMAP34XX_DMA_SPI4_TX0 70 /* S_DMA_69 */
  114 +#define OMAP34XX_DMA_SPI4_RX0 71 /* S_DMA_70 */
  115 +#define OMAP34XX_DSS_DMA0 72 /* S_DMA_71 */
  116 +#define OMAP34XX_DSS_DMA1 73 /* S_DMA_72 */
  117 +#define OMAP34XX_DSS_DMA2 74 /* S_DMA_73 */
  118 +#define OMAP34XX_DSS_DMA3 75 /* S_DMA_74 */
  119 +#define OMAP34XX_DMA_MMC3_TX 77 /* S_DMA_76 */
  120 +#define OMAP34XX_DMA_MMC3_RX 78 /* S_DMA_77 */
  121 +#define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */
  122 +#define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */
  123 +
  124 +#define OMAP36XX_DMA_UART4_TX 81 /* S_DMA_80 */
  125 +#define OMAP36XX_DMA_UART4_RX 82 /* S_DMA_81 */
  126 +
  127 +/* Only for AM35xx */
  128 +#define AM35XX_DMA_UART4_TX 54
  129 +#define AM35XX_DMA_UART4_RX 55
  130 +
  131 +#endif /* __OMAP2PLUS_DMA_CHANNEL_H */
arch/arm/mach-omap2/io.c
Diff comments   View file @ 94c6578
... ... @@ -31,7 +31,7 @@
31 31 #include <plat/omap-pm.h>
32 32 #include <plat/omap_hwmod.h>
33 33 #include <plat/multi.h>
34   -#include <plat/dma.h>
  34 +#include <plat-omap/dma-omap.h>
35 35  
36 36 #include "soc.h"
37 37 #include "iomap.h"
arch/arm/mach-omap2/mcbsp.c
Diff comments   View file @ 94c6578
... ... @@ -20,7 +20,7 @@
20 20 #include <linux/slab.h>
21 21 #include <linux/platform_data/asoc-ti-mcbsp.h>
22 22  
23   -#include <plat/dma.h>
  23 +#include <plat-omap/dma-omap.h>
24 24 #include <plat/omap_device.h>
25 25 #include <linux/pm_runtime.h>
26 26  
arch/arm/mach-omap2/omap_hwmod_2420_data.c
Diff comments   View file @ 94c6578
... ... @@ -15,7 +15,7 @@
15 15 #include <linux/platform_data/spi-omap2-mcspi.h>
16 16  
17 17 #include <plat/omap_hwmod.h>
18   -#include <plat/dma.h>
  18 +#include <plat-omap/dma-omap.h>
19 19 #include <plat/serial.h>
20 20 #include <plat/i2c.h>
21 21 #include <plat/dmtimer.h>
arch/arm/mach-omap2/omap_hwmod_2430_data.c
Diff comments   View file @ 94c6578
... ... @@ -16,7 +16,7 @@
16 16 #include <linux/platform_data/spi-omap2-mcspi.h>
17 17  
18 18 #include <plat/omap_hwmod.h>
19   -#include <plat/dma.h>
  19 +#include <plat-omap/dma-omap.h>
20 20 #include <plat/serial.h>
21 21 #include <plat/i2c.h>
22 22 #include <plat/dmtimer.h>
arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
Diff comments   View file @ 94c6578
... ... @@ -11,11 +11,12 @@
11 11 */
12 12 #include <plat/omap_hwmod.h>
13 13 #include <plat/serial.h>
14   -#include <plat/dma.h>
  14 +#include <plat-omap/dma-omap.h>
15 15 #include <plat/common.h>
16 16 #include "hdq1w.h"
17 17  
18 18 #include "omap_hwmod_common_data.h"
  19 +#include "dma.h"
19 20  
20 21 /* UART */
21 22  
arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
Diff comments   View file @ 94c6578
... ... @@ -11,7 +11,7 @@
11 11 #include <plat/omap_hwmod.h>
12 12 #include <plat/serial.h>
13 13 #include <linux/platform_data/gpio-omap.h>
14   -#include <plat/dma.h>
  14 +#include <plat-omap/dma-omap.h>
15 15 #include <plat/dmtimer.h>
16 16 #include <linux/platform_data/spi-omap2-mcspi.h>
17 17  
arch/arm/mach-omap2/omap_hwmod_33xx_data.c
Diff comments   View file @ 94c6578
... ... @@ -18,7 +18,7 @@
18 18 #include <plat/cpu.h>
19 19 #include <linux/platform_data/gpio-omap.h>
20 20 #include <linux/platform_data/spi-omap2-mcspi.h>
21   -#include <plat/dma.h>
  21 +#include <plat-omap/dma-omap.h>
22 22 #include <plat/mmc.h>
23 23 #include <plat/i2c.h>
24 24  
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
Diff comments   View file @ 94c6578
... ... @@ -18,7 +18,7 @@
18 18 #include <linux/platform_data/gpio-omap.h>
19 19  
20 20 #include <plat/omap_hwmod.h>
21   -#include <plat/dma.h>
  21 +#include <plat-omap/dma-omap.h>
22 22 #include <plat/serial.h>
23 23 #include "l3_3xxx.h"
24 24 #include "l4_3xxx.h"
... ... @@ -35,6 +35,8 @@
35 35 #include "omap_hwmod_common_data.h"
36 36 #include "prm-regbits-34xx.h"
37 37 #include "cm-regbits-34xx.h"
  38 +
  39 +#include "dma.h"
38 40 #include "wd_timer.h"
39 41  
40 42 /*
arch/arm/mach-omap2/omap_hwmod_44xx_data.c
Diff comments   View file @ 94c6578
... ... @@ -24,7 +24,7 @@
24 24  
25 25 #include <plat/omap_hwmod.h>
26 26 #include <plat/i2c.h>
27   -#include <plat/dma.h>
  27 +#include <plat-omap/dma-omap.h>
28 28 #include <linux/platform_data/spi-omap2-mcspi.h>
29 29 #include <linux/platform_data/asoc-ti-mcbsp.h>
30 30 #include <plat/mmc.h>
arch/arm/mach-omap2/pm24xx.c
Diff comments   View file @ 94c6578
... ... @@ -38,7 +38,7 @@
38 38  
39 39 #include <plat/clock.h>
40 40 #include <plat/sram.h>
41   -#include <plat/dma.h>
  41 +#include <plat-omap/dma-omap.h>
42 42  
43 43 #include "common.h"
44 44 #include "prm2xxx_3xxx.h"
arch/arm/mach-omap2/pm34xx.c
Diff comments   View file @ 94c6578
... ... @@ -41,7 +41,7 @@
41 41 #include <plat/sdrc.h>
42 42 #include <plat/prcm.h>
43 43 #include <plat/gpmc.h>
44   -#include <plat/dma.h>
  44 +#include <plat-omap/dma-omap.h>
45 45  
46 46 #include "common.h"
47 47 #include "cm2xxx_3xxx.h"
arch/arm/mach-omap2/serial.c
Diff comments   View file @ 94c6578
... ... @@ -29,7 +29,7 @@
29 29  
30 30 #include <plat/omap-serial.h>
31 31 #include "common.h"
32   -#include <plat/dma.h>
  32 +#include <plat-omap/dma-omap.h>
33 33 #include <plat/omap_hwmod.h>
34 34 #include <plat/omap_device.h>
35 35 #include <plat/omap-pm.h>
arch/arm/plat-omap/common.c
Diff comments   View file @ 94c6578
... ... @@ -19,7 +19,7 @@
19 19 #include <plat/common.h>
20 20 #include <plat/vram.h>
21 21 #include <linux/platform_data/dsp-omap.h>
22   -#include <plat/dma.h>
  22 +#include <plat-omap/dma-omap.h>
23 23  
24 24 #include <plat/omap-secure.h>
25 25  
arch/arm/plat-omap/dma.c
Diff comments   View file @ 94c6578
... ... @@ -37,7 +37,7 @@
37 37 #include <linux/delay.h>
38 38  
39 39 #include <plat/cpu.h>
40   -#include <plat/dma.h>
  40 +#include <plat-omap/dma-omap.h>
41 41 #include <plat/tc.h>
42 42  
43 43 /*
arch/arm/plat-omap/include/plat-omap/dma-omap.h
Diff comments   View file @ 94c6578
  1 +/*
  2 + * OMAP DMA handling defines and function
  3 + *
  4 + * Copyright (C) 2003 Nokia Corporation
  5 + * Author: Juha Yrjรถlรค <juha.yrjola@nokia.com>
  6 + *
  7 + * This program is free software; you can redistribute it and/or modify
  8 + * it under the terms of the GNU General Public License as published by
  9 + * the Free Software Foundation; either version 2 of the License, or
  10 + * (at your option) any later version.
  11 + *
  12 + * This program is distributed in the hope that it will be useful,
  13 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15 + * GNU General Public License for more details.
  16 + *
  17 + * You should have received a copy of the GNU General Public License
  18 + * along with this program; if not, write to the Free Software
  19 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20 + */
  21 +#ifndef __ASM_ARCH_DMA_H
  22 +#define __ASM_ARCH_DMA_H
  23 +
  24 +#include <linux/platform_device.h>
  25 +
  26 +#define INT_DMA_LCD 25
  27 +
  28 +#define OMAP1_DMA_TOUT_IRQ (1 << 0)
  29 +#define OMAP_DMA_DROP_IRQ (1 << 1)
  30 +#define OMAP_DMA_HALF_IRQ (1 << 2)
  31 +#define OMAP_DMA_FRAME_IRQ (1 << 3)
  32 +#define OMAP_DMA_LAST_IRQ (1 << 4)
  33 +#define OMAP_DMA_BLOCK_IRQ (1 << 5)
  34 +#define OMAP1_DMA_SYNC_IRQ (1 << 6)
  35 +#define OMAP2_DMA_PKT_IRQ (1 << 7)
  36 +#define OMAP2_DMA_TRANS_ERR_IRQ (1 << 8)
  37 +#define OMAP2_DMA_SECURE_ERR_IRQ (1 << 9)
  38 +#define OMAP2_DMA_SUPERVISOR_ERR_IRQ (1 << 10)
  39 +#define OMAP2_DMA_MISALIGNED_ERR_IRQ (1 << 11)
  40 +
  41 +#define OMAP_DMA_CCR_EN (1 << 7)
  42 +#define OMAP_DMA_CCR_RD_ACTIVE (1 << 9)
  43 +#define OMAP_DMA_CCR_WR_ACTIVE (1 << 10)
  44 +#define OMAP_DMA_CCR_SEL_SRC_DST_SYNC (1 << 24)
  45 +#define OMAP_DMA_CCR_BUFFERING_DISABLE (1 << 25)
  46 +
  47 +#define OMAP_DMA_DATA_TYPE_S8 0x00
  48 +#define OMAP_DMA_DATA_TYPE_S16 0x01
  49 +#define OMAP_DMA_DATA_TYPE_S32 0x02
  50 +
  51 +#define OMAP_DMA_SYNC_ELEMENT 0x00
  52 +#define OMAP_DMA_SYNC_FRAME 0x01
  53 +#define OMAP_DMA_SYNC_BLOCK 0x02
  54 +#define OMAP_DMA_SYNC_PACKET 0x03
  55 +
  56 +#define OMAP_DMA_DST_SYNC_PREFETCH 0x02
  57 +#define OMAP_DMA_SRC_SYNC 0x01
  58 +#define OMAP_DMA_DST_SYNC 0x00
  59 +
  60 +#define OMAP_DMA_PORT_EMIFF 0x00
  61 +#define OMAP_DMA_PORT_EMIFS 0x01
  62 +#define OMAP_DMA_PORT_OCP_T1 0x02
  63 +#define OMAP_DMA_PORT_TIPB 0x03
  64 +#define OMAP_DMA_PORT_OCP_T2 0x04
  65 +#define OMAP_DMA_PORT_MPUI 0x05
  66 +
  67 +#define OMAP_DMA_AMODE_CONSTANT 0x00
  68 +#define OMAP_DMA_AMODE_POST_INC 0x01
  69 +#define OMAP_DMA_AMODE_SINGLE_IDX 0x02
  70 +#define OMAP_DMA_AMODE_DOUBLE_IDX 0x03
  71 +
  72 +#define DMA_DEFAULT_FIFO_DEPTH 0x10
  73 +#define DMA_DEFAULT_ARB_RATE 0x01
  74 +/* Pass THREAD_RESERVE ORed with THREAD_FIFO for tparams */
  75 +#define DMA_THREAD_RESERVE_NORM (0x00 << 12) /* Def */
  76 +#define DMA_THREAD_RESERVE_ONET (0x01 << 12)
  77 +#define DMA_THREAD_RESERVE_TWOT (0x02 << 12)
  78 +#define DMA_THREAD_RESERVE_THREET (0x03 << 12)
  79 +#define DMA_THREAD_FIFO_NONE (0x00 << 14) /* Def */
  80 +#define DMA_THREAD_FIFO_75 (0x01 << 14)
  81 +#define DMA_THREAD_FIFO_25 (0x02 << 14)
  82 +#define DMA_THREAD_FIFO_50 (0x03 << 14)
  83 +
  84 +/* DMA4_OCP_SYSCONFIG bits */
  85 +#define DMA_SYSCONFIG_MIDLEMODE_MASK (3 << 12)
  86 +#define DMA_SYSCONFIG_CLOCKACTIVITY_MASK (3 << 8)
  87 +#define DMA_SYSCONFIG_EMUFREE (1 << 5)
  88 +#define DMA_SYSCONFIG_SIDLEMODE_MASK (3 << 3)
  89 +#define DMA_SYSCONFIG_SOFTRESET (1 << 2)
  90 +#define DMA_SYSCONFIG_AUTOIDLE (1 << 0)
  91 +
  92 +#define DMA_SYSCONFIG_MIDLEMODE(n) ((n) << 12)
  93 +#define DMA_SYSCONFIG_SIDLEMODE(n) ((n) << 3)
  94 +
  95 +#define DMA_IDLEMODE_SMARTIDLE 0x2
  96 +#define DMA_IDLEMODE_NO_IDLE 0x1
  97 +#define DMA_IDLEMODE_FORCE_IDLE 0x0
  98 +
  99 +/* Chaining modes*/
  100 +#ifndef CONFIG_ARCH_OMAP1
  101 +#define OMAP_DMA_STATIC_CHAIN 0x1
  102 +#define OMAP_DMA_DYNAMIC_CHAIN 0x2
  103 +#define OMAP_DMA_CHAIN_ACTIVE 0x1
  104 +#define OMAP_DMA_CHAIN_INACTIVE 0x0
  105 +#endif
  106 +
  107 +#define DMA_CH_PRIO_HIGH 0x1
  108 +#define DMA_CH_PRIO_LOW 0x0 /* Def */
  109 +
  110 +/* Errata handling */
  111 +#define IS_DMA_ERRATA(id) (errata & (id))
  112 +#define SET_DMA_ERRATA(id) (errata |= (id))
  113 +
  114 +#define DMA_ERRATA_IFRAME_BUFFERING BIT(0x0)
  115 +#define DMA_ERRATA_PARALLEL_CHANNELS BIT(0x1)
  116 +#define DMA_ERRATA_i378 BIT(0x2)
  117 +#define DMA_ERRATA_i541 BIT(0x3)
  118 +#define DMA_ERRATA_i88 BIT(0x4)
  119 +#define DMA_ERRATA_3_3 BIT(0x5)
  120 +#define DMA_ROMCODE_BUG BIT(0x6)
  121 +
  122 +/* Attributes for OMAP DMA Contrller */
  123 +#define DMA_LINKED_LCH BIT(0x0)
  124 +#define GLOBAL_PRIORITY BIT(0x1)
  125 +#define RESERVE_CHANNEL BIT(0x2)
  126 +#define IS_CSSA_32 BIT(0x3)
  127 +#define IS_CDSA_32 BIT(0x4)
  128 +#define IS_RW_PRIORITY BIT(0x5)
  129 +#define ENABLE_1510_MODE BIT(0x6)
  130 +#define SRC_PORT BIT(0x7)
  131 +#define DST_PORT BIT(0x8)
  132 +#define SRC_INDEX BIT(0x9)
  133 +#define DST_INDEX BIT(0xA)
  134 +#define IS_BURST_ONLY4 BIT(0xB)
  135 +#define CLEAR_CSR_ON_READ BIT(0xC)
  136 +#define IS_WORD_16 BIT(0xD)
  137 +
  138 +/* Defines for DMA Capabilities */
  139 +#define DMA_HAS_TRANSPARENT_CAPS (0x1 << 18)
  140 +#define DMA_HAS_CONSTANT_FILL_CAPS (0x1 << 19)
  141 +#define DMA_HAS_DESCRIPTOR_CAPS (0x3 << 20)
  142 +
  143 +enum omap_reg_offsets {
  144 +
  145 +GCR, GSCR, GRST1, HW_ID,
  146 +PCH2_ID, PCH0_ID, PCH1_ID, PCHG_ID,
  147 +PCHD_ID, CAPS_0, CAPS_1, CAPS_2,
  148 +CAPS_3, CAPS_4, PCH2_SR, PCH0_SR,
  149 +PCH1_SR, PCHD_SR, REVISION, IRQSTATUS_L0,
  150 +IRQSTATUS_L1, IRQSTATUS_L2, IRQSTATUS_L3, IRQENABLE_L0,
  151 +IRQENABLE_L1, IRQENABLE_L2, IRQENABLE_L3, SYSSTATUS,
  152 +OCP_SYSCONFIG,
  153 +
  154 +/* omap1+ specific */
  155 +CPC, CCR2, LCH_CTRL,
  156 +
  157 +/* Common registers for all omap's */
  158 +CSDP, CCR, CICR, CSR,
  159 +CEN, CFN, CSFI, CSEI,
  160 +CSAC, CDAC, CDEI,
  161 +CDFI, CLNK_CTRL,
  162 +
  163 +/* Channel specific registers */
  164 +CSSA, CDSA, COLOR,
  165 +CCEN, CCFN,
  166 +
  167 +/* omap3630 and omap4 specific */
  168 +CDP, CNDP, CCDN,
  169 +
  170 +};
  171 +
  172 +enum omap_dma_burst_mode {
  173 + OMAP_DMA_DATA_BURST_DIS = 0,
  174 + OMAP_DMA_DATA_BURST_4,
  175 + OMAP_DMA_DATA_BURST_8,
  176 + OMAP_DMA_DATA_BURST_16,
  177 +};
  178 +
  179 +enum end_type {
  180 + OMAP_DMA_LITTLE_ENDIAN = 0,
  181 + OMAP_DMA_BIG_ENDIAN
  182 +};
  183 +
  184 +enum omap_dma_color_mode {
  185 + OMAP_DMA_COLOR_DIS = 0,
  186 + OMAP_DMA_CONSTANT_FILL,
  187 + OMAP_DMA_TRANSPARENT_COPY
  188 +};
  189 +
  190 +enum omap_dma_write_mode {
  191 + OMAP_DMA_WRITE_NON_POSTED = 0,
  192 + OMAP_DMA_WRITE_POSTED,
  193 + OMAP_DMA_WRITE_LAST_NON_POSTED
  194 +};
  195 +
  196 +enum omap_dma_channel_mode {
  197 + OMAP_DMA_LCH_2D = 0,
  198 + OMAP_DMA_LCH_G,
  199 + OMAP_DMA_LCH_P,
  200 + OMAP_DMA_LCH_PD
  201 +};
  202 +
  203 +struct omap_dma_channel_params {
  204 + int data_type; /* data type 8,16,32 */
  205 + int elem_count; /* number of elements in a frame */
  206 + int frame_count; /* number of frames in a element */
  207 +
  208 + int src_port; /* Only on OMAP1 REVISIT: Is this needed? */
  209 + int src_amode; /* constant, post increment, indexed,
  210 + double indexed */
  211 + unsigned long src_start; /* source address : physical */
  212 + int src_ei; /* source element index */
  213 + int src_fi; /* source frame index */
  214 +
  215 + int dst_port; /* Only on OMAP1 REVISIT: Is this needed? */
  216 + int dst_amode; /* constant, post increment, indexed,
  217 + double indexed */
  218 + unsigned long dst_start; /* source address : physical */
  219 + int dst_ei; /* source element index */
  220 + int dst_fi; /* source frame index */
  221 +
  222 + int trigger; /* trigger attached if the channel is
  223 + synchronized */
  224 + int sync_mode; /* sycn on element, frame , block or packet */
  225 + int src_or_dst_synch; /* source synch(1) or destination synch(0) */
  226 +
  227 + int ie; /* interrupt enabled */
  228 +
  229 + unsigned char read_prio;/* read priority */
  230 + unsigned char write_prio;/* write priority */
  231 +
  232 +#ifndef CONFIG_ARCH_OMAP1
  233 + enum omap_dma_burst_mode burst_mode; /* Burst mode 4/8/16 words */
  234 +#endif
  235 +};
  236 +
  237 +struct omap_dma_lch {
  238 + int next_lch;
  239 + int dev_id;
  240 + u16 saved_csr;
  241 + u16 enabled_irqs;
  242 + const char *dev_name;
  243 + void (*callback)(int lch, u16 ch_status, void *data);
  244 + void *data;
  245 + long flags;
  246 + /* required for Dynamic chaining */
  247 + int prev_linked_ch;
  248 + int next_linked_ch;
  249 + int state;
  250 + int chain_id;
  251 + int status;
  252 +};
  253 +
  254 +struct omap_dma_dev_attr {
  255 + u32 dev_caps;
  256 + u16 lch_count;
  257 + u16 chan_count;
  258 + struct omap_dma_lch *chan;
  259 +};
  260 +
  261 +/* System DMA platform data structure */
  262 +struct omap_system_dma_plat_info {
  263 + struct omap_dma_dev_attr *dma_attr;
  264 + u32 errata;
  265 + void (*disable_irq_lch)(int lch);
  266 + void (*show_dma_caps)(void);
  267 + void (*clear_lch_regs)(int lch);
  268 + void (*clear_dma)(int lch);
  269 + void (*dma_write)(u32 val, int reg, int lch);
  270 + u32 (*dma_read)(int reg, int lch);
  271 +};
  272 +
  273 +extern void __init omap_init_consistent_dma_size(void);
  274 +extern void omap_set_dma_priority(int lch, int dst_port, int priority);
  275 +extern int omap_request_dma(int dev_id, const char *dev_name,
  276 + void (*callback)(int lch, u16 ch_status, void *data),
  277 + void *data, int *dma_ch);
  278 +extern void omap_enable_dma_irq(int ch, u16 irq_bits);
  279 +extern void omap_disable_dma_irq(int ch, u16 irq_bits);
  280 +extern void omap_free_dma(int ch);
  281 +extern void omap_start_dma(int lch);
  282 +extern void omap_stop_dma(int lch);
  283 +extern void omap_set_dma_transfer_params(int lch, int data_type,
  284 + int elem_count, int frame_count,
  285 + int sync_mode,
  286 + int dma_trigger, int src_or_dst_synch);
  287 +extern void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode,
  288 + u32 color);
  289 +extern void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode);
  290 +extern void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode);
  291 +
  292 +extern void omap_set_dma_src_params(int lch, int src_port, int src_amode,
  293 + unsigned long src_start,
  294 + int src_ei, int src_fi);
  295 +extern void omap_set_dma_src_index(int lch, int eidx, int fidx);
  296 +extern void omap_set_dma_src_data_pack(int lch, int enable);
  297 +extern void omap_set_dma_src_burst_mode(int lch,
  298 + enum omap_dma_burst_mode burst_mode);
  299 +
  300 +extern void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
  301 + unsigned long dest_start,
  302 + int dst_ei, int dst_fi);
  303 +extern void omap_set_dma_dest_index(int lch, int eidx, int fidx);
  304 +extern void omap_set_dma_dest_data_pack(int lch, int enable);
  305 +extern void omap_set_dma_dest_burst_mode(int lch,
  306 + enum omap_dma_burst_mode burst_mode);
  307 +
  308 +extern void omap_set_dma_params(int lch,
  309 + struct omap_dma_channel_params *params);
  310 +
  311 +extern void omap_dma_link_lch(int lch_head, int lch_queue);
  312 +extern void omap_dma_unlink_lch(int lch_head, int lch_queue);
  313 +
  314 +extern int omap_set_dma_callback(int lch,
  315 + void (*callback)(int lch, u16 ch_status, void *data),
  316 + void *data);
  317 +extern dma_addr_t omap_get_dma_src_pos(int lch);
  318 +extern dma_addr_t omap_get_dma_dst_pos(int lch);
  319 +extern void omap_clear_dma(int lch);
  320 +extern int omap_get_dma_active_status(int lch);
  321 +extern int omap_dma_running(void);
  322 +extern void omap_dma_set_global_params(int arb_rate, int max_fifo_depth,
  323 + int tparams);
  324 +extern int omap_dma_set_prio_lch(int lch, unsigned char read_prio,
  325 + unsigned char write_prio);
  326 +extern void omap_set_dma_dst_endian_type(int lch, enum end_type etype);
  327 +extern void omap_set_dma_src_endian_type(int lch, enum end_type etype);
  328 +extern int omap_get_dma_index(int lch, int *ei, int *fi);
  329 +
  330 +void omap_dma_global_context_save(void);
  331 +void omap_dma_global_context_restore(void);
  332 +
  333 +extern void omap_dma_disable_irq(int lch);
  334 +
  335 +/* Chaining APIs */
  336 +#ifndef CONFIG_ARCH_OMAP1
  337 +extern int omap_request_dma_chain(int dev_id, const char *dev_name,
  338 + void (*callback) (int lch, u16 ch_status,
  339 + void *data),
  340 + int *chain_id, int no_of_chans,
  341 + int chain_mode,
  342 + struct omap_dma_channel_params params);
  343 +extern int omap_free_dma_chain(int chain_id);
  344 +extern int omap_dma_chain_a_transfer(int chain_id, int src_start,
  345 + int dest_start, int elem_count,
  346 + int frame_count, void *callbk_data);
  347 +extern int omap_start_dma_chain_transfers(int chain_id);
  348 +extern int omap_stop_dma_chain_transfers(int chain_id);
  349 +extern int omap_get_dma_chain_index(int chain_id, int *ei, int *fi);
  350 +extern int omap_get_dma_chain_dst_pos(int chain_id);
  351 +extern int omap_get_dma_chain_src_pos(int chain_id);
  352 +
  353 +extern int omap_modify_dma_chain_params(int chain_id,
  354 + struct omap_dma_channel_params params);
  355 +extern int omap_dma_chain_status(int chain_id);
  356 +#endif
  357 +
  358 +#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_FB_OMAP)
  359 +#include <mach/lcd_dma.h>
  360 +#else
  361 +static inline int omap_lcd_dma_running(void)
  362 +{
  363 + return 0;
  364 +}
  365 +#endif
  366 +
  367 +#endif /* __ASM_ARCH_DMA_H */
arch/arm/plat-omap/include/plat/dma-44xx.h
View file @ 94c6578
1   -/*
2   - * OMAP4 SDMA channel definitions
3   - *
4   - * Copyright (C) 2009-2010 Texas Instruments, Inc.
5   - * Copyright (C) 2009-2010 Nokia Corporation
6   - *
7   - * Santosh Shilimkar (santosh.shilimkar@ti.com)
8   - * Benoit Cousson (b-cousson@ti.com)
9   - * Paul Walmsley (paul@pwsan.com)
10   - *
11   - * This file is automatically generated from the OMAP hardware databases.
12   - * We respectfully ask that any modifications to this file be coordinated
13   - * with the public linux-omap@vger.kernel.org mailing list and the
14   - * authors above to ensure that the autogeneration scripts are kept
15   - * up-to-date with the file contents.
16   - *
17   - * This program is free software; you can redistribute it and/or modify
18   - * it under the terms of the GNU General Public License version 2 as
19   - * published by the Free Software Foundation.
20   - */
21   -
22   -#ifndef __ARCH_ARM_MACH_OMAP2_OMAP44XX_DMA_H
23   -#define __ARCH_ARM_MACH_OMAP2_OMAP44XX_DMA_H
24   -
25   -#define OMAP44XX_DMA_SYS_REQ0 2
26   -#define OMAP44XX_DMA_SYS_REQ1 3
27   -#define OMAP44XX_DMA_GPMC 4
28   -#define OMAP44XX_DMA_DSS_DISPC_REQ 6
29   -#define OMAP44XX_DMA_SYS_REQ2 7
30   -#define OMAP44XX_DMA_MCASP1_AXEVT 8
31   -#define OMAP44XX_DMA_ISS_REQ1 9
32   -#define OMAP44XX_DMA_ISS_REQ2 10
33   -#define OMAP44XX_DMA_MCASP1_AREVT 11
34   -#define OMAP44XX_DMA_ISS_REQ3 12
35   -#define OMAP44XX_DMA_ISS_REQ4 13
36   -#define OMAP44XX_DMA_DSS_RFBI_REQ 14
37   -#define OMAP44XX_DMA_SPI3_TX0 15
38   -#define OMAP44XX_DMA_SPI3_RX0 16
39   -#define OMAP44XX_DMA_MCBSP2_TX 17
40   -#define OMAP44XX_DMA_MCBSP2_RX 18
41   -#define OMAP44XX_DMA_MCBSP3_TX 19
42   -#define OMAP44XX_DMA_MCBSP3_RX 20
43   -#define OMAP44XX_DMA_C2C_SSCM_GPO0 21
44   -#define OMAP44XX_DMA_C2C_SSCM_GPO1 22
45   -#define OMAP44XX_DMA_SPI3_TX1 23
46   -#define OMAP44XX_DMA_SPI3_RX1 24
47   -#define OMAP44XX_DMA_I2C3_TX 25
48   -#define OMAP44XX_DMA_I2C3_RX 26
49   -#define OMAP44XX_DMA_I2C1_TX 27
50   -#define OMAP44XX_DMA_I2C1_RX 28
51   -#define OMAP44XX_DMA_I2C2_TX 29
52   -#define OMAP44XX_DMA_I2C2_RX 30
53   -#define OMAP44XX_DMA_MCBSP4_TX 31
54   -#define OMAP44XX_DMA_MCBSP4_RX 32
55   -#define OMAP44XX_DMA_MCBSP1_TX 33
56   -#define OMAP44XX_DMA_MCBSP1_RX 34
57   -#define OMAP44XX_DMA_SPI1_TX0 35
58   -#define OMAP44XX_DMA_SPI1_RX0 36
59   -#define OMAP44XX_DMA_SPI1_TX1 37
60   -#define OMAP44XX_DMA_SPI1_RX1 38
61   -#define OMAP44XX_DMA_SPI1_TX2 39
62   -#define OMAP44XX_DMA_SPI1_RX2 40
63   -#define OMAP44XX_DMA_SPI1_TX3 41
64   -#define OMAP44XX_DMA_SPI1_RX3 42
65   -#define OMAP44XX_DMA_SPI2_TX0 43
66   -#define OMAP44XX_DMA_SPI2_RX0 44
67   -#define OMAP44XX_DMA_SPI2_TX1 45
68   -#define OMAP44XX_DMA_SPI2_RX1 46
69   -#define OMAP44XX_DMA_MMC2_TX 47
70   -#define OMAP44XX_DMA_MMC2_RX 48
71   -#define OMAP44XX_DMA_UART1_TX 49
72   -#define OMAP44XX_DMA_UART1_RX 50
73   -#define OMAP44XX_DMA_UART2_TX 51
74   -#define OMAP44XX_DMA_UART2_RX 52
75   -#define OMAP44XX_DMA_UART3_TX 53
76   -#define OMAP44XX_DMA_UART3_RX 54
77   -#define OMAP44XX_DMA_UART4_TX 55
78   -#define OMAP44XX_DMA_UART4_RX 56
79   -#define OMAP44XX_DMA_MMC4_TX 57
80   -#define OMAP44XX_DMA_MMC4_RX 58
81   -#define OMAP44XX_DMA_MMC5_TX 59
82   -#define OMAP44XX_DMA_MMC5_RX 60
83   -#define OMAP44XX_DMA_MMC1_TX 61
84   -#define OMAP44XX_DMA_MMC1_RX 62
85   -#define OMAP44XX_DMA_SYS_REQ3 64
86   -#define OMAP44XX_DMA_MCPDM_UP 65
87   -#define OMAP44XX_DMA_MCPDM_DL 66
88   -#define OMAP44XX_DMA_DMIC_REQ 67
89   -#define OMAP44XX_DMA_C2C_SSCM_GPO2 68
90   -#define OMAP44XX_DMA_C2C_SSCM_GPO3 69
91   -#define OMAP44XX_DMA_SPI4_TX0 70
92   -#define OMAP44XX_DMA_SPI4_RX0 71
93   -#define OMAP44XX_DMA_DSS_DSI1_REQ0 72
94   -#define OMAP44XX_DMA_DSS_DSI1_REQ1 73
95   -#define OMAP44XX_DMA_DSS_DSI1_REQ2 74
96   -#define OMAP44XX_DMA_DSS_DSI1_REQ3 75
97   -#define OMAP44XX_DMA_DSS_HDMI_REQ 76
98   -#define OMAP44XX_DMA_MMC3_TX 77
99   -#define OMAP44XX_DMA_MMC3_RX 78
100   -#define OMAP44XX_DMA_USIM_TX 79
101   -#define OMAP44XX_DMA_USIM_RX 80
102   -#define OMAP44XX_DMA_DSS_DSI2_REQ0 81
103   -#define OMAP44XX_DMA_DSS_DSI2_REQ1 82
104   -#define OMAP44XX_DMA_DSS_DSI2_REQ2 83
105   -#define OMAP44XX_DMA_DSS_DSI2_REQ3 84
106   -#define OMAP44XX_DMA_SLIMBUS1_TX0 85
107   -#define OMAP44XX_DMA_SLIMBUS1_TX1 86
108   -#define OMAP44XX_DMA_SLIMBUS1_TX2 87
109   -#define OMAP44XX_DMA_SLIMBUS1_TX3 88
110   -#define OMAP44XX_DMA_SLIMBUS1_RX0 89
111   -#define OMAP44XX_DMA_SLIMBUS1_RX1 90
112   -#define OMAP44XX_DMA_SLIMBUS1_RX2 91
113   -#define OMAP44XX_DMA_SLIMBUS1_RX3 92
114   -#define OMAP44XX_DMA_SLIMBUS2_TX0 93
115   -#define OMAP44XX_DMA_SLIMBUS2_TX1 94
116   -#define OMAP44XX_DMA_SLIMBUS2_TX2 95
117   -#define OMAP44XX_DMA_SLIMBUS2_TX3 96
118   -#define OMAP44XX_DMA_SLIMBUS2_RX0 97
119   -#define OMAP44XX_DMA_SLIMBUS2_RX1 98
120   -#define OMAP44XX_DMA_SLIMBUS2_RX2 99
121   -#define OMAP44XX_DMA_SLIMBUS2_RX3 100
122   -#define OMAP44XX_DMA_ABE_REQ_0 101
123   -#define OMAP44XX_DMA_ABE_REQ_1 102
124   -#define OMAP44XX_DMA_ABE_REQ_2 103
125   -#define OMAP44XX_DMA_ABE_REQ_3 104
126   -#define OMAP44XX_DMA_ABE_REQ_4 105
127   -#define OMAP44XX_DMA_ABE_REQ_5 106
128   -#define OMAP44XX_DMA_ABE_REQ_6 107
129   -#define OMAP44XX_DMA_ABE_REQ_7 108
130   -#define OMAP44XX_DMA_AES1_P_CTX_IN_REQ 109
131   -#define OMAP44XX_DMA_AES1_P_DATA_IN_REQ 110
132   -#define OMAP44XX_DMA_AES1_P_DATA_OUT_REQ 111
133   -#define OMAP44XX_DMA_AES2_P_CTX_IN_REQ 112
134   -#define OMAP44XX_DMA_AES2_P_DATA_IN_REQ 113
135   -#define OMAP44XX_DMA_AES2_P_DATA_OUT_REQ 114
136   -#define OMAP44XX_DMA_DES_P_CTX_IN_REQ 115
137   -#define OMAP44XX_DMA_DES_P_DATA_IN_REQ 116
138   -#define OMAP44XX_DMA_DES_P_DATA_OUT_REQ 117
139   -#define OMAP44XX_DMA_SHA2_CTXIN_P 118
140   -#define OMAP44XX_DMA_SHA2_DIN_P 119
141   -#define OMAP44XX_DMA_SHA2_CTXOUT_P 120
142   -#define OMAP44XX_DMA_AES1_P_CONTEXT_OUT_REQ 121
143   -#define OMAP44XX_DMA_AES2_P_CONTEXT_OUT_REQ 122
144   -#define OMAP44XX_DMA_I2C4_TX 124
145   -#define OMAP44XX_DMA_I2C4_RX 125
146   -
147   -#endif
arch/arm/plat-omap/include/plat/dma.h
View file @ 94c6578
1   -/*
2   - * arch/arm/plat-omap/include/mach/dma.h
3   - *
4   - * Copyright (C) 2003 Nokia Corporation
5   - * Author: Juha Yrjรถlรค <juha.yrjola@nokia.com>
6   - *
7   - * This program is free software; you can redistribute it and/or modify
8   - * it under the terms of the GNU General Public License as published by
9   - * the Free Software Foundation; either version 2 of the License, or
10   - * (at your option) any later version.
11   - *
12   - * This program is distributed in the hope that it will be useful,
13   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
14   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15   - * GNU General Public License for more details.
16   - *
17   - * You should have received a copy of the GNU General Public License
18   - * along with this program; if not, write to the Free Software
19   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20   - */
21   -#ifndef __ASM_ARCH_DMA_H
22   -#define __ASM_ARCH_DMA_H
23   -
24   -#include <linux/platform_device.h>
25   -
26   -/*
27   - * TODO: These dma channel defines should go away once all
28   - * the omap drivers hwmod adapted.
29   - */
30   -
31   -/* Move omap4 specific defines to dma-44xx.h */
32   -#include "dma-44xx.h"
33   -
34   -#define INT_DMA_LCD 25
35   -
36   -/* DMA channels for omap1 */
37   -#define OMAP_DMA_NO_DEVICE 0
38   -#define OMAP_DMA_MCSI1_TX 1
39   -#define OMAP_DMA_MCSI1_RX 2
40   -#define OMAP_DMA_I2C_RX 3
41   -#define OMAP_DMA_I2C_TX 4
42   -#define OMAP_DMA_EXT_NDMA_REQ 5
43   -#define OMAP_DMA_EXT_NDMA_REQ2 6
44   -#define OMAP_DMA_UWIRE_TX 7
45   -#define OMAP_DMA_MCBSP1_TX 8
46   -#define OMAP_DMA_MCBSP1_RX 9
47   -#define OMAP_DMA_MCBSP3_TX 10
48   -#define OMAP_DMA_MCBSP3_RX 11
49   -#define OMAP_DMA_UART1_TX 12
50   -#define OMAP_DMA_UART1_RX 13
51   -#define OMAP_DMA_UART2_TX 14
52   -#define OMAP_DMA_UART2_RX 15
53   -#define OMAP_DMA_MCBSP2_TX 16
54   -#define OMAP_DMA_MCBSP2_RX 17
55   -#define OMAP_DMA_UART3_TX 18
56   -#define OMAP_DMA_UART3_RX 19
57   -#define OMAP_DMA_CAMERA_IF_RX 20
58   -#define OMAP_DMA_MMC_TX 21
59   -#define OMAP_DMA_MMC_RX 22
60   -#define OMAP_DMA_NAND 23
61   -#define OMAP_DMA_IRQ_LCD_LINE 24
62   -#define OMAP_DMA_MEMORY_STICK 25
63   -#define OMAP_DMA_USB_W2FC_RX0 26
64   -#define OMAP_DMA_USB_W2FC_RX1 27
65   -#define OMAP_DMA_USB_W2FC_RX2 28
66   -#define OMAP_DMA_USB_W2FC_TX0 29
67   -#define OMAP_DMA_USB_W2FC_TX1 30
68   -#define OMAP_DMA_USB_W2FC_TX2 31
69   -
70   -/* These are only for 1610 */
71   -#define OMAP_DMA_CRYPTO_DES_IN 32
72   -#define OMAP_DMA_SPI_TX 33
73   -#define OMAP_DMA_SPI_RX 34
74   -#define OMAP_DMA_CRYPTO_HASH 35
75   -#define OMAP_DMA_CCP_ATTN 36
76   -#define OMAP_DMA_CCP_FIFO_NOT_EMPTY 37
77   -#define OMAP_DMA_CMT_APE_TX_CHAN_0 38
78   -#define OMAP_DMA_CMT_APE_RV_CHAN_0 39
79   -#define OMAP_DMA_CMT_APE_TX_CHAN_1 40
80   -#define OMAP_DMA_CMT_APE_RV_CHAN_1 41
81   -#define OMAP_DMA_CMT_APE_TX_CHAN_2 42
82   -#define OMAP_DMA_CMT_APE_RV_CHAN_2 43
83   -#define OMAP_DMA_CMT_APE_TX_CHAN_3 44
84   -#define OMAP_DMA_CMT_APE_RV_CHAN_3 45
85   -#define OMAP_DMA_CMT_APE_TX_CHAN_4 46
86   -#define OMAP_DMA_CMT_APE_RV_CHAN_4 47
87   -#define OMAP_DMA_CMT_APE_TX_CHAN_5 48
88   -#define OMAP_DMA_CMT_APE_RV_CHAN_5 49
89   -#define OMAP_DMA_CMT_APE_TX_CHAN_6 50
90   -#define OMAP_DMA_CMT_APE_RV_CHAN_6 51
91   -#define OMAP_DMA_CMT_APE_TX_CHAN_7 52
92   -#define OMAP_DMA_CMT_APE_RV_CHAN_7 53
93   -#define OMAP_DMA_MMC2_TX 54
94   -#define OMAP_DMA_MMC2_RX 55
95   -#define OMAP_DMA_CRYPTO_DES_OUT 56
96   -
97   -/* DMA channels for 24xx */
98   -#define OMAP24XX_DMA_NO_DEVICE 0
99   -#define OMAP24XX_DMA_XTI_DMA 1 /* S_DMA_0 */
100   -#define OMAP24XX_DMA_EXT_DMAREQ0 2 /* S_DMA_1 */
101   -#define OMAP24XX_DMA_EXT_DMAREQ1 3 /* S_DMA_2 */
102   -#define OMAP24XX_DMA_GPMC 4 /* S_DMA_3 */
103   -#define OMAP24XX_DMA_GFX 5 /* S_DMA_4 */
104   -#define OMAP24XX_DMA_DSS 6 /* S_DMA_5 */
105   -#define OMAP242X_DMA_VLYNQ_TX 7 /* S_DMA_6 */
106   -#define OMAP24XX_DMA_EXT_DMAREQ2 7 /* S_DMA_6 */
107   -#define OMAP24XX_DMA_CWT 8 /* S_DMA_7 */
108   -#define OMAP24XX_DMA_AES_TX 9 /* S_DMA_8 */
109   -#define OMAP24XX_DMA_AES_RX 10 /* S_DMA_9 */
110   -#define OMAP24XX_DMA_DES_TX 11 /* S_DMA_10 */
111   -#define OMAP24XX_DMA_DES_RX 12 /* S_DMA_11 */
112   -#define OMAP24XX_DMA_SHA1MD5_RX 13 /* S_DMA_12 */
113   -#define OMAP34XX_DMA_SHA2MD5_RX 13 /* S_DMA_12 */
114   -#define OMAP242X_DMA_EXT_DMAREQ2 14 /* S_DMA_13 */
115   -#define OMAP242X_DMA_EXT_DMAREQ3 15 /* S_DMA_14 */
116   -#define OMAP242X_DMA_EXT_DMAREQ4 16 /* S_DMA_15 */
117   -#define OMAP242X_DMA_EAC_AC_RD 17 /* S_DMA_16 */
118   -#define OMAP242X_DMA_EAC_AC_WR 18 /* S_DMA_17 */
119   -#define OMAP242X_DMA_EAC_MD_UL_RD 19 /* S_DMA_18 */
120   -#define OMAP242X_DMA_EAC_MD_UL_WR 20 /* S_DMA_19 */
121   -#define OMAP242X_DMA_EAC_MD_DL_RD 21 /* S_DMA_20 */
122   -#define OMAP242X_DMA_EAC_MD_DL_WR 22 /* S_DMA_21 */
123   -#define OMAP242X_DMA_EAC_BT_UL_RD 23 /* S_DMA_22 */
124   -#define OMAP242X_DMA_EAC_BT_UL_WR 24 /* S_DMA_23 */
125   -#define OMAP242X_DMA_EAC_BT_DL_RD 25 /* S_DMA_24 */
126   -#define OMAP242X_DMA_EAC_BT_DL_WR 26 /* S_DMA_25 */
127   -#define OMAP243X_DMA_EXT_DMAREQ3 14 /* S_DMA_13 */
128   -#define OMAP24XX_DMA_SPI3_TX0 15 /* S_DMA_14 */
129   -#define OMAP24XX_DMA_SPI3_RX0 16 /* S_DMA_15 */
130   -#define OMAP24XX_DMA_MCBSP3_TX 17 /* S_DMA_16 */
131   -#define OMAP24XX_DMA_MCBSP3_RX 18 /* S_DMA_17 */
132   -#define OMAP24XX_DMA_MCBSP4_TX 19 /* S_DMA_18 */
133   -#define OMAP24XX_DMA_MCBSP4_RX 20 /* S_DMA_19 */
134   -#define OMAP24XX_DMA_MCBSP5_TX 21 /* S_DMA_20 */
135   -#define OMAP24XX_DMA_MCBSP5_RX 22 /* S_DMA_21 */
136   -#define OMAP24XX_DMA_SPI3_TX1 23 /* S_DMA_22 */
137   -#define OMAP24XX_DMA_SPI3_RX1 24 /* S_DMA_23 */
138   -#define OMAP243X_DMA_EXT_DMAREQ4 25 /* S_DMA_24 */
139   -#define OMAP243X_DMA_EXT_DMAREQ5 26 /* S_DMA_25 */
140   -#define OMAP34XX_DMA_I2C3_TX 25 /* S_DMA_24 */
141   -#define OMAP34XX_DMA_I2C3_RX 26 /* S_DMA_25 */
142   -#define OMAP24XX_DMA_I2C1_TX 27 /* S_DMA_26 */
143   -#define OMAP24XX_DMA_I2C1_RX 28 /* S_DMA_27 */
144   -#define OMAP24XX_DMA_I2C2_TX 29 /* S_DMA_28 */
145   -#define OMAP24XX_DMA_I2C2_RX 30 /* S_DMA_29 */
146   -#define OMAP24XX_DMA_MCBSP1_TX 31 /* S_DMA_30 */
147   -#define OMAP24XX_DMA_MCBSP1_RX 32 /* S_DMA_31 */
148   -#define OMAP24XX_DMA_MCBSP2_TX 33 /* S_DMA_32 */
149   -#define OMAP24XX_DMA_MCBSP2_RX 34 /* S_DMA_33 */
150   -#define OMAP24XX_DMA_SPI1_TX0 35 /* S_DMA_34 */
151   -#define OMAP24XX_DMA_SPI1_RX0 36 /* S_DMA_35 */
152   -#define OMAP24XX_DMA_SPI1_TX1 37 /* S_DMA_36 */
153   -#define OMAP24XX_DMA_SPI1_RX1 38 /* S_DMA_37 */
154   -#define OMAP24XX_DMA_SPI1_TX2 39 /* S_DMA_38 */
155   -#define OMAP24XX_DMA_SPI1_RX2 40 /* S_DMA_39 */
156   -#define OMAP24XX_DMA_SPI1_TX3 41 /* S_DMA_40 */
157   -#define OMAP24XX_DMA_SPI1_RX3 42 /* S_DMA_41 */
158   -#define OMAP24XX_DMA_SPI2_TX0 43 /* S_DMA_42 */
159   -#define OMAP24XX_DMA_SPI2_RX0 44 /* S_DMA_43 */
160   -#define OMAP24XX_DMA_SPI2_TX1 45 /* S_DMA_44 */
161   -#define OMAP24XX_DMA_SPI2_RX1 46 /* S_DMA_45 */
162   -#define OMAP24XX_DMA_MMC2_TX 47 /* S_DMA_46 */
163   -#define OMAP24XX_DMA_MMC2_RX 48 /* S_DMA_47 */
164   -#define OMAP24XX_DMA_UART1_TX 49 /* S_DMA_48 */
165   -#define OMAP24XX_DMA_UART1_RX 50 /* S_DMA_49 */
166   -#define OMAP24XX_DMA_UART2_TX 51 /* S_DMA_50 */
167   -#define OMAP24XX_DMA_UART2_RX 52 /* S_DMA_51 */
168   -#define OMAP24XX_DMA_UART3_TX 53 /* S_DMA_52 */
169   -#define OMAP24XX_DMA_UART3_RX 54 /* S_DMA_53 */
170   -#define OMAP24XX_DMA_USB_W2FC_TX0 55 /* S_DMA_54 */
171   -#define OMAP24XX_DMA_USB_W2FC_RX0 56 /* S_DMA_55 */
172   -#define OMAP24XX_DMA_USB_W2FC_TX1 57 /* S_DMA_56 */
173   -#define OMAP24XX_DMA_USB_W2FC_RX1 58 /* S_DMA_57 */
174   -#define OMAP24XX_DMA_USB_W2FC_TX2 59 /* S_DMA_58 */
175   -#define OMAP24XX_DMA_USB_W2FC_RX2 60 /* S_DMA_59 */
176   -#define OMAP24XX_DMA_MMC1_TX 61 /* S_DMA_60 */
177   -#define OMAP24XX_DMA_MMC1_RX 62 /* S_DMA_61 */
178   -#define OMAP24XX_DMA_MS 63 /* S_DMA_62 */
179   -#define OMAP242X_DMA_EXT_DMAREQ5 64 /* S_DMA_63 */
180   -#define OMAP243X_DMA_EXT_DMAREQ6 64 /* S_DMA_63 */
181   -#define OMAP34XX_DMA_EXT_DMAREQ3 64 /* S_DMA_63 */
182   -#define OMAP34XX_DMA_AES2_TX 65 /* S_DMA_64 */
183   -#define OMAP34XX_DMA_AES2_RX 66 /* S_DMA_65 */
184   -#define OMAP34XX_DMA_DES2_TX 67 /* S_DMA_66 */
185   -#define OMAP34XX_DMA_DES2_RX 68 /* S_DMA_67 */
186   -#define OMAP34XX_DMA_SHA1MD5_RX 69 /* S_DMA_68 */
187   -#define OMAP34XX_DMA_SPI4_TX0 70 /* S_DMA_69 */
188   -#define OMAP34XX_DMA_SPI4_RX0 71 /* S_DMA_70 */
189   -#define OMAP34XX_DSS_DMA0 72 /* S_DMA_71 */
190   -#define OMAP34XX_DSS_DMA1 73 /* S_DMA_72 */
191   -#define OMAP34XX_DSS_DMA2 74 /* S_DMA_73 */
192   -#define OMAP34XX_DSS_DMA3 75 /* S_DMA_74 */
193   -#define OMAP34XX_DMA_MMC3_TX 77 /* S_DMA_76 */
194   -#define OMAP34XX_DMA_MMC3_RX 78 /* S_DMA_77 */
195   -#define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */
196   -#define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */
197   -
198   -#define OMAP36XX_DMA_UART4_TX 81 /* S_DMA_80 */
199   -#define OMAP36XX_DMA_UART4_RX 82 /* S_DMA_81 */
200   -
201   -/* Only for AM35xx */
202   -#define AM35XX_DMA_UART4_TX 54
203   -#define AM35XX_DMA_UART4_RX 55
204   -
205   -/*----------------------------------------------------------------------------*/
206   -
207   -#define OMAP1_DMA_TOUT_IRQ (1 << 0)
208   -#define OMAP_DMA_DROP_IRQ (1 << 1)
209   -#define OMAP_DMA_HALF_IRQ (1 << 2)
210   -#define OMAP_DMA_FRAME_IRQ (1 << 3)
211   -#define OMAP_DMA_LAST_IRQ (1 << 4)
212   -#define OMAP_DMA_BLOCK_IRQ (1 << 5)
213   -#define OMAP1_DMA_SYNC_IRQ (1 << 6)
214   -#define OMAP2_DMA_PKT_IRQ (1 << 7)
215   -#define OMAP2_DMA_TRANS_ERR_IRQ (1 << 8)
216   -#define OMAP2_DMA_SECURE_ERR_IRQ (1 << 9)
217   -#define OMAP2_DMA_SUPERVISOR_ERR_IRQ (1 << 10)
218   -#define OMAP2_DMA_MISALIGNED_ERR_IRQ (1 << 11)
219   -
220   -#define OMAP_DMA_CCR_EN (1 << 7)
221   -#define OMAP_DMA_CCR_RD_ACTIVE (1 << 9)
222   -#define OMAP_DMA_CCR_WR_ACTIVE (1 << 10)
223   -#define OMAP_DMA_CCR_SEL_SRC_DST_SYNC (1 << 24)
224   -#define OMAP_DMA_CCR_BUFFERING_DISABLE (1 << 25)
225   -
226   -#define OMAP_DMA_DATA_TYPE_S8 0x00
227   -#define OMAP_DMA_DATA_TYPE_S16 0x01
228   -#define OMAP_DMA_DATA_TYPE_S32 0x02
229   -
230   -#define OMAP_DMA_SYNC_ELEMENT 0x00
231   -#define OMAP_DMA_SYNC_FRAME 0x01
232   -#define OMAP_DMA_SYNC_BLOCK 0x02
233   -#define OMAP_DMA_SYNC_PACKET 0x03
234   -
235   -#define OMAP_DMA_DST_SYNC_PREFETCH 0x02
236   -#define OMAP_DMA_SRC_SYNC 0x01
237   -#define OMAP_DMA_DST_SYNC 0x00
238   -
239   -#define OMAP_DMA_PORT_EMIFF 0x00
240   -#define OMAP_DMA_PORT_EMIFS 0x01
241   -#define OMAP_DMA_PORT_OCP_T1 0x02
242   -#define OMAP_DMA_PORT_TIPB 0x03
243   -#define OMAP_DMA_PORT_OCP_T2 0x04
244   -#define OMAP_DMA_PORT_MPUI 0x05
245   -
246   -#define OMAP_DMA_AMODE_CONSTANT 0x00
247   -#define OMAP_DMA_AMODE_POST_INC 0x01
248   -#define OMAP_DMA_AMODE_SINGLE_IDX 0x02
249   -#define OMAP_DMA_AMODE_DOUBLE_IDX 0x03
250   -
251   -#define DMA_DEFAULT_FIFO_DEPTH 0x10
252   -#define DMA_DEFAULT_ARB_RATE 0x01
253   -/* Pass THREAD_RESERVE ORed with THREAD_FIFO for tparams */
254   -#define DMA_THREAD_RESERVE_NORM (0x00 << 12) /* Def */
255   -#define DMA_THREAD_RESERVE_ONET (0x01 << 12)
256   -#define DMA_THREAD_RESERVE_TWOT (0x02 << 12)
257   -#define DMA_THREAD_RESERVE_THREET (0x03 << 12)
258   -#define DMA_THREAD_FIFO_NONE (0x00 << 14) /* Def */
259   -#define DMA_THREAD_FIFO_75 (0x01 << 14)
260   -#define DMA_THREAD_FIFO_25 (0x02 << 14)
261   -#define DMA_THREAD_FIFO_50 (0x03 << 14)
262   -
263   -/* DMA4_OCP_SYSCONFIG bits */
264   -#define DMA_SYSCONFIG_MIDLEMODE_MASK (3 << 12)
265   -#define DMA_SYSCONFIG_CLOCKACTIVITY_MASK (3 << 8)
266   -#define DMA_SYSCONFIG_EMUFREE (1 << 5)
267   -#define DMA_SYSCONFIG_SIDLEMODE_MASK (3 << 3)
268   -#define DMA_SYSCONFIG_SOFTRESET (1 << 2)
269   -#define DMA_SYSCONFIG_AUTOIDLE (1 << 0)
270   -
271   -#define DMA_SYSCONFIG_MIDLEMODE(n) ((n) << 12)
272   -#define DMA_SYSCONFIG_SIDLEMODE(n) ((n) << 3)
273   -
274   -#define DMA_IDLEMODE_SMARTIDLE 0x2
275   -#define DMA_IDLEMODE_NO_IDLE 0x1
276   -#define DMA_IDLEMODE_FORCE_IDLE 0x0
277   -
278   -/* Chaining modes*/
279   -#ifndef CONFIG_ARCH_OMAP1
280   -#define OMAP_DMA_STATIC_CHAIN 0x1
281   -#define OMAP_DMA_DYNAMIC_CHAIN 0x2
282   -#define OMAP_DMA_CHAIN_ACTIVE 0x1
283   -#define OMAP_DMA_CHAIN_INACTIVE 0x0
284   -#endif
285   -
286   -#define DMA_CH_PRIO_HIGH 0x1
287   -#define DMA_CH_PRIO_LOW 0x0 /* Def */
288   -
289   -/* Errata handling */
290   -#define IS_DMA_ERRATA(id) (errata & (id))
291   -#define SET_DMA_ERRATA(id) (errata |= (id))
292   -
293   -#define DMA_ERRATA_IFRAME_BUFFERING BIT(0x0)
294   -#define DMA_ERRATA_PARALLEL_CHANNELS BIT(0x1)
295   -#define DMA_ERRATA_i378 BIT(0x2)
296   -#define DMA_ERRATA_i541 BIT(0x3)
297   -#define DMA_ERRATA_i88 BIT(0x4)
298   -#define DMA_ERRATA_3_3 BIT(0x5)
299   -#define DMA_ROMCODE_BUG BIT(0x6)
300   -
301   -/* Attributes for OMAP DMA Contrller */
302   -#define DMA_LINKED_LCH BIT(0x0)
303   -#define GLOBAL_PRIORITY BIT(0x1)
304   -#define RESERVE_CHANNEL BIT(0x2)
305   -#define IS_CSSA_32 BIT(0x3)
306   -#define IS_CDSA_32 BIT(0x4)
307   -#define IS_RW_PRIORITY BIT(0x5)
308   -#define ENABLE_1510_MODE BIT(0x6)
309   -#define SRC_PORT BIT(0x7)
310   -#define DST_PORT BIT(0x8)
311   -#define SRC_INDEX BIT(0x9)
312   -#define DST_INDEX BIT(0xA)
313   -#define IS_BURST_ONLY4 BIT(0xB)
314   -#define CLEAR_CSR_ON_READ BIT(0xC)
315   -#define IS_WORD_16 BIT(0xD)
316   -
317   -/* Defines for DMA Capabilities */
318   -#define DMA_HAS_TRANSPARENT_CAPS (0x1 << 18)
319   -#define DMA_HAS_CONSTANT_FILL_CAPS (0x1 << 19)
320   -#define DMA_HAS_DESCRIPTOR_CAPS (0x3 << 20)
321   -
322   -enum omap_reg_offsets {
323   -
324   -GCR, GSCR, GRST1, HW_ID,
325   -PCH2_ID, PCH0_ID, PCH1_ID, PCHG_ID,
326   -PCHD_ID, CAPS_0, CAPS_1, CAPS_2,
327   -CAPS_3, CAPS_4, PCH2_SR, PCH0_SR,
328   -PCH1_SR, PCHD_SR, REVISION, IRQSTATUS_L0,
329   -IRQSTATUS_L1, IRQSTATUS_L2, IRQSTATUS_L3, IRQENABLE_L0,
330   -IRQENABLE_L1, IRQENABLE_L2, IRQENABLE_L3, SYSSTATUS,
331   -OCP_SYSCONFIG,
332   -
333   -/* omap1+ specific */
334   -CPC, CCR2, LCH_CTRL,
335   -
336   -/* Common registers for all omap's */
337   -CSDP, CCR, CICR, CSR,
338   -CEN, CFN, CSFI, CSEI,
339   -CSAC, CDAC, CDEI,
340   -CDFI, CLNK_CTRL,
341   -
342   -/* Channel specific registers */
343   -CSSA, CDSA, COLOR,
344   -CCEN, CCFN,
345   -
346   -/* omap3630 and omap4 specific */
347   -CDP, CNDP, CCDN,
348   -
349   -};
350   -
351   -enum omap_dma_burst_mode {
352   - OMAP_DMA_DATA_BURST_DIS = 0,
353   - OMAP_DMA_DATA_BURST_4,
354   - OMAP_DMA_DATA_BURST_8,
355   - OMAP_DMA_DATA_BURST_16,
356   -};
357   -
358   -enum end_type {
359   - OMAP_DMA_LITTLE_ENDIAN = 0,
360   - OMAP_DMA_BIG_ENDIAN
361   -};
362   -
363   -enum omap_dma_color_mode {
364   - OMAP_DMA_COLOR_DIS = 0,
365   - OMAP_DMA_CONSTANT_FILL,
366   - OMAP_DMA_TRANSPARENT_COPY
367   -};
368   -
369   -enum omap_dma_write_mode {
370   - OMAP_DMA_WRITE_NON_POSTED = 0,
371   - OMAP_DMA_WRITE_POSTED,
372   - OMAP_DMA_WRITE_LAST_NON_POSTED
373   -};
374   -
375   -enum omap_dma_channel_mode {
376   - OMAP_DMA_LCH_2D = 0,
377   - OMAP_DMA_LCH_G,
378   - OMAP_DMA_LCH_P,
379   - OMAP_DMA_LCH_PD
380   -};
381   -
382   -struct omap_dma_channel_params {
383   - int data_type; /* data type 8,16,32 */
384   - int elem_count; /* number of elements in a frame */
385   - int frame_count; /* number of frames in a element */
386   -
387   - int src_port; /* Only on OMAP1 REVISIT: Is this needed? */
388   - int src_amode; /* constant, post increment, indexed,
389   - double indexed */
390   - unsigned long src_start; /* source address : physical */
391   - int src_ei; /* source element index */
392   - int src_fi; /* source frame index */
393   -
394   - int dst_port; /* Only on OMAP1 REVISIT: Is this needed? */
395   - int dst_amode; /* constant, post increment, indexed,
396   - double indexed */
397   - unsigned long dst_start; /* source address : physical */
398   - int dst_ei; /* source element index */
399   - int dst_fi; /* source frame index */
400   -
401   - int trigger; /* trigger attached if the channel is
402   - synchronized */
403   - int sync_mode; /* sycn on element, frame , block or packet */
404   - int src_or_dst_synch; /* source synch(1) or destination synch(0) */
405   -
406   - int ie; /* interrupt enabled */
407   -
408   - unsigned char read_prio;/* read priority */
409   - unsigned char write_prio;/* write priority */
410   -
411   -#ifndef CONFIG_ARCH_OMAP1
412   - enum omap_dma_burst_mode burst_mode; /* Burst mode 4/8/16 words */
413   -#endif
414   -};
415   -
416   -struct omap_dma_lch {
417   - int next_lch;
418   - int dev_id;
419   - u16 saved_csr;
420   - u16 enabled_irqs;
421   - const char *dev_name;
422   - void (*callback)(int lch, u16 ch_status, void *data);
423   - void *data;
424   - long flags;
425   - /* required for Dynamic chaining */
426   - int prev_linked_ch;
427   - int next_linked_ch;
428   - int state;
429   - int chain_id;
430   - int status;
431   -};
432   -
433   -struct omap_dma_dev_attr {
434   - u32 dev_caps;
435   - u16 lch_count;
436   - u16 chan_count;
437   - struct omap_dma_lch *chan;
438   -};
439   -
440   -/* System DMA platform data structure */
441   -struct omap_system_dma_plat_info {
442   - struct omap_dma_dev_attr *dma_attr;
443   - u32 errata;
444   - void (*disable_irq_lch)(int lch);
445   - void (*show_dma_caps)(void);
446   - void (*clear_lch_regs)(int lch);
447   - void (*clear_dma)(int lch);
448   - void (*dma_write)(u32 val, int reg, int lch);
449   - u32 (*dma_read)(int reg, int lch);
450   -};
451   -
452   -extern void __init omap_init_consistent_dma_size(void);
453   -extern void omap_set_dma_priority(int lch, int dst_port, int priority);
454   -extern int omap_request_dma(int dev_id, const char *dev_name,
455   - void (*callback)(int lch, u16 ch_status, void *data),
456   - void *data, int *dma_ch);
457   -extern void omap_enable_dma_irq(int ch, u16 irq_bits);
458   -extern void omap_disable_dma_irq(int ch, u16 irq_bits);
459   -extern void omap_free_dma(int ch);
460   -extern void omap_start_dma(int lch);
461   -extern void omap_stop_dma(int lch);
462   -extern void omap_set_dma_transfer_params(int lch, int data_type,
463   - int elem_count, int frame_count,
464   - int sync_mode,
465   - int dma_trigger, int src_or_dst_synch);
466   -extern void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode,
467   - u32 color);
468   -extern void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode);
469   -extern void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode);
470   -
471   -extern void omap_set_dma_src_params(int lch, int src_port, int src_amode,
472   - unsigned long src_start,
473   - int src_ei, int src_fi);
474   -extern void omap_set_dma_src_index(int lch, int eidx, int fidx);
475   -extern void omap_set_dma_src_data_pack(int lch, int enable);
476   -extern void omap_set_dma_src_burst_mode(int lch,
477   - enum omap_dma_burst_mode burst_mode);
478   -
479   -extern void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
480   - unsigned long dest_start,
481   - int dst_ei, int dst_fi);
482   -extern void omap_set_dma_dest_index(int lch, int eidx, int fidx);
483   -extern void omap_set_dma_dest_data_pack(int lch, int enable);
484   -extern void omap_set_dma_dest_burst_mode(int lch,
485   - enum omap_dma_burst_mode burst_mode);
486   -
487   -extern void omap_set_dma_params(int lch,
488   - struct omap_dma_channel_params *params);
489   -
490   -extern void omap_dma_link_lch(int lch_head, int lch_queue);
491   -extern void omap_dma_unlink_lch(int lch_head, int lch_queue);
492   -
493   -extern int omap_set_dma_callback(int lch,
494   - void (*callback)(int lch, u16 ch_status, void *data),
495   - void *data);
496   -extern dma_addr_t omap_get_dma_src_pos(int lch);
497   -extern dma_addr_t omap_get_dma_dst_pos(int lch);
498   -extern void omap_clear_dma(int lch);
499   -extern int omap_get_dma_active_status(int lch);
500   -extern int omap_dma_running(void);
501   -extern void omap_dma_set_global_params(int arb_rate, int max_fifo_depth,
502   - int tparams);
503   -extern int omap_dma_set_prio_lch(int lch, unsigned char read_prio,
504   - unsigned char write_prio);
505   -extern void omap_set_dma_dst_endian_type(int lch, enum end_type etype);
506   -extern void omap_set_dma_src_endian_type(int lch, enum end_type etype);
507   -extern int omap_get_dma_index(int lch, int *ei, int *fi);
508   -
509   -void omap_dma_global_context_save(void);
510   -void omap_dma_global_context_restore(void);
511   -
512   -extern void omap_dma_disable_irq(int lch);
513   -
514   -/* Chaining APIs */
515   -#ifndef CONFIG_ARCH_OMAP1
516   -extern int omap_request_dma_chain(int dev_id, const char *dev_name,
517   - void (*callback) (int lch, u16 ch_status,
518   - void *data),
519   - int *chain_id, int no_of_chans,
520   - int chain_mode,
521   - struct omap_dma_channel_params params);
522   -extern int omap_free_dma_chain(int chain_id);
523   -extern int omap_dma_chain_a_transfer(int chain_id, int src_start,
524   - int dest_start, int elem_count,
525   - int frame_count, void *callbk_data);
526   -extern int omap_start_dma_chain_transfers(int chain_id);
527   -extern int omap_stop_dma_chain_transfers(int chain_id);
528   -extern int omap_get_dma_chain_index(int chain_id, int *ei, int *fi);
529   -extern int omap_get_dma_chain_dst_pos(int chain_id);
530   -extern int omap_get_dma_chain_src_pos(int chain_id);
531   -
532   -extern int omap_modify_dma_chain_params(int chain_id,
533   - struct omap_dma_channel_params params);
534   -extern int omap_dma_chain_status(int chain_id);
535   -#endif
536   -
537   -#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_FB_OMAP)
538   -#include <mach/lcd_dma.h>
539   -#else
540   -static inline int omap_lcd_dma_running(void)
541   -{
542   - return 0;
543   -}
544   -#endif
545   -
546   -#endif /* __ASM_ARCH_DMA_H */
drivers/crypto/omap-aes.c
Diff comments   View file @ 94c6578
... ... @@ -29,7 +29,7 @@
29 29 #include <crypto/scatterwalk.h>
30 30 #include <crypto/aes.h>
31 31  
32   -#include <plat/dma.h>
  32 +#include <plat-omap/dma-omap.h>
33 33  
34 34 /* OMAP TRM gives bitfields as start:end, where start is the higher bit
35 35 number. For example 7:0 */
drivers/crypto/omap-sham.c
Diff comments   View file @ 94c6578
... ... @@ -37,7 +37,7 @@
37 37 #include <crypto/hash.h>
38 38 #include <crypto/internal/hash.h>
39 39  
40   -#include <plat/dma.h>
  40 +#include <plat-omap/dma-omap.h>
41 41 #include <mach/irqs.h>
42 42  
43 43 #define SHA_REG_DIGEST(x) (0x00 + ((x) * 0x04))
drivers/dma/omap-dma.c
Diff comments   View file @ 94c6578
... ... @@ -19,7 +19,7 @@
19 19  
20 20 #include "virt-dma.h"
21 21  
22   -#include <plat/dma.h>
  22 +#include <plat-omap/dma-omap.h>
23 23  
24 24 #ifdef CONFIG_ARCH_OMAP2PLUS
25 25 #define dma_omap2plus() 1
drivers/media/platform/omap/omap_vout.c
Diff comments   View file @ 94c6578
... ... @@ -45,7 +45,7 @@
45 45 #include <media/v4l2-ioctl.h>
46 46  
47 47 #include <plat/cpu.h>
48   -#include <plat/dma.h>
  48 +#include <plat-omap/dma-omap.h>
49 49 #include <plat/vrfb.h>
50 50 #include <video/omapdss.h>
51 51  
drivers/media/platform/omap/omap_vout_vrfb.c
Diff comments   View file @ 94c6578
... ... @@ -16,11 +16,13 @@
16 16 #include <media/videobuf-dma-contig.h>
17 17 #include <media/v4l2-device.h>
18 18  
19   -#include <plat/dma.h>
  19 +#include <plat-omap/dma-omap.h>
20 20 #include <plat/vrfb.h>
21 21  
22 22 #include "omap_voutdef.h"
23 23 #include "omap_voutlib.h"
  24 +
  25 +#define OMAP_DMA_NO_DEVICE 0
24 26  
25 27 /*
26 28 * Function for allocating video buffers
drivers/media/platform/omap3isp/isphist.c
Diff comments   View file @ 94c6578
... ... @@ -34,6 +34,8 @@
34 34 #include "ispreg.h"
35 35 #include "isphist.h"
36 36  
  37 +#define OMAP24XX_DMA_NO_DEVICE 0
  38 +
37 39 #define HIST_CONFIG_DMA 1
38 40  
39 41 #define HIST_USING_DMA(hist) ((hist)->dma_ch >= 0)
drivers/media/platform/omap3isp/ispstat.h
Diff comments   View file @ 94c6578
... ... @@ -30,7 +30,7 @@
30 30  
31 31 #include <linux/types.h>
32 32 #include <linux/omap3isp.h>
33   -#include <plat/dma.h>
  33 +#include <plat-omap/dma-omap.h>
34 34 #include <media/v4l2-event.h>
35 35  
36 36 #include "isp.h"
drivers/media/platform/soc_camera/omap1_camera.c
Diff comments   View file @ 94c6578
... ... @@ -34,12 +34,13 @@
34 34 #include <media/videobuf-dma-contig.h>
35 35 #include <media/videobuf-dma-sg.h>
36 36  
37   -#include <plat/dma.h>
  37 +#include <plat-omap/dma-omap.h>
38 38  
39 39  
40 40 #define DRIVER_NAME "omap1-camera"
41 41 #define DRIVER_VERSION "0.0.2"
42 42  
  43 +#define OMAP_DMA_CAMERA_IF_RX 20
43 44  
44 45 /*
45 46 * ---------------------------------------------------------------------------
drivers/mmc/host/omap.c
Diff comments   View file @ 94c6578
... ... @@ -30,7 +30,7 @@
30 30 #include <linux/slab.h>
31 31  
32 32 #include <plat/mmc.h>
33   -#include <plat/dma.h>
  33 +#include <plat-omap/dma-omap.h>
34 34  
35 35 #define OMAP_MMC_REG_CMD 0x00
36 36 #define OMAP_MMC_REG_ARGL 0x01
... ... @@ -83,6 +83,16 @@
83 83 #define OMAP_MMC_CMDTYPE_BCR 1
84 84 #define OMAP_MMC_CMDTYPE_AC 2
85 85 #define OMAP_MMC_CMDTYPE_ADTC 3
  86 +
  87 +#define OMAP_DMA_MMC_TX 21
  88 +#define OMAP_DMA_MMC_RX 22
  89 +#define OMAP_DMA_MMC2_TX 54
  90 +#define OMAP_DMA_MMC2_RX 55
  91 +
  92 +#define OMAP24XX_DMA_MMC2_TX 47
  93 +#define OMAP24XX_DMA_MMC2_RX 48
  94 +#define OMAP24XX_DMA_MMC1_TX 61
  95 +#define OMAP24XX_DMA_MMC1_RX 62
86 96  
87 97  
88 98 #define DRIVER_NAME "mmci-omap"
drivers/mtd/nand/omap2.c
Diff comments   View file @ 94c6578
... ... @@ -27,7 +27,7 @@
27 27 #include <linux/bch.h>
28 28 #endif
29 29  
30   -#include <plat/dma.h>
  30 +#include <plat-omap/dma-omap.h>
31 31 #include <plat/gpmc.h>
32 32 #include <linux/platform_data/mtd-nand-omap2.h>
33 33  
... ... @@ -110,6 +110,8 @@
110 110 #define ECC1RESULTSIZE 0x1
111 111 #define ECCCLEAR 0x100
112 112 #define ECC1 0x1
  113 +
  114 +#define OMAP24XX_DMA_GPMC 4
113 115  
114 116 /* oob info generated runtime depending on ecc algorithm and layout selected */
115 117 static struct nand_ecclayout omap_oobinfo;
drivers/mtd/onenand/omap2.c
Diff comments   View file @ 94c6578
... ... @@ -42,7 +42,7 @@
42 42 #include <linux/platform_data/mtd-onenand-omap2.h>
43 43 #include <asm/gpio.h>
44 44  
45   -#include <plat/dma.h>
  45 +#include <plat-omap/dma-omap.h>
46 46 #include <plat/cpu.h>
47 47  
48 48 #define DRIVER_NAME "omap2-onenand"
drivers/usb/gadget/omap_udc.c
Diff comments   View file @ 94c6578
... ... @@ -44,7 +44,7 @@
44 44 #include <asm/unaligned.h>
45 45 #include <asm/mach-types.h>
46 46  
47   -#include <plat/dma.h>
  47 +#include <plat-omap/dma-omap.h>
48 48  
49 49 #include <mach/usb.h>
50 50  
... ... @@ -60,6 +60,8 @@
60 60  
61 61 #define DRIVER_DESC "OMAP UDC driver"
62 62 #define DRIVER_VERSION "4 October 2004"
  63 +
  64 +#define OMAP_DMA_USB_W2FC_TX0 29
63 65  
64 66 /*
65 67 * The OMAP UDC needs _very_ early endpoint setup: before enabling the
drivers/usb/musb/tusb6010_omap.c
Diff comments   View file @ 94c6578
... ... @@ -16,7 +16,7 @@
16 16 #include <linux/platform_device.h>
17 17 #include <linux/dma-mapping.h>
18 18 #include <linux/slab.h>
19   -#include <plat/dma.h>
  19 +#include <plat-omap/dma-omap.h>
20 20  
21 21 #include "musb_core.h"
22 22 #include "tusb6010.h"
... ... @@ -24,6 +24,13 @@
24 24 #define to_chdat(c) ((struct tusb_omap_dma_ch *)(c)->private_data)
25 25  
26 26 #define MAX_DMAREQ 5 /* REVISIT: Really 6, but req5 not OK */
  27 +
  28 +#define OMAP24XX_DMA_EXT_DMAREQ0 2
  29 +#define OMAP24XX_DMA_EXT_DMAREQ1 3
  30 +#define OMAP242X_DMA_EXT_DMAREQ2 14
  31 +#define OMAP242X_DMA_EXT_DMAREQ3 15
  32 +#define OMAP242X_DMA_EXT_DMAREQ4 16
  33 +#define OMAP242X_DMA_EXT_DMAREQ5 64
27 34  
28 35 struct tusb_omap_dma_ch {
29 36 struct musb *musb;
drivers/video/omap/lcdc.c
Diff comments   View file @ 94c6578
... ... @@ -31,7 +31,7 @@
31 31 #include <linux/gfp.h>
32 32  
33 33 #include <mach/lcdc.h>
34   -#include <plat/dma.h>
  34 +#include <plat-omap/dma-omap.h>
35 35  
36 36 #include <asm/mach-types.h>
37 37  
drivers/video/omap/omapfb_main.c
Diff comments   View file @ 94c6578
... ... @@ -30,7 +30,7 @@
30 30 #include <linux/uaccess.h>
31 31 #include <linux/module.h>
32 32  
33   -#include <plat/dma.h>
  33 +#include <plat-omap/dma-omap.h>
34 34  
35 35 #include "omapfb.h"
36 36 #include "lcdc.h"
drivers/video/omap/sossi.c
Diff comments   View file @ 94c6578
... ... @@ -25,7 +25,7 @@
25 25 #include <linux/io.h>
26 26 #include <linux/interrupt.h>
27 27  
28   -#include <plat/dma.h>
  28 +#include <plat-omap/dma-omap.h>
29 29  
30 30 #include "omapfb.h"
31 31 #include "lcdc.h"