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Commit 97cab45583f75428773547f3bbe59fece05420d3

Authored by Kuninori Morimoto
Committed by Florian Tobias Schandinat
1 parent a2065a368c
Exists in master and in 6 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

fbdev: sh_mipi_dsi: fixup setup timing DSICTRL 

DSICTRL should be called after all mipi settings

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

Showing 1 changed file with 3 additions and 2 deletions Side-by-side Diff

drivers/video/sh_mipi_dsi.c
Diff comments   View file @ 97cab45
... ... @@ -265,8 +265,6 @@
265 265 iowrite32(0x0fffffff, base + TATOVSET);
266 266 /* Peripheral reset timeout, default 0xffffffff */
267 267 iowrite32(0x0fffffff, base + PRTOVSET);
268   - /* Enable timeout counters */
269   - iowrite32(0x00000f00, base + DSICTRL);
270 268 /* Interrupts not used, disable all */
271 269 iowrite32(0, base + DSIINTE);
272 270 /* DSI-Tx bias on */
... ... @@ -387,6 +385,9 @@
387 385 sh_mipi_dcs_param(ch->chan, MIPI_DCS_SET_PIXEL_FORMAT,
388 386 pixfmt << 4);
389 387 sh_mipi_dcs(ch->chan, MIPI_DCS_SET_DISPLAY_ON);
  388 +
  389 + /* Enable timeout counters */
  390 + iowrite32(0x00000f00, base + DSICTRL);
390 391  
391 392 return 0;
392 393 }