MIPS: MIPS64R2: Fix buggy __arch_swab64

The way the code is written it was assuming dshd has the function of a hypothetical dshw instruction ... Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

MIPS: MIPS64R2: Fix buggy __arch_swab64
The way the code is written it was assuming dshd has the function of a hypothetical dshw instruction ... Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
David Daney · Ralf Baechle
1 parent 08d9d1c4d4
Showing 1 changed file with 2 additions and 3 deletions Side-by-side Diff
arch/mips/include/asm/byteorder.h
@@ -50,9 +50,8 @@
 static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
 {
 	__asm__(
-	"	dsbh	%0, %1			\n"
-	"	dshd	%0, %0			\n"
-	"	drotr	%0, %0, 32		\n"
+	"	dsbh	%0, %1\n"
+	"	dshd	%0, %0"
 	: "=r" (x)
 	: "r" (x));
...	...	@@ -50,9 +50,8 @@
50	50	static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
51	51	{
52	52	__asm__(
53		- " dsbh %0, %1 \n"
54		- " dshd %0, %0 \n"
55		- " drotr %0, %0, 32 \n"
	53	+ " dsbh %0, %1\n"
	54	+ " dshd %0, %0"
56	55	: "=r" (x)
57	56	: "r" (x));
58	57