09 Mar, 2010
1 commit
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Signed-off-by: Graf Yang
Signed-off-by: Mike Frysinger
07 Jan, 2009
2 commits
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- remove duplicated code and headers
- add option allowing arbitrary SDRAM/DDR Timing parameters.
- mark automatically calculated timings as EXPERIMENTAL
- fix comment header blockRelated to BUGs:
- kernel boot up fails with CONFIG_BFIN_KERNEL_CLOCK item on.
- kernel does not boot if re-program clocks[ Mike Frysinger
- fix comment header
- mark do_sync static
- document the DMA shutdown
- simplify SIC_IWR handling
- fix ANOMALY_05000265 handling to work as intended ]Signed-off-by: Michael Hennerich
Signed-off-by: Mike Frysinger
Signed-off-by: Bryan Wu -
Blackfin dual core BF561 processor can support SMP like features.
https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-likeIn this patch, we provide SMP extend to BF561 kernel code
Signed-off-by: Graf Yang
Signed-off-by: Mike Frysinger
Signed-off-by: Bryan Wu
12 Jul, 2007
1 commit
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The ADSP-BF54x was specifically designed to meet the needs of convergent multimedia
applications where system performance and cost are essential ingredients. The
integration of multimedia, human interface, and connectivity peripherals combined
with increased system bandwidth and on-chip memory provides customers a platform to
design the most demanding applications.Since now, ADSP-BF54x will be supported in the Linux kernel and bunch of related drivers
such as USB OTG, ATAPI, NAND flash controller, LCD framebuffer, sound, touch screen will
be submitted later.Please enjoy the show.
Signed-off-by: Roy Huang
Signed-off-by: Bryan Wu
08 May, 2007
1 commit
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This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdfThe Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibcThis patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu
Signed-off-by: Mariusz Kozlowski
Signed-off-by: Aubrey Li
Signed-off-by: Jie Zhang
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds