07 Apr, 2013

2 commits

  • Add SPI driver for NVIDIA's Tegra114 SPI controller. This controller
    is different than the older SoCs SPI controller in internal design as
    well as register interface.

    This driver supports the:
    - non DMA based transfer for smaller transfer i.e. less than FIFO depth.
    - APB DMA based transfer for larger transfer i.e. more than FIFO depth.
    - Clock gating through runtime PM callbacks.
    - registration through DT only.

    Signed-off-by: Laxman Dewangan
    Reviewed-by: Stephen Warren
    Signed-off-by: Grant Likely

    Laxman Dewangan
     
  • This makes the spi-fsl-spi driver usable in CPU mode outside of an FSL_SOC and
    even an powerpc environment by moving CPM mode functionality to a separate file
    that is only compiled and linked in an FSL_SOC environment and adding some
    ifdefs to hide types and functions or provide alternatives.

    For devicetree probing a "clock-frequency" property is used for clock frequency
    instead of calls to FSL_SOC-specific functions.

    Acked-by: Anton Vorontsov
    Signed-off-by: Andreas Larsson
    Signed-off-by: Grant Likely

    Andreas Larsson
     

13 Mar, 2013

1 commit

  • The BCM2835 contains two forms of SPI master controller (one known
    simply as SPI0, and the other known as the "Universal SPI Master", in
    the auxilliary block) and one form of SPI slave controller. This patch
    adds support for the SPI0 controller.

    This driver is taken from Chris Boot's repository at
    git://github.com/bootc/linux.git rpi-linear
    as of commit 6de2905 "spi-bcm2708: fix printf with spurious %s".
    In the first SPI-related commit there, Chris wrote:

    Thanks to csoutreach / A Robinson for his driver which I used as an
    inspiration. You can find his version here:
    http://piface.openlx.org.uk/raspberry-pi-spi-kernel-driver-available-for

    Changes made during upstreaming:
    * Renamed bcm2708 to bcm2835 as per upstream naming for this SoC.
    * Removed support for brcm,realtime property.
    * Increased transfer timeout to 30 seconds.
    * Return IRQ_NONE from the IRQ handler if no interrupt was handled.
    * Disable TA (Transfer Active) and clear FIFOs on a transfer timeout.
    * Wrote device tree binding documentation.
    * Request unnamed clock rather than "sys_pclk"; the DT will provide the
    correct clock.
    * Assume that tfr->speed_hz and tfr->bits_per_word are always set in
    bcm2835_spi_start_transfer(), bcm2835_spi_transfer_one(), so no need
    to check spi->speed_hz or tft->bits_per_word.
    * Re-ordered probe() to remove the need for temporary variables.
    * Call clk_disable_unprepare() rather than just clk_unprepare() on probe()
    failure.
    * Don't use devm_request_irq(), to ensure that the IRQ doesn't fire after
    we've torn down the device, but not unhooked the IRQ.
    * Moved probe()'s call to clk_prepare_enable() so we can be sure the clock
    is enabled if the IRQ handler fires immediately.
    * Remove redundant checks from bcm2835_spi_check_transfer() and
    bcm2835_spi_setup().
    * Re-ordered IRQ handler to check for RXR before DONE. Added comments to
    ISR.
    * Removed empty prepare/unprepare implementations.
    * Removed use of devinit/devexit.
    * Added BCM2835_ prefix to defines.

    Signed-off-by: Chris Boot
    Signed-off-by: Stephen Warren
    Signed-off-by: Mark Brown

    Chris Boot
     

08 Feb, 2013

2 commits

  • To be able to use DMA with this driver on non-PXA platforms we implement
    support for the generic DMA engine API. This lets user to use different DMA
    engines with little or no modification to the driver.

    Request lines and channel numbers can be passed to the driver from the
    platform specific data.

    The DMA engine implementation will be selected by default even on PXA
    platform. User can select the legacy DMA API by enabling Kconfig option
    CONFIG_SPI_PXA2XX_PXADMA.

    Signed-off-by: Mika Westerberg
    Acked-by: Linus Walleij
    Tested-by: Lu Cao
    Signed-off-by: Mark Brown

    Mika Westerberg
     
  • The PXA SPI driver uses PXA platform specific private DMA implementation
    which does not work on non-PXA platforms. In order to use this driver on
    other platforms we break out the private DMA implementation into a separate
    file that gets compiled only when CONFIG_SPI_PXA2XX_PXADMA is set. The DMA
    functions are stubbed out if there is no DMA implementation selected (i.e
    we are building on non-PXA platform).

    While we are there we can kill the dummy DMA bits in pxa2xx_spi.h as they
    are not needed anymore for CE4100.

    Once this is done we can add the generic DMA engine support to the driver
    that allows usage of any DMA controller that implements DMA engine API.

    Signed-off-by: Mika Westerberg
    Acked-by: Linus Walleij
    Tested-by: Lu Cao
    Signed-off-by: Mark Brown

    Mika Westerberg
     

06 Dec, 2012

3 commits


14 Nov, 2012

1 commit


31 Oct, 2012

1 commit


09 Oct, 2012

1 commit

  • Pull MIPS update from Ralf Baechle:
    "This is the MIPS update for 3.7.

    A fair chunk of them are platform updates to the Cavium Octeon SOC
    (which involves machine generated header files of considerable size),
    Atheros ATH79xx, RMI aka Netlogic aka Broadcom XLP, Broadcom BCM63xx
    platforms.

    Support for the commercial MIPS simulator MIPSsim has been removed as
    MIPS Technologies is shifting away from this product and Qemu is
    offering various more powerful platforms. The generic MIPS code can
    now also probe for no-execute / write-only TLB features implemented
    without the full SmartMIPS extension as permitted by the latest MIPS
    processor architecture. Lots of small changes to generic code."

    * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (78 commits)
    MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLs
    MIPS: ath79: use correct fractional dividers for {CPU,DDR}_PLL on AR934x
    MIPS: BCM63XX: Properly handle mac address octet overflow
    MIPS: Kconfig: Avoid build errors by hiding USE_OF from the user.
    MIPS: Replace `-' in defconfig filename wth `_' for consistency.
    MIPS: Wire kcmp syscall.
    MIPS: MIPSsim: Remove the MIPSsim platform.
    MIPS: NOTIFY_RESUME is not needed in TIF masks
    MIPS: Merge the identical "return from syscall" per-ABI code
    MIPS: Unobfuscate _TIF..._MASK
    MIPS: Prevent hitting do_notify_resume() with !user_mode(regs).
    MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'.
    MIPS: Add base architecture support for RI and XI.
    MIPS: Optimise TLB handlers for MIPS32/64 R2 cores.
    MIPS: uasm: Add INS and EXT instructions.
    MIPS: Avoid pipeline stalls on some MIPS32R2 cores.
    MIPS: Make VPE count to be one-based.
    MIPS: Add new end of interrupt functionality for GIC.
    MIPS: Add EIC support for GIC.
    MIPS: Code clean-ups for the GIC.
    ...

    Linus Torvalds
     

01 Oct, 2012

1 commit

  • The current SPI driver has many issues. Examples are:

    * Segfaulting on most transfers due to expecting all transfers to have
    both RX and TX buffers.
    * Hanging on TX transfers since the whole driver flow is driven by RX
    DMA completion, but the HW is only told to enable RX for RX transfers.
    * Use of clk_disable_unprepare() from atomic context.
    * Once those and other minor issues are fixed, the driver still doesn't
    actually work.
    * The driver also implements a deprecated API to the SPI core.

    For this reason, simply remove the driver completely. This has two
    advantages:

    1) This will remove the last use of Tegra's , which will
    allow that file to be removed, which is required for single zImage
    work.

    2) The downstream driver is significaly different from the current
    code. I believe a patch to re-add the downstream driver (with
    appropriate cleanup) will be much simpler to review if it's a new
    file rather than randomly interspered with essentially unrelated
    existing code.

    Signed-off-by: Stephen Warren
    Signed-off-by: Mark Brown

    Stephen Warren
     

28 Sep, 2012

1 commit


23 Aug, 2012

2 commits


18 Aug, 2012

1 commit

  • This is slightly reworked version of the SPI driver.
    Support for DT has been added and it's been converted
    to queued API.

    Based on previous attempt by:
    Fabio Estevam

    Signed-off-by: Fabio Estevam
    Signed-off-by: Marek Vasut
    Acked-by: Chris Ball
    Acked-by: Shawn Guo
    Signed-off-by: Mark Brown

    Marek Vasut
     

31 Jul, 2012

1 commit

  • Pull MIPS updates from Ralf Baechle:
    "More hardware support across the field including a bunch of device
    drivers. The highlight however really are further steps towards
    device tree.

    This has been sitting in -next for ages. All MIPS _defconfigs have
    been tested to boot or where I don't have hardware available, to at
    least build fine."

    * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (77 commits)
    MIPS: Loongson 1B: Add defconfig
    MIPS: Loongson 1B: Add board support
    MIPS: Netlogic: early console fix
    MIPS: Netlogic: Fix indentation of smpboot.S
    MIPS: Netlogic: remove cpu_has_dc_aliases define for XLP
    MIPS: Netlogic: Remove unused pcibios_fixups
    MIPS: Netlogic: Add XLP SoC devices in FDT
    MIPS: Netlogic: Add IRQ mappings for more devices
    MIPS: Netlogic: USB support for XLP
    MIPS: Netlogic: XLP PCIe controller support.
    MIPS: Netlogic: Platform changes for XLR/XLS I2C
    MIPS: Netlogic: Platform NAND/NOR flash support
    MIPS: Netlogic: Platform changes for XLS USB
    MIPS: Netlogic: Remove NETLOGIC_ prefix
    MIPS: Netlogic: SMP wakeup code update
    MIPS: Netlogic: Update comments in smpboot.S
    MIPS: BCM63XX: Add 96328avng reference board
    MIPS: Expose PCIe drivers for MIPS
    MIPS: BCM63XX: Add PCIe Support for BCM6328
    MIPS: BCM63XX: Move the PCI initialization into its own function
    ...

    Linus Torvalds
     

23 Jul, 2012

1 commit

  • The external bus unit (EBU) found on the FALCON SoC has spi emulation that is
    designed for serial flash access. This driver has only been tested with m25p80
    type chips. The hardware has no support for other types of spi peripherals.

    Signed-off-by: Thomas Langer
    Signed-off-by: John Crispin
    Cc: spi-devel-general@lists.sourceforge.net
    Cc: linux-mips@linux-mips.org
    Acked-by: Grant Likely
    Patchwork: https://patchwork.linux-mips.org/patch/3844/
    Signed-off-by: Ralf Baechle

    Thomas Langer
     

20 Jul, 2012

1 commit


28 Apr, 2012

1 commit


10 Mar, 2012

3 commits


08 Mar, 2012

1 commit


05 Jul, 2011

1 commit


06 Jun, 2011

1 commit

  • Sort the SPI makefile and enforce the naming convention spi_*.c for
    spi drivers.

    This change also rolls the contents of atmel_spi.h into the .c file
    since there is only one user of that particular include file.

    v2: - Use 'spi-' prefix instead of 'spi_' to match what seems to be
    be the predominant pattern for subsystem prefixes.
    - Clean up filenames in Kconfig and header comment blocks

    Signed-off-by: Grant Likely
    Acked-by: Wolfram Sang
    Acked-by: Linus Walleij

    Grant Likely
     

27 May, 2011

1 commit

  • The Blackfin SPORT peripheral is a pretty flexible device. With enough
    coaching, we can make it generate SPI compatible waveforms. This is
    desirable as the SPORT can run at much higher clock frequencies than the
    dedicated on-chip SPI peripheral, and it can do full duplex DMA. It also
    opens up the possibility of multiple SPI buses in case someone wants to
    dedicate a whole bus to a specific part that does not play well with
    others.

    Signed-off-by: Cliff Cai
    Signed-off-by: Bryan Wu
    Signed-off-by: Michael Hennerich
    Signed-off-by: Mike Frysinger
    Signed-off-by: Grant Likely

    Cliff Cai
     

19 Mar, 2011

1 commit

  • * 'spi/next' of git://git.secretlab.ca/git/linux-2.6: (34 commits)
    spi/dw_spi: move dw_spi.h into drivers/spi
    spi/dw_spi: Fix missing header
    gpio/langwell: Clear edge bit before handling
    gpio/langwell: Simplify demux loop
    gpio/langwell: Convert irq name space
    gpio/langwell: Fix broken irq_eoi change.
    gpio; Make Intel chipset gpio drivers depend on x86
    gpio/cs5535-gpio: Fix section mismatch
    spi/rtc-{ds1390,ds3234,m41t94}: Use spi_get_drvdata() for SPI devices
    spi/davinci: Support DMA transfers larger than 65535 words
    spi/davinci: Use correct length parameter to dma_map_single calls
    gpio: Use __devexit at necessary places
    gpio: add MODULE_DEVICE_TABLE to pch_gpio and ml_ioh_gpio
    gpio/mcp23s08: support mcp23s17 variant
    of_mmc_spi: add card detect irq support
    spi/omap_mcspi: catch xfers of non-multiple SPI word size
    spi/omap_mcspi: Off-by-one error in finding the right divisor
    gpio/pca953x: Fix wrong pointer type
    spi/pl022: rid dangling labels
    spi: add support for SuperH SPI
    ...

    Linus Torvalds
     

15 Mar, 2011

1 commit


23 Feb, 2011

3 commits


19 Jan, 2011

1 commit

  • The Atheros AR71XX/AR724X/AR913X SoCs have a built-in SPI controller. This
    patch implements a driver for that.

    Signed-off-by: Gabor Juhos
    Cc: David Brownell
    Cc: spi-devel-general@lists.sourceforge.net
    Acked-by: Grant Likely
    Cc: linux-mips@linux-mips.org
    Cc: Imre Kaloz
    Cc: Luis R. Rodriguez
    Cc: Cliff Holden
    Cc: Kathy Giori
    Patchwork: https://patchwork.linux-mips.org/patch/1960/
    Signed-off-by: Ralf Baechle

    Gabor Juhos
     

29 Dec, 2010

1 commit

  • * 'spi' of git://git.linutronix.de/users/bigeasy/soda into spi/next
    spi/pxa2xx: register driver properly
    spi/pxa2xx: add support for shared IRQ handler
    spi/pxa2xx: Use define for SSSR_TFL_MASK instead of plain numbers
    arm/pxa2xx: reorgazine SSP and SPI header files
    spi/pxa2xx: Add CE4100 support
    spi/pxa2xx: Consider CE4100's FIFO depth
    spi/pxa2xx: Add chipselect support for Sodaville
    spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes.
    spi/pxa2xx: pass of_node to spi device and set a parent device

    Grant Likely
     

24 Dec, 2010

1 commit

  • dw_spi driver in upstream only supports PIO mode, and this patch
    will support it to cowork with the Designware dma controller used
    on Intel Moorestown platform, at the same time it provides a general
    framework to support dw_spi core to cowork with dma controllers on
    other platforms

    It has been tested with a Option GTM501L 3G modem and Infenion 60x60
    modem. To use DMA mode, DMA controller 2 of Moorestown has to be enabled

    Also change the dma interface suggested by Linus Walleij.

    Acked-by: Linus Walleij
    Signed-off-by: Feng Tang
    [Typo fix and renames to match intel_mid_dma renaming]
    Signed-off-by: Vinod Koul
    Signed-off-by: Alan Cox
    Signed-off-by: Grant Likely

    Feng Tang
     

01 Dec, 2010

1 commit

  • Sodaville's SPI controller is very much the same as in PXA25x. The
    difference:
    - The RX/TX FIFO is only 4 words deep instead of 16
    - No DMA support
    - The SPI controller offers a CS functionality

    Signed-off-by: Sebastian Andrzej Siewior
    Signed-off-by: Dirk Brandewie

    Sebastian Andrzej Siewior
     

10 Nov, 2010

2 commits


22 Oct, 2010

1 commit

  • v2 changes:
    from Thierry Reding:
    * add "select TEGRA_SYSTEM_DMA" to Kconfig
    from Grant Likely:
    * add oneline description to header
    * inline references to DRIVER_NAME
    * inline references to BUSY_TIMEOUT
    * open coded bytes_per_word()
    * spi_readl/writel -> spi_tegra_readl/writel
    * move transfer validation to spi_tegra_transfer
    * don't request_mem_region iomem as platform bus does that for us
    * __exit -> __devexit

    v3 changes:
    from Russell King:
    * put request_mem_region back int
    from Grant Likely:
    * remove #undef DEBUG
    * add SLINK_ to register bit defines
    * remove unused bytes_per_word
    * make spi_tegra_readl/writel static linine
    * various refactoring for clarity
    * mark err if BSY bit is not cleared after 1000 retries
    * move spinlock to protect setting of RDY bit
    * subsys_initcall -> module_init

    v3 changes:
    from Grant Likely:
    * update spi_tegra to use PTR_ERRless dma API

    v4 changes:
    from Grant Likely:
    * remove empty spi_tegra_cleanup fucntion
    * allow device ids of -1

    Signed-off-by: Erik Gilling
    Acked-by: Grant Likely
    Cc: Thierry Reding
    Cc: Russell King

    spi: tegra: cleanups from upstream review

    Change-Id: Icecf7e64efcb39de072a15234ba1faa4bad40d25
    Signed-off-by: Erik Gilling

    Erik Gilling
     

13 Oct, 2010

1 commit

  • Add eSPI controller support based on the library code spi_fsl_lib.c.

    The eSPI controller is newer controller 85xx/Pxxx devices supported.
    There're some differences comparing to the SPI controller:

    1. Has different register map and different bit definition
    So leave the code operated the register to the driver code, not
    the common code.

    2. Support 4 dedicated chip selects
    The software can't controll the chip selects directly, The SPCOM[CS]
    field is used to select which chip selects is used, and the
    SPCOM[TRANLEN] field is set to tell the controller how long the CS
    signal need to be asserted. So the driver doesn't need the chipselect
    related function when transfering data, just set corresponding register
    fields to controll the chipseclect.

    3. Different Transmit/Receive FIFO access register behavior
    For SPI controller, the Tx/Rx FIFO access register can hold only
    one character regardless of the character length, but for eSPI
    controller, the register can hold 4 or 2 characters according to
    the character lengths. Access the Tx/Rx FIFO access register of the
    eSPI controller will shift out/in 4/2 characters one time. For SPI
    subsystem, the command and data are put into different transfers, so
    we need to combine all the transfers to one transfer in order to pass
    the transfer to eSPI controller.

    4. The max transaction length limitation
    The max transaction length one time is limitted by the SPCOM[TRANSLEN]
    field which is 0xFFFF. When used mkfs.ext2 command to create ext2
    filesystem on the flash, the read length will exceed the max value of
    the SPCOM[TRANSLEN] field.

    Signed-off-by: Mingkai Hu
    Signed-off-by: Grant Likely

    Mingkai Hu