Commit 1784b157c89cd2b5e6a3840abfdab6ed51f31d86
Committed by
Russell King
1 parent
729303191e
Exists in
master
and in
4 other branches
ARM: 6832/1: mmci: support for ST-Ericsson db8500v2
ST-Ericsson modified ARM PrimeCell PL180 block has not got an updated corresponding amba-id, althought the IP block has changed in db8500v2. The change was done to the datactrl register. Using the overrided subversion ID, account for this. Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Showing 1 changed file with 23 additions and 2 deletions Side-by-side Diff
drivers/mmc/host/mmci.c
... | ... | @@ -51,6 +51,7 @@ |
51 | 51 | * is asserted (likewise for RX) |
52 | 52 | * @sdio: variant supports SDIO |
53 | 53 | * @st_clkdiv: true if using a ST-specific clock divider algorithm |
54 | + * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register | |
54 | 55 | */ |
55 | 56 | struct variant_data { |
56 | 57 | unsigned int clkreg; |
... | ... | @@ -60,6 +61,7 @@ |
60 | 61 | unsigned int fifohalfsize; |
61 | 62 | bool sdio; |
62 | 63 | bool st_clkdiv; |
64 | + bool blksz_datactrl16; | |
63 | 65 | }; |
64 | 66 | |
65 | 67 | static struct variant_data variant_arm = { |
... | ... | @@ -92,6 +94,17 @@ |
92 | 94 | .st_clkdiv = true, |
93 | 95 | }; |
94 | 96 | |
97 | +static struct variant_data variant_ux500v2 = { | |
98 | + .fifosize = 30 * 4, | |
99 | + .fifohalfsize = 8 * 4, | |
100 | + .clkreg = MCI_CLK_ENABLE, | |
101 | + .clkreg_enable = MCI_ST_UX500_HWFCEN, | |
102 | + .datalength_bits = 24, | |
103 | + .sdio = true, | |
104 | + .st_clkdiv = true, | |
105 | + .blksz_datactrl16 = true, | |
106 | +}; | |
107 | + | |
95 | 108 | /* |
96 | 109 | * This must be called with host->lock held |
97 | 110 | */ |
... | ... | @@ -465,7 +478,10 @@ |
465 | 478 | blksz_bits = ffs(data->blksz) - 1; |
466 | 479 | BUG_ON(1 << blksz_bits != data->blksz); |
467 | 480 | |
468 | - datactrl = MCI_DPSM_ENABLE | blksz_bits << 4; | |
481 | + if (variant->blksz_datactrl16) | |
482 | + datactrl = MCI_DPSM_ENABLE | (data->blksz << 16); | |
483 | + else | |
484 | + datactrl = MCI_DPSM_ENABLE | blksz_bits << 4; | |
469 | 485 | |
470 | 486 | if (data->flags & MMC_DATA_READ) |
471 | 487 | datactrl |= MCI_DPSM_DIRECTION; |
472 | 488 | |
... | ... | @@ -1311,8 +1327,13 @@ |
1311 | 1327 | }, |
1312 | 1328 | { |
1313 | 1329 | .id = 0x00480180, |
1314 | - .mask = 0x00ffffff, | |
1330 | + .mask = 0xf0ffffff, | |
1315 | 1331 | .data = &variant_ux500, |
1332 | + }, | |
1333 | + { | |
1334 | + .id = 0x10480180, | |
1335 | + .mask = 0xf0ffffff, | |
1336 | + .data = &variant_ux500v2, | |
1316 | 1337 | }, |
1317 | 1338 | { 0, 0 }, |
1318 | 1339 | }; |