Eric Lee / linux-smarc-t335x-v3.2

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Commit 28c006c1f09ea92d4f2585a087a188955ce3f64c

Authored by Linus Torvalds
2 parents cbe037b46f 7abe53155b

Merge master.kernel.org:/home/rmk/linux-2.6-arm 

* master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] Fix cosmetic typo in asm/irq.h
  [ARM] 3367/1: CLCD mode no longer supported on the RealView boards
  [ARM] 3366/1: Allow the 16bpp mode configuration in the CLCD control register

Showing 3 changed files Side-by-side Diff

arch/arm/mach-realview/core.c
Diff comments   View file @ 28c006c
... ... @@ -202,11 +202,6 @@
202 202 /*
203 203 * CLCD support.
204 204 */
205   -#define SYS_CLCD_MODE_MASK (3 << 0)
206   -#define SYS_CLCD_MODE_888 (0 << 0)
207   -#define SYS_CLCD_MODE_5551 (1 << 0)
208   -#define SYS_CLCD_MODE_565_RLSB (2 << 0)
209   -#define SYS_CLCD_MODE_565_BLSB (3 << 0)
210 205 #define SYS_CLCD_NLCDIOON (1 << 2)
211 206 #define SYS_CLCD_VDDPOSSWITCH (1 << 3)
212 207 #define SYS_CLCD_PWR3V5SWITCH (1 << 4)
213 208  
214 209  
... ... @@ -360,29 +355,10 @@
360 355 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
361 356 u32 val;
362 357  
363   - val = readl(sys_clcd);
364   - val &= ~SYS_CLCD_MODE_MASK;
365   -
366   - switch (fb->fb.var.green.length) {
367   - case 5:
368   - val |= SYS_CLCD_MODE_5551;
369   - break;
370   - case 6:
371   - val |= SYS_CLCD_MODE_565_RLSB;
372   - break;
373   - case 8:
374   - val |= SYS_CLCD_MODE_888;
375   - break;
376   - }
377   -
378 358 /*
379   - * Set the MUX
  359 + * Enable the PSUs
380 360 */
381   - writel(val, sys_clcd);
382   -
383   - /*
384   - * And now enable the PSUs
385   - */
  361 + val = readl(sys_clcd);
386 362 val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
387 363 writel(val, sys_clcd);
388 364 }
include/asm-arm/irq.h
Diff comments   View file @ 28c006c
... ... @@ -27,7 +27,7 @@
27 27  
28 28 /*
29 29 * These correspond with the SA_TRIGGER_* defines, and therefore the
30   - * IRQRESOURCE_IRQ_* defines.
  30 + * IORESOURCE_IRQ_* defines.
31 31 */
32 32 #define __IRQT_RISEDGE (1 << 0)
33 33 #define __IRQT_FALEDGE (1 << 1)
include/linux/amba/clcd.h
Diff comments   View file @ 28c006c
... ... @@ -54,6 +54,7 @@
54 54 #define CNTL_LCDBPP4 (2 << 1)
55 55 #define CNTL_LCDBPP8 (3 << 1)
56 56 #define CNTL_LCDBPP16 (4 << 1)
  57 +#define CNTL_LCDBPP16_565 (6 << 1)
57 58 #define CNTL_LCDBPP24 (5 << 1)
58 59 #define CNTL_LCDBW (1 << 4)
59 60 #define CNTL_LCDTFT (1 << 5)
... ... @@ -209,7 +210,16 @@
209 210 val |= CNTL_LCDBPP8;
210 211 break;
211 212 case 16:
212   - val |= CNTL_LCDBPP16;
  213 + /*
  214 + * PL110 cannot choose between 5551 and 565 modes in
  215 + * its control register
  216 + */
  217 + if ((fb->dev->periphid & 0x000fffff) == 0x00041110)
  218 + val |= CNTL_LCDBPP16;
  219 + else if (fb->fb.var.green.length == 5)
  220 + val |= CNTL_LCDBPP16;
  221 + else
  222 + val |= CNTL_LCDBPP16_565;
213 223 break;
214 224 case 32:
215 225 val |= CNTL_LCDBPP24;