Eric Lee / linux-smarc-t335x-v3.2

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Commit 2f2984eb4afb2a4298e3186cb49cc7e88dd6d929

Authored by Zachary Amsden
Committed by Linus Torvalds
1 parent 4d37e7e3fd
Exists in master and in 4 other branches v3.2_AM335xPSP_04.06.00.11, v3.2_NEWT335xPSP_04.06.00.11, v3.2_SBC_SMARTMEN, v3.2_SMARCT335xPSP_04.06.00.11

[PATCH] i386: generate better code around descriptor update and access functions 

GCC can generate better code around descriptor update and access functions
when there is not an explicit "eax" register constraint.

Testing: You won't boot if this is messed up, since the TSS descriptor will be
corrupted.  Verified the assembler and booted.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

Showing 1 changed file with 8 additions and 8 deletions Side-by-side Diff

include/asm-i386/desc.h
Diff comments   View file @ 2f2984e
... ... @@ -27,8 +27,8 @@
27 27  
28 28 extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS];
29 29  
30   -#define load_TR_desc() __asm__ __volatile__("ltr %%ax"::"a" (GDT_ENTRY_TSS*8))
31   -#define load_LDT_desc() __asm__ __volatile__("lldt %%ax"::"a" (GDT_ENTRY_LDT*8))
  30 +#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
  31 +#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
32 32  
33 33 #define load_gdt(dtr) __asm__ __volatile("lgdt %0"::"m" (*dtr))
34 34 #define load_idt(dtr) __asm__ __volatile("lidt %0"::"m" (*dtr))
35 35  
... ... @@ -49,14 +49,14 @@
49 49  
50 50 #define _set_tssldt_desc(n,addr,limit,type) \
51 51 __asm__ __volatile__ ("movw %w3,0(%2)\n\t" \
52   - "movw %%ax,2(%2)\n\t" \
53   - "rorl $16,%%eax\n\t" \
54   - "movb %%al,4(%2)\n\t" \
  52 + "movw %w1,2(%2)\n\t" \
  53 + "rorl $16,%1\n\t" \
  54 + "movb %b1,4(%2)\n\t" \
55 55 "movb %4,5(%2)\n\t" \
56 56 "movb $0,6(%2)\n\t" \
57   - "movb %%ah,7(%2)\n\t" \
58   - "rorl $16,%%eax" \
59   - : "=m"(*(n)) : "a" (addr), "r"(n), "ir"(limit), "i"(type))
  57 + "movb %h1,7(%2)\n\t" \
  58 + "rorl $16,%1" \
  59 + : "=m"(*(n)) : "q" (addr), "r"(n), "ir"(limit), "i"(type))
60 60  
61 61 static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr)
62 62 {