Eric Lee / linux-smarc-t335x-v3.2

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Commit 316b4d644caceb2cf7432d8a27e45b88f57ef2a0

Authored by Jean Delvare
Committed by Linus Torvalds
1 parent fc2d10ddfc
Exists in master and in 4 other branches v3.2_AM335xPSP_04.06.00.11, v3.2_NEWT335xPSP_04.06.00.11, v3.2_SBC_SMARTMEN, v3.2_SMARCT335xPSP_04.06.00.11

matroxfb: get rid of unneeded macros WPMINFO and friends 

With multihead support always enabled, these macros are no longer needed
and make the code harder to read.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Acked-by: Petr Vandrovec <vandrove@vc.cvut.cz>
Cc: Krzysztof Helt <krzysztof.h1@poczta.fm>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Showing 15 changed files with 580 additions and 444 deletions Side-by-side Diff

drivers/video/matrox/g450_pll.c
Diff comments   View file @ 316b4d6
... ... @@ -25,7 +25,9 @@
25 25 return (p & 0x40) ? fin : fin << ((p & 3) + 1);
26 26 }
27 27  
28   -static unsigned int g450_mnp2vco(CPMINFO unsigned int mnp) {
  28 +static unsigned int g450_mnp2vco(const struct matrox_fb_info *minfo,
  29 + unsigned int mnp)
  30 +{
29 31 unsigned int m, n;
30 32  
31 33 m = ((mnp >> 16) & 0x0FF) + 1;
... ... @@ -33,8 +35,9 @@
33 35 return (minfo->features.pll.ref_freq * n + (m >> 1)) / m;
34 36 }
35 37  
36   -unsigned int g450_mnp2f(CPMINFO unsigned int mnp) {
37   - return g450_vco2f(mnp, g450_mnp2vco(PMINFO mnp));
  38 +unsigned int g450_mnp2f(const struct matrox_fb_info *minfo, unsigned int mnp)
  39 +{
  40 + return g450_vco2f(mnp, g450_mnp2vco(minfo, mnp));
38 41 }
39 42  
40 43 static inline unsigned int pll_freq_delta(unsigned int f1, unsigned int f2) {
... ... @@ -49,7 +52,10 @@
49 52 #define NO_MORE_MNP 0x01FFFFFF
50 53 #define G450_MNP_FREQBITS (0xFFFFFF43) /* do not mask high byte so we'll catch NO_MORE_MNP */
51 54  
52   -static unsigned int g450_nextpll(CPMINFO const struct matrox_pll_limits* pi, unsigned int* fvco, unsigned int mnp) {
  55 +static unsigned int g450_nextpll(const struct matrox_fb_info *minfo,
  56 + const struct matrox_pll_limits *pi,
  57 + unsigned int *fvco, unsigned int mnp)
  58 +{
53 59 unsigned int m, n, p;
54 60 unsigned int tvco = *fvco;
55 61  
... ... @@ -95,7 +101,10 @@
95 101 return (m << 16) | (n << 8) | p;
96 102 }
97 103  
98   -static unsigned int g450_firstpll(CPMINFO const struct matrox_pll_limits* pi, unsigned int* vco, unsigned int fout) {
  104 +static unsigned int g450_firstpll(const struct matrox_fb_info *minfo,
  105 + const struct matrox_pll_limits *pi,
  106 + unsigned int *vco, unsigned int fout)
  107 +{
99 108 unsigned int p;
100 109 unsigned int vcomax;
101 110  
102 111  
103 112  
104 113  
105 114  
106 115  
107 116  
108 117  
109 118  
110 119  
111 120  
112 121  
113 122  
114 123  
115 124  
116 125  
... ... @@ -121,88 +130,94 @@
121 130 }
122 131 *vco = tvco;
123 132 }
124   - return g450_nextpll(PMINFO pi, vco, 0xFF0000 | p);
  133 + return g450_nextpll(minfo, pi, vco, 0xFF0000 | p);
125 134 }
126 135  
127   -static inline unsigned int g450_setpll(CPMINFO unsigned int mnp, unsigned int pll) {
  136 +static inline unsigned int g450_setpll(const struct matrox_fb_info *minfo,
  137 + unsigned int mnp, unsigned int pll)
  138 +{
128 139 switch (pll) {
129 140 case M_PIXEL_PLL_A:
130   - matroxfb_DAC_out(PMINFO M1064_XPIXPLLAM, mnp >> 16);
131   - matroxfb_DAC_out(PMINFO M1064_XPIXPLLAN, mnp >> 8);
132   - matroxfb_DAC_out(PMINFO M1064_XPIXPLLAP, mnp);
  141 + matroxfb_DAC_out(minfo, M1064_XPIXPLLAM, mnp >> 16);
  142 + matroxfb_DAC_out(minfo, M1064_XPIXPLLAN, mnp >> 8);
  143 + matroxfb_DAC_out(minfo, M1064_XPIXPLLAP, mnp);
133 144 return M1064_XPIXPLLSTAT;
134 145  
135 146 case M_PIXEL_PLL_B:
136   - matroxfb_DAC_out(PMINFO M1064_XPIXPLLBM, mnp >> 16);
137   - matroxfb_DAC_out(PMINFO M1064_XPIXPLLBN, mnp >> 8);
138   - matroxfb_DAC_out(PMINFO M1064_XPIXPLLBP, mnp);
  147 + matroxfb_DAC_out(minfo, M1064_XPIXPLLBM, mnp >> 16);
  148 + matroxfb_DAC_out(minfo, M1064_XPIXPLLBN, mnp >> 8);
  149 + matroxfb_DAC_out(minfo, M1064_XPIXPLLBP, mnp);
139 150 return M1064_XPIXPLLSTAT;
140 151  
141 152 case M_PIXEL_PLL_C:
142   - matroxfb_DAC_out(PMINFO M1064_XPIXPLLCM, mnp >> 16);
143   - matroxfb_DAC_out(PMINFO M1064_XPIXPLLCN, mnp >> 8);
144   - matroxfb_DAC_out(PMINFO M1064_XPIXPLLCP, mnp);
  153 + matroxfb_DAC_out(minfo, M1064_XPIXPLLCM, mnp >> 16);
  154 + matroxfb_DAC_out(minfo, M1064_XPIXPLLCN, mnp >> 8);
  155 + matroxfb_DAC_out(minfo, M1064_XPIXPLLCP, mnp);
145 156 return M1064_XPIXPLLSTAT;
146 157  
147 158 case M_SYSTEM_PLL:
148   - matroxfb_DAC_out(PMINFO DAC1064_XSYSPLLM, mnp >> 16);
149   - matroxfb_DAC_out(PMINFO DAC1064_XSYSPLLN, mnp >> 8);
150   - matroxfb_DAC_out(PMINFO DAC1064_XSYSPLLP, mnp);
  159 + matroxfb_DAC_out(minfo, DAC1064_XSYSPLLM, mnp >> 16);
  160 + matroxfb_DAC_out(minfo, DAC1064_XSYSPLLN, mnp >> 8);
  161 + matroxfb_DAC_out(minfo, DAC1064_XSYSPLLP, mnp);
151 162 return DAC1064_XSYSPLLSTAT;
152 163  
153 164 case M_VIDEO_PLL:
154   - matroxfb_DAC_out(PMINFO M1064_XVIDPLLM, mnp >> 16);
155   - matroxfb_DAC_out(PMINFO M1064_XVIDPLLN, mnp >> 8);
156   - matroxfb_DAC_out(PMINFO M1064_XVIDPLLP, mnp);
  165 + matroxfb_DAC_out(minfo, M1064_XVIDPLLM, mnp >> 16);
  166 + matroxfb_DAC_out(minfo, M1064_XVIDPLLN, mnp >> 8);
  167 + matroxfb_DAC_out(minfo, M1064_XVIDPLLP, mnp);
157 168 return M1064_XVIDPLLSTAT;
158 169 }
159 170 return 0;
160 171 }
161 172  
162   -static inline unsigned int g450_cmppll(CPMINFO unsigned int mnp, unsigned int pll) {
  173 +static inline unsigned int g450_cmppll(const struct matrox_fb_info *minfo,
  174 + unsigned int mnp, unsigned int pll)
  175 +{
163 176 unsigned char m = mnp >> 16;
164 177 unsigned char n = mnp >> 8;
165 178 unsigned char p = mnp;
166 179  
167 180 switch (pll) {
168 181 case M_PIXEL_PLL_A:
169   - return (matroxfb_DAC_in(PMINFO M1064_XPIXPLLAM) != m ||
170   - matroxfb_DAC_in(PMINFO M1064_XPIXPLLAN) != n ||
171   - matroxfb_DAC_in(PMINFO M1064_XPIXPLLAP) != p);
  182 + return (matroxfb_DAC_in(minfo, M1064_XPIXPLLAM) != m ||
  183 + matroxfb_DAC_in(minfo, M1064_XPIXPLLAN) != n ||
  184 + matroxfb_DAC_in(minfo, M1064_XPIXPLLAP) != p);
172 185  
173 186 case M_PIXEL_PLL_B:
174   - return (matroxfb_DAC_in(PMINFO M1064_XPIXPLLBM) != m ||
175   - matroxfb_DAC_in(PMINFO M1064_XPIXPLLBN) != n ||
176   - matroxfb_DAC_in(PMINFO M1064_XPIXPLLBP) != p);
  187 + return (matroxfb_DAC_in(minfo, M1064_XPIXPLLBM) != m ||
  188 + matroxfb_DAC_in(minfo, M1064_XPIXPLLBN) != n ||
  189 + matroxfb_DAC_in(minfo, M1064_XPIXPLLBP) != p);
177 190  
178 191 case M_PIXEL_PLL_C:
179   - return (matroxfb_DAC_in(PMINFO M1064_XPIXPLLCM) != m ||
180   - matroxfb_DAC_in(PMINFO M1064_XPIXPLLCN) != n ||
181   - matroxfb_DAC_in(PMINFO M1064_XPIXPLLCP) != p);
  192 + return (matroxfb_DAC_in(minfo, M1064_XPIXPLLCM) != m ||
  193 + matroxfb_DAC_in(minfo, M1064_XPIXPLLCN) != n ||
  194 + matroxfb_DAC_in(minfo, M1064_XPIXPLLCP) != p);
182 195  
183 196 case M_SYSTEM_PLL:
184   - return (matroxfb_DAC_in(PMINFO DAC1064_XSYSPLLM) != m ||
185   - matroxfb_DAC_in(PMINFO DAC1064_XSYSPLLN) != n ||
186   - matroxfb_DAC_in(PMINFO DAC1064_XSYSPLLP) != p);
  197 + return (matroxfb_DAC_in(minfo, DAC1064_XSYSPLLM) != m ||
  198 + matroxfb_DAC_in(minfo, DAC1064_XSYSPLLN) != n ||
  199 + matroxfb_DAC_in(minfo, DAC1064_XSYSPLLP) != p);
187 200  
188 201 case M_VIDEO_PLL:
189   - return (matroxfb_DAC_in(PMINFO M1064_XVIDPLLM) != m ||
190   - matroxfb_DAC_in(PMINFO M1064_XVIDPLLN) != n ||
191   - matroxfb_DAC_in(PMINFO M1064_XVIDPLLP) != p);
  202 + return (matroxfb_DAC_in(minfo, M1064_XVIDPLLM) != m ||
  203 + matroxfb_DAC_in(minfo, M1064_XVIDPLLN) != n ||
  204 + matroxfb_DAC_in(minfo, M1064_XVIDPLLP) != p);
192 205 }
193 206 return 1;
194 207 }
195 208  
196   -static inline int g450_isplllocked(CPMINFO unsigned int regidx) {
  209 +static inline int g450_isplllocked(const struct matrox_fb_info *minfo,
  210 + unsigned int regidx)
  211 +{
197 212 unsigned int j;
198 213  
199 214 for (j = 0; j < 1000; j++) {
200   - if (matroxfb_DAC_in(PMINFO regidx) & 0x40) {
  215 + if (matroxfb_DAC_in(minfo, regidx) & 0x40) {
201 216 unsigned int r = 0;
202 217 int i;
203 218  
204 219 for (i = 0; i < 100; i++) {
205   - r += matroxfb_DAC_in(PMINFO regidx) & 0x40;
  220 + r += matroxfb_DAC_in(minfo, regidx) & 0x40;
206 221 }
207 222 return r >= (90 * 0x40);
208 223 }
... ... @@ -211,8 +226,10 @@
211 226 return 0;
212 227 }
213 228  
214   -static int g450_testpll(CPMINFO unsigned int mnp, unsigned int pll) {
215   - return g450_isplllocked(PMINFO g450_setpll(PMINFO mnp, pll));
  229 +static int g450_testpll(const struct matrox_fb_info *minfo, unsigned int mnp,
  230 + unsigned int pll)
  231 +{
  232 + return g450_isplllocked(minfo, g450_setpll(minfo, mnp, pll));
216 233 }
217 234  
218 235 static void updatehwstate_clk(struct matrox_hw_state* hw, unsigned int mnp, unsigned int pll) {
219 236  
... ... @@ -225,13 +242,19 @@
225 242 }
226 243 }
227 244  
228   -void matroxfb_g450_setpll_cond(WPMINFO unsigned int mnp, unsigned int pll) {
229   - if (g450_cmppll(PMINFO mnp, pll)) {
230   - g450_setpll(PMINFO mnp, pll);
  245 +void matroxfb_g450_setpll_cond(struct matrox_fb_info *minfo, unsigned int mnp,
  246 + unsigned int pll)
  247 +{
  248 + if (g450_cmppll(minfo, mnp, pll)) {
  249 + g450_setpll(minfo, mnp, pll);
231 250 }
232 251 }
233 252  
234   -static inline unsigned int g450_findworkingpll(WPMINFO unsigned int pll, unsigned int* mnparray, unsigned int mnpcount) {
  253 +static inline unsigned int g450_findworkingpll(struct matrox_fb_info *minfo,
  254 + unsigned int pll,
  255 + unsigned int *mnparray,
  256 + unsigned int mnpcount)
  257 +{
235 258 unsigned int found = 0;
236 259 unsigned int idx;
237 260 unsigned int mnpfound = mnparray[0];
238 261  
239 262  
... ... @@ -255,22 +278,22 @@
255 278 while (sptr >= sarray) {
256 279 unsigned int mnp = *sptr--;
257 280  
258   - if (g450_testpll(PMINFO mnp - 0x0300, pll) &&
259   - g450_testpll(PMINFO mnp + 0x0300, pll) &&
260   - g450_testpll(PMINFO mnp - 0x0200, pll) &&
261   - g450_testpll(PMINFO mnp + 0x0200, pll) &&
262   - g450_testpll(PMINFO mnp - 0x0100, pll) &&
263   - g450_testpll(PMINFO mnp + 0x0100, pll)) {
264   - if (g450_testpll(PMINFO mnp, pll)) {
  281 + if (g450_testpll(minfo, mnp - 0x0300, pll) &&
  282 + g450_testpll(minfo, mnp + 0x0300, pll) &&
  283 + g450_testpll(minfo, mnp - 0x0200, pll) &&
  284 + g450_testpll(minfo, mnp + 0x0200, pll) &&
  285 + g450_testpll(minfo, mnp - 0x0100, pll) &&
  286 + g450_testpll(minfo, mnp + 0x0100, pll)) {
  287 + if (g450_testpll(minfo, mnp, pll)) {
265 288 return mnp;
266 289 }
267   - } else if (!found && g450_testpll(PMINFO mnp, pll)) {
  290 + } else if (!found && g450_testpll(minfo, mnp, pll)) {
268 291 mnpfound = mnp;
269 292 found = 1;
270 293 }
271 294 }
272 295 }
273   - g450_setpll(PMINFO mnpfound, pll);
  296 + g450_setpll(minfo, mnpfound, pll);
274 297 return mnpfound;
275 298 }
276 299  
... ... @@ -283,7 +306,9 @@
283 306 ci->data[0].mnp_value = mnp_value;
284 307 }
285 308  
286   -static int g450_checkcache(WPMINFO struct matrox_pll_cache* ci, unsigned int mnp_key) {
  309 +static int g450_checkcache(struct matrox_fb_info *minfo,
  310 + struct matrox_pll_cache *ci, unsigned int mnp_key)
  311 +{
287 312 unsigned int i;
288 313  
289 314 mnp_key &= G450_MNP_FREQBITS;
... ... @@ -303,8 +328,10 @@
303 328 return NO_MORE_MNP;
304 329 }
305 330  
306   -static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll,
307   - unsigned int* mnparray, unsigned int* deltaarray) {
  331 +static int __g450_setclk(struct matrox_fb_info *minfo, unsigned int fout,
  332 + unsigned int pll, unsigned int *mnparray,
  333 + unsigned int *deltaarray)
  334 +{
308 335 unsigned int mnpcount;
309 336 unsigned int pixel_vco;
310 337 const struct matrox_pll_limits* pi;
311 338  
312 339  
... ... @@ -321,16 +348,16 @@
321 348  
322 349 matroxfb_DAC_lock_irqsave(flags);
323 350  
324   - xpwrctrl = matroxfb_DAC_in(PMINFO M1064_XPWRCTRL);
325   - matroxfb_DAC_out(PMINFO M1064_XPWRCTRL, xpwrctrl & ~M1064_XPWRCTRL_PANELPDN);
  351 + xpwrctrl = matroxfb_DAC_in(minfo, M1064_XPWRCTRL);
  352 + matroxfb_DAC_out(minfo, M1064_XPWRCTRL, xpwrctrl & ~M1064_XPWRCTRL_PANELPDN);
326 353 mga_outb(M_SEQ_INDEX, M_SEQ1);
327 354 mga_outb(M_SEQ_DATA, mga_inb(M_SEQ_DATA) | M_SEQ1_SCROFF);
328   - tmp = matroxfb_DAC_in(PMINFO M1064_XPIXCLKCTRL);
  355 + tmp = matroxfb_DAC_in(minfo, M1064_XPIXCLKCTRL);
329 356 tmp |= M1064_XPIXCLKCTRL_DIS;
330 357 if (!(tmp & M1064_XPIXCLKCTRL_PLL_UP)) {
331 358 tmp |= M1064_XPIXCLKCTRL_PLL_UP;
332 359 }
333   - matroxfb_DAC_out(PMINFO M1064_XPIXCLKCTRL, tmp);
  360 + matroxfb_DAC_out(minfo, M1064_XPIXCLKCTRL, tmp);
334 361 /* DVI PLL preferred for frequencies up to
335 362 panel link max, standard PLL otherwise */
336 363 if (fout >= minfo->max_pixel_clock_panellink)
... ... @@ -341,8 +368,8 @@
341 368 M1064_XDVICLKCTRL_C1DVICLKEN |
342 369 M1064_XDVICLKCTRL_DVILOOPCTL |
343 370 M1064_XDVICLKCTRL_P1LOOPBWDTCTL;
344   - matroxfb_DAC_out(PMINFO M1064_XDVICLKCTRL,tmp);
345   - matroxfb_DAC_out(PMINFO M1064_XPWRCTRL,
  371 + matroxfb_DAC_out(minfo, M1064_XDVICLKCTRL, tmp);
  372 + matroxfb_DAC_out(minfo, M1064_XPWRCTRL,
346 373 xpwrctrl);
347 374  
348 375 matroxfb_DAC_unlock_irqrestore(flags);
349 376  
350 377  
... ... @@ -385,14 +412,14 @@
385 412 unsigned long flags;
386 413  
387 414 matroxfb_DAC_lock_irqsave(flags);
388   - tmp = matroxfb_DAC_in(PMINFO M1064_XPWRCTRL);
  415 + tmp = matroxfb_DAC_in(minfo, M1064_XPWRCTRL);
389 416 if (!(tmp & 2)) {
390   - matroxfb_DAC_out(PMINFO M1064_XPWRCTRL, tmp | 2);
  417 + matroxfb_DAC_out(minfo, M1064_XPWRCTRL, tmp | 2);
391 418 }
392 419  
393   - mnp = matroxfb_DAC_in(PMINFO M1064_XPIXPLLCM) << 16;
394   - mnp |= matroxfb_DAC_in(PMINFO M1064_XPIXPLLCN) << 8;
395   - pixel_vco = g450_mnp2vco(PMINFO mnp);
  420 + mnp = matroxfb_DAC_in(minfo, M1064_XPIXPLLCM) << 16;
  421 + mnp |= matroxfb_DAC_in(minfo, M1064_XPIXPLLCN) << 8;
  422 + pixel_vco = g450_mnp2vco(minfo, mnp);
396 423 matroxfb_DAC_unlock_irqrestore(flags);
397 424 }
398 425 pi = &minfo->limits.video;
399 426  
... ... @@ -407,12 +434,12 @@
407 434 unsigned int mnp;
408 435 unsigned int xvco;
409 436  
410   - for(mnp = g450_firstpll(PMINFO pi, &xvco, fout); mnp != NO_MORE_MNP; mnp = g450_nextpll(PMINFO pi, &xvco, mnp)) {
  437 + for (mnp = g450_firstpll(minfo, pi, &xvco, fout); mnp != NO_MORE_MNP; mnp = g450_nextpll(minfo, pi, &xvco, mnp)) {
411 438 unsigned int idx;
412 439 unsigned int vco;
413 440 unsigned int delta;
414 441  
415   - vco = g450_mnp2vco(PMINFO mnp);
  442 + vco = g450_mnp2vco(minfo, mnp);
416 443 #if 0
417 444 if (pll == M_VIDEO_PLL) {
418 445 unsigned int big, small;
... ... @@ -444,7 +471,7 @@
444 471 * (freqs near VCOmin aren't as stable)
445 472 */
446 473 if (delta == deltaarray[idx-1]
447   - && vco != g450_mnp2vco(PMINFO mnparray[idx-1])
  474 + && vco != g450_mnp2vco(minfo, mnparray[idx-1])
448 475 && vco < (pi->vcomin * 17 / 16)) {
449 476 break;
450 477 }
451 478  
452 479  
... ... @@ -468,11 +495,11 @@
468 495 unsigned int mnp;
469 496  
470 497 matroxfb_DAC_lock_irqsave(flags);
471   - mnp = g450_checkcache(PMINFO ci, mnparray[0]);
  498 + mnp = g450_checkcache(minfo, ci, mnparray[0]);
472 499 if (mnp != NO_MORE_MNP) {
473   - matroxfb_g450_setpll_cond(PMINFO mnp, pll);
  500 + matroxfb_g450_setpll_cond(minfo, mnp, pll);
474 501 } else {
475   - mnp = g450_findworkingpll(PMINFO pll, mnparray, mnpcount);
  502 + mnp = g450_findworkingpll(minfo, pll, mnparray, mnpcount);
476 503 g450_addcache(ci, mnparray[0], mnp);
477 504 }
478 505 updatehwstate_clk(&minfo->hw, mnp, pll);
479 506  
... ... @@ -485,14 +512,16 @@
485 512 * Currently there is 5(p) * 10(m) = 50 possible values. */
486 513 #define MNP_TABLE_SIZE 64
487 514  
488   -int matroxfb_g450_setclk(WPMINFO unsigned int fout, unsigned int pll) {
  515 +int matroxfb_g450_setclk(struct matrox_fb_info *minfo, unsigned int fout,
  516 + unsigned int pll)
  517 +{
489 518 unsigned int* arr;
490 519  
491 520 arr = kmalloc(sizeof(*arr) * MNP_TABLE_SIZE * 2, GFP_KERNEL);
492 521 if (arr) {
493 522 int r;
494 523  
495   - r = __g450_setclk(PMINFO fout, pll, arr, arr + MNP_TABLE_SIZE);
  524 + r = __g450_setclk(minfo, fout, pll, arr, arr + MNP_TABLE_SIZE);
496 525 kfree(arr);
497 526 return r;
498 527 }
drivers/video/matrox/g450_pll.h
Diff comments   View file @ 316b4d6
... ... @@ -3,9 +3,11 @@
3 3  
4 4 #include "matroxfb_base.h"
5 5  
6   -int matroxfb_g450_setclk(WPMINFO unsigned int fout, unsigned int pll);
7   -unsigned int g450_mnp2f(CPMINFO unsigned int mnp);
8   -void matroxfb_g450_setpll_cond(WPMINFO unsigned int mnp, unsigned int pll);
  6 +int matroxfb_g450_setclk(struct matrox_fb_info *minfo, unsigned int fout,
  7 + unsigned int pll);
  8 +unsigned int g450_mnp2f(const struct matrox_fb_info *minfo, unsigned int mnp);
  9 +void matroxfb_g450_setpll_cond(struct matrox_fb_info *minfo, unsigned int mnp,
  10 + unsigned int pll);
9 11  
10 12 #endif /* __G450_PLL_H__ */
drivers/video/matrox/i2c-matroxfb.c
Diff comments   View file @ 316b4d6
... ... @@ -41,7 +41,7 @@
41 41 int v;
42 42  
43 43 matroxfb_DAC_lock_irqsave(flags);
44   - v = matroxfb_DAC_in(PMINFO DAC_XGENIODATA);
  44 + v = matroxfb_DAC_in(minfo, DAC_XGENIODATA);
45 45 matroxfb_DAC_unlock_irqrestore(flags);
46 46 return v;
47 47 }
48 48  
... ... @@ -51,10 +51,10 @@
51 51 int v;
52 52  
53 53 matroxfb_DAC_lock_irqsave(flags);
54   - v = (matroxfb_DAC_in(PMINFO DAC_XGENIOCTRL) & mask) | val;
55   - matroxfb_DAC_out(PMINFO DAC_XGENIOCTRL, v);
  54 + v = (matroxfb_DAC_in(minfo, DAC_XGENIOCTRL) & mask) | val;
  55 + matroxfb_DAC_out(minfo, DAC_XGENIOCTRL, v);
56 56 /* We must reset GENIODATA very often... XFree plays with this register */
57   - matroxfb_DAC_out(PMINFO DAC_XGENIODATA, 0x00);
  57 + matroxfb_DAC_out(minfo, DAC_XGENIODATA, 0x00);
58 58 matroxfb_DAC_unlock_irqrestore(flags);
59 59 }
60 60  
... ... @@ -149,8 +149,8 @@
149 149 return NULL;
150 150  
151 151 matroxfb_DAC_lock_irqsave(flags);
152   - matroxfb_DAC_out(PMINFO DAC_XGENIODATA, 0xFF);
153   - matroxfb_DAC_out(PMINFO DAC_XGENIOCTRL, 0x00);
  152 + matroxfb_DAC_out(minfo, DAC_XGENIODATA, 0xFF);
  153 + matroxfb_DAC_out(minfo, DAC_XGENIOCTRL, 0x00);
154 154 matroxfb_DAC_unlock_irqrestore(flags);
155 155  
156 156 switch (minfo->chip) {
drivers/video/matrox/matroxfb_DAC1064.c
Diff comments   View file @ 316b4d6
... ... @@ -33,7 +33,11 @@
33 33 #define DAC1064_OPT_MDIV2 0x00
34 34 #define DAC1064_OPT_RESERVED 0x10
35 35  
36   -static void DAC1064_calcclock(CPMINFO unsigned int freq, unsigned int fmax, unsigned int* in, unsigned int* feed, unsigned int* post) {
  36 +static void DAC1064_calcclock(const struct matrox_fb_info *minfo,
  37 + unsigned int freq, unsigned int fmax,
  38 + unsigned int *in, unsigned int *feed,
  39 + unsigned int *post)
  40 +{
37 41 unsigned int fvco;
38 42 unsigned int p;
39 43  
... ... @@ -41,7 +45,7 @@
41 45  
42 46 /* only for devices older than G450 */
43 47  
44   - fvco = PLL_calcclock(PMINFO freq, fmax, in, feed, &p);
  48 + fvco = PLL_calcclock(minfo, freq, fmax, in, feed, &p);
45 49  
46 50 p = (1 << p) - 1;
47 51 if (fvco <= 100000)
48 52  
49 53  
... ... @@ -80,18 +84,21 @@
80 84 0x00,
81 85 0x00, 0x00, 0xFF, 0xFF};
82 86  
83   -static void DAC1064_setpclk(WPMINFO unsigned long fout) {
  87 +static void DAC1064_setpclk(struct matrox_fb_info *minfo, unsigned long fout)
  88 +{
84 89 unsigned int m, n, p;
85 90  
86 91 DBG(__func__)
87 92  
88   - DAC1064_calcclock(PMINFO fout, minfo->max_pixel_clock, &m, &n, &p);
  93 + DAC1064_calcclock(minfo, fout, minfo->max_pixel_clock, &m, &n, &p);
89 94 minfo->hw.DACclk[0] = m;
90 95 minfo->hw.DACclk[1] = n;
91 96 minfo->hw.DACclk[2] = p;
92 97 }
93 98  
94   -static void DAC1064_setmclk(WPMINFO int oscinfo, unsigned long fmem) {
  99 +static void DAC1064_setmclk(struct matrox_fb_info *minfo, int oscinfo,
  100 + unsigned long fmem)
  101 +{
95 102 u_int32_t mx;
96 103 struct matrox_hw_state *hw = &minfo->hw;
97 104  
... ... @@ -99,9 +106,9 @@
99 106  
100 107 if (minfo->devflags.noinit) {
101 108 /* read MCLK and give up... */
102   - hw->DACclk[3] = inDAC1064(PMINFO DAC1064_XSYSPLLM);
103   - hw->DACclk[4] = inDAC1064(PMINFO DAC1064_XSYSPLLN);
104   - hw->DACclk[5] = inDAC1064(PMINFO DAC1064_XSYSPLLP);
  109 + hw->DACclk[3] = inDAC1064(minfo, DAC1064_XSYSPLLM);
  110 + hw->DACclk[4] = inDAC1064(minfo, DAC1064_XSYSPLLN);
  111 + hw->DACclk[5] = inDAC1064(minfo, DAC1064_XSYSPLLP);
105 112 return;
106 113 }
107 114 mx = hw->MXoptionReg | 0x00000004;
108 115  
... ... @@ -131,12 +138,12 @@
131 138 perfect... */
132 139 /* (bit 2 of PCI_OPTION_REG must be 0... and bits 0,1 must not
133 140 select PLL... because of PLL can be stopped at this time) */
134   - DAC1064_calcclock(PMINFO fmem, minfo->max_pixel_clock, &m, &n, &p);
135   - outDAC1064(PMINFO DAC1064_XSYSPLLM, hw->DACclk[3] = m);
136   - outDAC1064(PMINFO DAC1064_XSYSPLLN, hw->DACclk[4] = n);
137   - outDAC1064(PMINFO DAC1064_XSYSPLLP, hw->DACclk[5] = p);
  141 + DAC1064_calcclock(minfo, fmem, minfo->max_pixel_clock, &m, &n, &p);
  142 + outDAC1064(minfo, DAC1064_XSYSPLLM, hw->DACclk[3] = m);
  143 + outDAC1064(minfo, DAC1064_XSYSPLLN, hw->DACclk[4] = n);
  144 + outDAC1064(minfo, DAC1064_XSYSPLLP, hw->DACclk[5] = p);
138 145 for (clk = 65536; clk; --clk) {
139   - if (inDAC1064(PMINFO DAC1064_XSYSPLLSTAT) & 0x40)
  146 + if (inDAC1064(minfo, DAC1064_XSYSPLLSTAT) & 0x40)
140 147 break;
141 148 }
142 149 if (!clk)
... ... @@ -154,7 +161,8 @@
154 161 }
155 162  
156 163 #ifdef CONFIG_FB_MATROX_G
157   -static void g450_set_plls(WPMINFO2) {
  164 +static void g450_set_plls(struct matrox_fb_info *minfo)
  165 +{
158 166 u_int32_t c2_ctl;
159 167 unsigned int pxc;
160 168 struct matrox_hw_state *hw = &minfo->hw;
161 169  
... ... @@ -184,16 +192,16 @@
184 192 c2_ctl |= 0x0006; /* Use video PLL */
185 193 hw->DACreg[POS1064_XPWRCTRL] |= 0x02;
186 194  
187   - outDAC1064(PMINFO M1064_XPWRCTRL, hw->DACreg[POS1064_XPWRCTRL]);
188   - matroxfb_g450_setpll_cond(PMINFO videomnp, M_VIDEO_PLL);
  195 + outDAC1064(minfo, M1064_XPWRCTRL, hw->DACreg[POS1064_XPWRCTRL]);
  196 + matroxfb_g450_setpll_cond(minfo, videomnp, M_VIDEO_PLL);
189 197 }
190 198  
191 199 hw->DACreg[POS1064_XPIXCLKCTRL] &= ~M1064_XPIXCLKCTRL_PLL_UP;
192 200 if (pixelmnp >= 0) {
193 201 hw->DACreg[POS1064_XPIXCLKCTRL] |= M1064_XPIXCLKCTRL_PLL_UP;
194 202  
195   - outDAC1064(PMINFO M1064_XPIXCLKCTRL, hw->DACreg[POS1064_XPIXCLKCTRL]);
196   - matroxfb_g450_setpll_cond(PMINFO pixelmnp, M_PIXEL_PLL_C);
  203 + outDAC1064(minfo, M1064_XPIXCLKCTRL, hw->DACreg[POS1064_XPIXCLKCTRL]);
  204 + matroxfb_g450_setpll_cond(minfo, pixelmnp, M_PIXEL_PLL_C);
197 205 }
198 206 if (c2_ctl != hw->crtc2.ctl) {
199 207 hw->crtc2.ctl = c2_ctl;
... ... @@ -245,7 +253,8 @@
245 253 }
246 254 #endif
247 255  
248   -void DAC1064_global_init(WPMINFO2) {
  256 +void DAC1064_global_init(struct matrox_fb_info *minfo)
  257 +{
249 258 struct matrox_hw_state *hw = &minfo->hw;
250 259  
251 260 hw->DACreg[POS1064_XMISCCTRL] &= M1064_XMISCCTRL_DAC_WIDTHMASK;
... ... @@ -299,7 +308,7 @@
299 308 break;
300 309 }
301 310 /* Now set timming related variables... */
302   - g450_set_plls(PMINFO2);
  311 + g450_set_plls(minfo);
303 312 } else
304 313 #endif
305 314 {
306 315  
307 316  
308 317  
309 318  
... ... @@ -318,24 +327,26 @@
318 327 }
319 328 }
320 329  
321   -void DAC1064_global_restore(WPMINFO2) {
  330 +void DAC1064_global_restore(struct matrox_fb_info *minfo)
  331 +{
322 332 struct matrox_hw_state *hw = &minfo->hw;
323 333  
324   - outDAC1064(PMINFO M1064_XPIXCLKCTRL, hw->DACreg[POS1064_XPIXCLKCTRL]);
325   - outDAC1064(PMINFO M1064_XMISCCTRL, hw->DACreg[POS1064_XMISCCTRL]);
  334 + outDAC1064(minfo, M1064_XPIXCLKCTRL, hw->DACreg[POS1064_XPIXCLKCTRL]);
  335 + outDAC1064(minfo, M1064_XMISCCTRL, hw->DACreg[POS1064_XMISCCTRL]);
326 336 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400) {
327   - outDAC1064(PMINFO 0x20, 0x04);
328   - outDAC1064(PMINFO 0x1F, minfo->devflags.dfp_type);
  337 + outDAC1064(minfo, 0x20, 0x04);
  338 + outDAC1064(minfo, 0x1F, minfo->devflags.dfp_type);
329 339 if (minfo->devflags.g450dac) {
330   - outDAC1064(PMINFO M1064_XSYNCCTRL, 0xCC);
331   - outDAC1064(PMINFO M1064_XPWRCTRL, hw->DACreg[POS1064_XPWRCTRL]);
332   - outDAC1064(PMINFO M1064_XPANMODE, hw->DACreg[POS1064_XPANMODE]);
333   - outDAC1064(PMINFO M1064_XOUTPUTCONN, hw->DACreg[POS1064_XOUTPUTCONN]);
  340 + outDAC1064(minfo, M1064_XSYNCCTRL, 0xCC);
  341 + outDAC1064(minfo, M1064_XPWRCTRL, hw->DACreg[POS1064_XPWRCTRL]);
  342 + outDAC1064(minfo, M1064_XPANMODE, hw->DACreg[POS1064_XPANMODE]);
  343 + outDAC1064(minfo, M1064_XOUTPUTCONN, hw->DACreg[POS1064_XOUTPUTCONN]);
334 344 }
335 345 }
336 346 }
337 347  
338   -static int DAC1064_init_1(WPMINFO struct my_timming* m) {
  348 +static int DAC1064_init_1(struct matrox_fb_info *minfo, struct my_timming *m)
  349 +{
339 350 struct matrox_hw_state *hw = &minfo->hw;
340 351  
341 352 DBG(__func__)
342 353  
... ... @@ -367,11 +378,12 @@
367 378 hw->DACreg[POS1064_XCURADDL] = 0;
368 379 hw->DACreg[POS1064_XCURADDH] = 0;
369 380  
370   - DAC1064_global_init(PMINFO2);
  381 + DAC1064_global_init(minfo);
371 382 return 0;
372 383 }
373 384  
374   -static int DAC1064_init_2(WPMINFO struct my_timming* m) {
  385 +static int DAC1064_init_2(struct matrox_fb_info *minfo, struct my_timming *m)
  386 +{
375 387 struct matrox_hw_state *hw = &minfo->hw;
376 388  
377 389 DBG(__func__)
... ... @@ -413,7 +425,8 @@
413 425 return 0;
414 426 }
415 427  
416   -static void DAC1064_restore_1(WPMINFO2) {
  428 +static void DAC1064_restore_1(struct matrox_fb_info *minfo)
  429 +{
417 430 struct matrox_hw_state *hw = &minfo->hw;
418 431  
419 432 CRITFLAGS
420 433  
421 434  
422 435  
... ... @@ -422,28 +435,29 @@
422 435  
423 436 CRITBEGIN
424 437  
425   - if ((inDAC1064(PMINFO DAC1064_XSYSPLLM) != hw->DACclk[3]) ||
426   - (inDAC1064(PMINFO DAC1064_XSYSPLLN) != hw->DACclk[4]) ||
427   - (inDAC1064(PMINFO DAC1064_XSYSPLLP) != hw->DACclk[5])) {
428   - outDAC1064(PMINFO DAC1064_XSYSPLLM, hw->DACclk[3]);
429   - outDAC1064(PMINFO DAC1064_XSYSPLLN, hw->DACclk[4]);
430   - outDAC1064(PMINFO DAC1064_XSYSPLLP, hw->DACclk[5]);
  438 + if ((inDAC1064(minfo, DAC1064_XSYSPLLM) != hw->DACclk[3]) ||
  439 + (inDAC1064(minfo, DAC1064_XSYSPLLN) != hw->DACclk[4]) ||
  440 + (inDAC1064(minfo, DAC1064_XSYSPLLP) != hw->DACclk[5])) {
  441 + outDAC1064(minfo, DAC1064_XSYSPLLM, hw->DACclk[3]);
  442 + outDAC1064(minfo, DAC1064_XSYSPLLN, hw->DACclk[4]);
  443 + outDAC1064(minfo, DAC1064_XSYSPLLP, hw->DACclk[5]);
431 444 }
432 445 {
433 446 unsigned int i;
434 447  
435 448 for (i = 0; i < sizeof(MGA1064_DAC_regs); i++) {
436 449 if ((i != POS1064_XPIXCLKCTRL) && (i != POS1064_XMISCCTRL))
437   - outDAC1064(PMINFO MGA1064_DAC_regs[i], hw->DACreg[i]);
  450 + outDAC1064(minfo, MGA1064_DAC_regs[i], hw->DACreg[i]);
438 451 }
439 452 }
440 453  
441   - DAC1064_global_restore(PMINFO2);
  454 + DAC1064_global_restore(minfo);
442 455  
443 456 CRITEND
444 457 };
445 458  
446   -static void DAC1064_restore_2(WPMINFO2) {
  459 +static void DAC1064_restore_2(struct matrox_fb_info *minfo)
  460 +{
447 461 #ifdef DEBUG
448 462 unsigned int i;
449 463 #endif
450 464  
451 465  
... ... @@ -470,14 +484,14 @@
470 484 int tmout;
471 485 CRITFLAGS
472 486  
473   - DAC1064_setpclk(PMINFO m->pixclock);
  487 + DAC1064_setpclk(minfo, m->pixclock);
474 488  
475 489 CRITBEGIN
476 490  
477 491 for (i = 0; i < 3; i++)
478   - outDAC1064(PMINFO M1064_XPIXPLLCM + i, minfo->hw.DACclk[i]);
  492 + outDAC1064(minfo, M1064_XPIXPLLCM + i, minfo->hw.DACclk[i]);
479 493 for (tmout = 500000; tmout; tmout--) {
480   - if (inDAC1064(PMINFO M1064_XPIXPLLSTAT) & 0x40)
  494 + if (inDAC1064(minfo, M1064_XPIXPLLSTAT) & 0x40)
481 495 break;
482 496 udelay(10);
483 497 };
484 498  
... ... @@ -500,9 +514,9 @@
500 514 static int g450_compute(void* out, struct my_timming* m) {
501 515 #define minfo ((struct matrox_fb_info*)out)
502 516 if (m->mnp < 0) {
503   - m->mnp = matroxfb_g450_setclk(PMINFO m->pixclock, (m->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL);
  517 + m->mnp = matroxfb_g450_setclk(minfo, m->pixclock, (m->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL);
504 518 if (m->mnp >= 0) {
505   - m->pixclock = g450_mnp2f(PMINFO m->mnp);
  519 + m->pixclock = g450_mnp2f(minfo, m->mnp);
506 520 }
507 521 }
508 522 #undef minfo
509 523  
... ... @@ -518,13 +532,14 @@
518 532 #endif /* NEED_DAC1064 */
519 533  
520 534 #ifdef CONFIG_FB_MATROX_MYSTIQUE
521   -static int MGA1064_init(WPMINFO struct my_timming* m) {
  535 +static int MGA1064_init(struct matrox_fb_info *minfo, struct my_timming *m)
  536 +{
522 537 struct matrox_hw_state *hw = &minfo->hw;
523 538  
524 539 DBG(__func__)
525 540  
526   - if (DAC1064_init_1(PMINFO m)) return 1;
527   - if (matroxfb_vgaHWinit(PMINFO m)) return 1;
  541 + if (DAC1064_init_1(minfo, m)) return 1;
  542 + if (matroxfb_vgaHWinit(minfo, m)) return 1;
528 543  
529 544 hw->MiscOutReg = 0xCB;
530 545 if (m->sync & FB_SYNC_HOR_HIGH_ACT)
531 546  
532 547  
533 548  
... ... @@ -534,20 +549,21 @@
534 549 if (m->sync & FB_SYNC_COMP_HIGH_ACT) /* should be only FB_SYNC_COMP */
535 550 hw->CRTCEXT[3] |= 0x40;
536 551  
537   - if (DAC1064_init_2(PMINFO m)) return 1;
  552 + if (DAC1064_init_2(minfo, m)) return 1;
538 553 return 0;
539 554 }
540 555 #endif
541 556  
542 557 #ifdef CONFIG_FB_MATROX_G
543   -static int MGAG100_init(WPMINFO struct my_timming* m) {
  558 +static int MGAG100_init(struct matrox_fb_info *minfo, struct my_timming *m)
  559 +{
544 560 struct matrox_hw_state *hw = &minfo->hw;
545 561  
546 562 DBG(__func__)
547 563  
548   - if (DAC1064_init_1(PMINFO m)) return 1;
  564 + if (DAC1064_init_1(minfo, m)) return 1;
549 565 hw->MXoptionReg &= ~0x2000;
550   - if (matroxfb_vgaHWinit(PMINFO m)) return 1;
  566 + if (matroxfb_vgaHWinit(minfo, m)) return 1;
551 567  
552 568 hw->MiscOutReg = 0xEF;
553 569 if (m->sync & FB_SYNC_HOR_HIGH_ACT)
554 570  
... ... @@ -557,13 +573,14 @@
557 573 if (m->sync & FB_SYNC_COMP_HIGH_ACT) /* should be only FB_SYNC_COMP */
558 574 hw->CRTCEXT[3] |= 0x40;
559 575  
560   - if (DAC1064_init_2(PMINFO m)) return 1;
  576 + if (DAC1064_init_2(minfo, m)) return 1;
561 577 return 0;
562 578 }
563 579 #endif /* G */
564 580  
565 581 #ifdef CONFIG_FB_MATROX_MYSTIQUE
566   -static void MGA1064_ramdac_init(WPMINFO2) {
  582 +static void MGA1064_ramdac_init(struct matrox_fb_info *minfo)
  583 +{
567 584  
568 585 DBG(__func__)
569 586  
... ... @@ -577,7 +594,7 @@
577 594 minfo->features.pll.post_shift_max = 3;
578 595 minfo->features.DAC1064.xvrefctrl = DAC1064_XVREFCTRL_EXTERNAL;
579 596 /* maybe cmdline MCLK= ?, doc says gclk=44MHz, mclk=66MHz... it was 55/83 with old values */
580   - DAC1064_setmclk(PMINFO DAC1064_OPT_MDIV2 | DAC1064_OPT_GDIV3 | DAC1064_OPT_SCLK_PLL, 133333);
  597 + DAC1064_setmclk(minfo, DAC1064_OPT_MDIV2 | DAC1064_OPT_GDIV3 | DAC1064_OPT_SCLK_PLL, 133333);
581 598 }
582 599 #endif
583 600  
584 601  
585 602  
... ... @@ -589,23 +606,25 @@
589 606 static int def50 = 0; /* reg50, & 0x0F, & 0x3000 (only 0x0000, 0x1000, 0x2000 (0x3000 disallowed and treated as 0) */
590 607 #endif
591 608  
592   -static void MGAG100_progPixClock(CPMINFO int flags, int m, int n, int p) {
  609 +static void MGAG100_progPixClock(const struct matrox_fb_info *minfo, int flags,
  610 + int m, int n, int p)
  611 +{
593 612 int reg;
594 613 int selClk;
595 614 int clk;
596 615  
597 616 DBG(__func__)
598 617  
599   - outDAC1064(PMINFO M1064_XPIXCLKCTRL, inDAC1064(PMINFO M1064_XPIXCLKCTRL) | M1064_XPIXCLKCTRL_DIS |
  618 + outDAC1064(minfo, M1064_XPIXCLKCTRL, inDAC1064(minfo, M1064_XPIXCLKCTRL) | M1064_XPIXCLKCTRL_DIS |
600 619 M1064_XPIXCLKCTRL_PLL_UP);
601 620 switch (flags & 3) {
602 621 case 0: reg = M1064_XPIXPLLAM; break;
603 622 case 1: reg = M1064_XPIXPLLBM; break;
604 623 default: reg = M1064_XPIXPLLCM; break;
605 624 }
606   - outDAC1064(PMINFO reg++, m);
607   - outDAC1064(PMINFO reg++, n);
608   - outDAC1064(PMINFO reg, p);
  625 + outDAC1064(minfo, reg++, m);
  626 + outDAC1064(minfo, reg++, n);
  627 + outDAC1064(minfo, reg, p);
609 628 selClk = mga_inb(M_MISC_REG_READ) & ~0xC;
610 629 /* there should be flags & 0x03 & case 0/1/else */
611 630 /* and we should first select source and after that we should wait for PLL */
612 631  
613 632  
614 633  
615 634  
616 635  
... ... @@ -617,34 +636,37 @@
617 636 }
618 637 mga_outb(M_MISC_REG, selClk);
619 638 for (clk = 500000; clk; clk--) {
620   - if (inDAC1064(PMINFO M1064_XPIXPLLSTAT) & 0x40)
  639 + if (inDAC1064(minfo, M1064_XPIXPLLSTAT) & 0x40)
621 640 break;
622 641 udelay(10);
623 642 };
624 643 if (!clk)
625 644 printk(KERN_ERR "matroxfb: Pixel PLL%c not locked after usual time\n", (reg-M1064_XPIXPLLAM-2)/4 + 'A');
626   - selClk = inDAC1064(PMINFO M1064_XPIXCLKCTRL) & ~M1064_XPIXCLKCTRL_SRC_MASK;
  645 + selClk = inDAC1064(minfo, M1064_XPIXCLKCTRL) & ~M1064_XPIXCLKCTRL_SRC_MASK;
627 646 switch (flags & 0x0C) {
628 647 case 0x00: selClk |= M1064_XPIXCLKCTRL_SRC_PCI; break;
629 648 case 0x04: selClk |= M1064_XPIXCLKCTRL_SRC_PLL; break;
630 649 default: selClk |= M1064_XPIXCLKCTRL_SRC_EXT; break;
631 650 }
632   - outDAC1064(PMINFO M1064_XPIXCLKCTRL, selClk);
633   - outDAC1064(PMINFO M1064_XPIXCLKCTRL, inDAC1064(PMINFO M1064_XPIXCLKCTRL) & ~M1064_XPIXCLKCTRL_DIS);
  651 + outDAC1064(minfo, M1064_XPIXCLKCTRL, selClk);
  652 + outDAC1064(minfo, M1064_XPIXCLKCTRL, inDAC1064(minfo, M1064_XPIXCLKCTRL) & ~M1064_XPIXCLKCTRL_DIS);
634 653 }
635 654  
636   -static void MGAG100_setPixClock(CPMINFO int flags, int freq) {
  655 +static void MGAG100_setPixClock(const struct matrox_fb_info *minfo, int flags,
  656 + int freq)
  657 +{
637 658 unsigned int m, n, p;
638 659  
639 660 DBG(__func__)
640 661  
641   - DAC1064_calcclock(PMINFO freq, minfo->max_pixel_clock, &m, &n, &p);
642   - MGAG100_progPixClock(PMINFO flags, m, n, p);
  662 + DAC1064_calcclock(minfo, freq, minfo->max_pixel_clock, &m, &n, &p);
  663 + MGAG100_progPixClock(minfo, flags, m, n, p);
643 664 }
644 665 #endif
645 666  
646 667 #ifdef CONFIG_FB_MATROX_MYSTIQUE
647   -static int MGA1064_preinit(WPMINFO2) {
  668 +static int MGA1064_preinit(struct matrox_fb_info *minfo)
  669 +{
648 670 static const int vxres_mystique[] = { 512, 640, 768, 800, 832, 960,
649 671 1024, 1152, 1280, 1600, 1664, 1920,
650 672 2048, 0};
651 673  
652 674  
... ... @@ -681,16 +703,18 @@
681 703 return 0;
682 704 }
683 705  
684   -static void MGA1064_reset(WPMINFO2) {
  706 +static void MGA1064_reset(struct matrox_fb_info *minfo)
  707 +{
685 708  
686 709 DBG(__func__);
687 710  
688   - MGA1064_ramdac_init(PMINFO2);
  711 + MGA1064_ramdac_init(minfo);
689 712 }
690 713 #endif
691 714  
692 715 #ifdef CONFIG_FB_MATROX_G
693   -static void g450_mclk_init(WPMINFO2) {
  716 +static void g450_mclk_init(struct matrox_fb_info *minfo)
  717 +{
694 718 /* switch all clocks to PCI source */
695 719 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg | 4);
696 720 pci_write_config_dword(minfo->pcidev, PCI_OPTION3_REG, minfo->values.reg.opt3 & ~0x00300C03);
697 721  
698 722  
... ... @@ -699,17 +723,17 @@
699 723 if (((minfo->values.reg.opt3 & 0x000003) == 0x000003) ||
700 724 ((minfo->values.reg.opt3 & 0x000C00) == 0x000C00) ||
701 725 ((minfo->values.reg.opt3 & 0x300000) == 0x300000)) {
702   - matroxfb_g450_setclk(PMINFO minfo->values.pll.video, M_VIDEO_PLL);
  726 + matroxfb_g450_setclk(minfo, minfo->values.pll.video, M_VIDEO_PLL);
703 727 } else {
704 728 unsigned long flags;
705 729 unsigned int pwr;
706 730  
707 731 matroxfb_DAC_lock_irqsave(flags);
708   - pwr = inDAC1064(PMINFO M1064_XPWRCTRL) & ~0x02;
709   - outDAC1064(PMINFO M1064_XPWRCTRL, pwr);
  732 + pwr = inDAC1064(minfo, M1064_XPWRCTRL) & ~0x02;
  733 + outDAC1064(minfo, M1064_XPWRCTRL, pwr);
710 734 matroxfb_DAC_unlock_irqrestore(flags);
711 735 }
712   - matroxfb_g450_setclk(PMINFO minfo->values.pll.system, M_SYSTEM_PLL);
  736 + matroxfb_g450_setclk(minfo, minfo->values.pll.system, M_SYSTEM_PLL);
713 737  
714 738 /* switch clocks to their real PLL source(s) */
715 739 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg | 4);
... ... @@ -718,7 +742,8 @@
718 742  
719 743 }
720 744  
721   -static void g450_memory_init(WPMINFO2) {
  745 +static void g450_memory_init(struct matrox_fb_info *minfo)
  746 +{
722 747 /* disable memory refresh */
723 748 minfo->hw.MXoptionReg &= ~0x001F8000;
724 749 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg);
... ... @@ -760,7 +785,8 @@
760 785  
761 786 }
762 787  
763   -static void g450_preinit(WPMINFO2) {
  788 +static void g450_preinit(struct matrox_fb_info *minfo)
  789 +{
764 790 u_int32_t c2ctl;
765 791 u_int8_t curctl;
766 792 u_int8_t c1ctl;
767 793  
768 794  
769 795  
... ... @@ -783,24 +809,24 @@
783 809 c2ctl = mga_inl(M_C2CTL);
784 810 mga_outl(M_C2CTL, c2ctl & ~1);
785 811 /* stop cursor */
786   - curctl = inDAC1064(PMINFO M1064_XCURCTRL);
787   - outDAC1064(PMINFO M1064_XCURCTRL, 0);
  812 + curctl = inDAC1064(minfo, M1064_XCURCTRL);
  813 + outDAC1064(minfo, M1064_XCURCTRL, 0);
788 814 /* stop crtc1 */
789 815 c1ctl = mga_readr(M_SEQ_INDEX, 1);
790 816 mga_setr(M_SEQ_INDEX, 1, c1ctl | 0x20);
791 817  
792   - g450_mclk_init(PMINFO2);
793   - g450_memory_init(PMINFO2);
  818 + g450_mclk_init(minfo);
  819 + g450_memory_init(minfo);
794 820  
795 821 /* set legacy VGA clock sources for DOSEmu or VMware... */
796   - matroxfb_g450_setclk(PMINFO 25175, M_PIXEL_PLL_A);
797   - matroxfb_g450_setclk(PMINFO 28322, M_PIXEL_PLL_B);
  822 + matroxfb_g450_setclk(minfo, 25175, M_PIXEL_PLL_A);
  823 + matroxfb_g450_setclk(minfo, 28322, M_PIXEL_PLL_B);
798 824  
799 825 /* restore crtc1 */
800 826 mga_setr(M_SEQ_INDEX, 1, c1ctl);
801 827  
802 828 /* restore cursor */
803   - outDAC1064(PMINFO M1064_XCURCTRL, curctl);
  829 + outDAC1064(minfo, M1064_XCURCTRL, curctl);
804 830  
805 831 /* restore crtc2 */
806 832 mga_outl(M_C2CTL, c2ctl);
... ... @@ -808,7 +834,8 @@
808 834 return;
809 835 }
810 836  
811   -static int MGAG100_preinit(WPMINFO2) {
  837 +static int MGAG100_preinit(struct matrox_fb_info *minfo)
  838 +{
812 839 static const int vxres_g100[] = { 512, 640, 768, 800, 832, 960,
813 840 1024, 1152, 1280, 1600, 1664, 1920,
814 841 2048, 0};
... ... @@ -862,7 +889,7 @@
862 889 if (minfo->devflags.noinit)
863 890 return 0;
864 891 if (minfo->devflags.g450dac) {
865   - g450_preinit(PMINFO2);
  892 + g450_preinit(minfo);
866 893 return 0;
867 894 }
868 895 hw->MXoptionReg &= 0xC0000100;
... ... @@ -874,7 +901,7 @@
874 901 if (minfo->devflags.nopciretry)
875 902 hw->MXoptionReg |= 0x20000000;
876 903 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg);
877   - DAC1064_setmclk(PMINFO DAC1064_OPT_MDIV2 | DAC1064_OPT_GDIV3 | DAC1064_OPT_SCLK_PCI, 133333);
  904 + DAC1064_setmclk(minfo, DAC1064_OPT_MDIV2 | DAC1064_OPT_GDIV3 | DAC1064_OPT_SCLK_PCI, 133333);
878 905  
879 906 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG100) {
880 907 pci_read_config_dword(minfo->pcidev, PCI_OPTION2_REG, &reg50);
... ... @@ -952,7 +979,8 @@
952 979 return 0;
953 980 }
954 981  
955   -static void MGAG100_reset(WPMINFO2) {
  982 +static void MGAG100_reset(struct matrox_fb_info *minfo)
  983 +{
956 984 u_int8_t b;
957 985 struct matrox_hw_state *hw = &minfo->hw;
958 986  
959 987  
960 988  
961 989  
962 990  
963 991  
... ... @@ -981,35 +1009,36 @@
981 1009 }
982 1010 if (minfo->devflags.g450dac) {
983 1011 /* either leave MCLK as is... or they were set in preinit */
984   - hw->DACclk[3] = inDAC1064(PMINFO DAC1064_XSYSPLLM);
985   - hw->DACclk[4] = inDAC1064(PMINFO DAC1064_XSYSPLLN);
986   - hw->DACclk[5] = inDAC1064(PMINFO DAC1064_XSYSPLLP);
  1012 + hw->DACclk[3] = inDAC1064(minfo, DAC1064_XSYSPLLM);
  1013 + hw->DACclk[4] = inDAC1064(minfo, DAC1064_XSYSPLLN);
  1014 + hw->DACclk[5] = inDAC1064(minfo, DAC1064_XSYSPLLP);
987 1015 } else {
988   - DAC1064_setmclk(PMINFO DAC1064_OPT_RESERVED | DAC1064_OPT_MDIV2 | DAC1064_OPT_GDIV1 | DAC1064_OPT_SCLK_PLL, 133333);
  1016 + DAC1064_setmclk(minfo, DAC1064_OPT_RESERVED | DAC1064_OPT_MDIV2 | DAC1064_OPT_GDIV1 | DAC1064_OPT_SCLK_PLL, 133333);
989 1017 }
990 1018 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400) {
991 1019 if (minfo->devflags.dfp_type == -1) {
992   - minfo->devflags.dfp_type = inDAC1064(PMINFO 0x1F);
  1020 + minfo->devflags.dfp_type = inDAC1064(minfo, 0x1F);
993 1021 }
994 1022 }
995 1023 if (minfo->devflags.noinit)
996 1024 return;
997 1025 if (minfo->devflags.g450dac) {
998 1026 } else {
999   - MGAG100_setPixClock(PMINFO 4, 25175);
1000   - MGAG100_setPixClock(PMINFO 5, 28322);
  1027 + MGAG100_setPixClock(minfo, 4, 25175);
  1028 + MGAG100_setPixClock(minfo, 5, 28322);
1001 1029 if (x7AF4 & 0x10) {
1002   - b = inDAC1064(PMINFO M1064_XGENIODATA) & ~1;
1003   - outDAC1064(PMINFO M1064_XGENIODATA, b);
1004   - b = inDAC1064(PMINFO M1064_XGENIOCTRL) | 1;
1005   - outDAC1064(PMINFO M1064_XGENIOCTRL, b);
  1030 + b = inDAC1064(minfo, M1064_XGENIODATA) & ~1;
  1031 + outDAC1064(minfo, M1064_XGENIODATA, b);
  1032 + b = inDAC1064(minfo, M1064_XGENIOCTRL) | 1;
  1033 + outDAC1064(minfo, M1064_XGENIOCTRL, b);
1006 1034 }
1007 1035 }
1008 1036 }
1009 1037 #endif
1010 1038  
1011 1039 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1012   -static void MGA1064_restore(WPMINFO2) {
  1040 +static void MGA1064_restore(struct matrox_fb_info *minfo)
  1041 +{
1013 1042 int i;
1014 1043 struct matrox_hw_state *hw = &minfo->hw;
1015 1044  
1016 1045  
1017 1046  
... ... @@ -1025,17 +1054,18 @@
1025 1054  
1026 1055 CRITEND
1027 1056  
1028   - DAC1064_restore_1(PMINFO2);
1029   - matroxfb_vgaHWrestore(PMINFO2);
  1057 + DAC1064_restore_1(minfo);
  1058 + matroxfb_vgaHWrestore(minfo);
1030 1059 minfo->crtc1.panpos = -1;
1031 1060 for (i = 0; i < 6; i++)
1032 1061 mga_setr(M_EXTVGA_INDEX, i, hw->CRTCEXT[i]);
1033   - DAC1064_restore_2(PMINFO2);
  1062 + DAC1064_restore_2(minfo);
1034 1063 }
1035 1064 #endif
1036 1065  
1037 1066 #ifdef CONFIG_FB_MATROX_G
1038   -static void MGAG100_restore(WPMINFO2) {
  1067 +static void MGAG100_restore(struct matrox_fb_info *minfo)
  1068 +{
1039 1069 int i;
1040 1070 struct matrox_hw_state *hw = &minfo->hw;
1041 1071  
... ... @@ -1048,8 +1078,8 @@
1048 1078 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg);
1049 1079 CRITEND
1050 1080  
1051   - DAC1064_restore_1(PMINFO2);
1052   - matroxfb_vgaHWrestore(PMINFO2);
  1081 + DAC1064_restore_1(minfo);
  1082 + matroxfb_vgaHWrestore(minfo);
1053 1083 #ifdef CONFIG_FB_MATROX_32MB
1054 1084 if (minfo->devflags.support32MB)
1055 1085 mga_setr(M_EXTVGA_INDEX, 8, hw->CRTCEXT[8]);
... ... @@ -1057,7 +1087,7 @@
1057 1087 minfo->crtc1.panpos = -1;
1058 1088 for (i = 0; i < 6; i++)
1059 1089 mga_setr(M_EXTVGA_INDEX, i, hw->CRTCEXT[i]);
1060   - DAC1064_restore_2(PMINFO2);
  1090 + DAC1064_restore_2(minfo);
1061 1091 }
1062 1092 #endif
1063 1093  
drivers/video/matrox/matroxfb_DAC1064.h
Diff comments   View file @ 316b4d6
... ... @@ -11,8 +11,8 @@
11 11 extern struct matrox_switch matrox_G100;
12 12 #endif
13 13 #ifdef NEED_DAC1064
14   -void DAC1064_global_init(WPMINFO2);
15   -void DAC1064_global_restore(WPMINFO2);
  14 +void DAC1064_global_init(struct matrox_fb_info *minfo);
  15 +void DAC1064_global_restore(struct matrox_fb_info *minfo);
16 16 #endif
17 17  
18 18 #define M1064_INDEX 0x00
drivers/video/matrox/matroxfb_Ti3026.c
Diff comments   View file @ 316b4d6
... ... @@ -279,27 +279,31 @@
279 279 TVP3026_XCOLKEYCTRL_ZOOM1,
280 280 0x00, 0x00, TVP3026_XCURCTRL_DIS };
281 281  
282   -static int Ti3026_calcclock(CPMINFO unsigned int freq, unsigned int fmax, int* in, int* feed, int* post) {
  282 +static int Ti3026_calcclock(const struct matrox_fb_info *minfo,
  283 + unsigned int freq, unsigned int fmax, int *in,
  284 + int *feed, int *post)
  285 +{
283 286 unsigned int fvco;
284 287 unsigned int lin, lfeed, lpost;
285 288  
286 289 DBG(__func__)
287 290  
288   - fvco = PLL_calcclock(PMINFO freq, fmax, &lin, &lfeed, &lpost);
  291 + fvco = PLL_calcclock(minfo, freq, fmax, &lin, &lfeed, &lpost);
289 292 fvco >>= (*post = lpost);
290 293 *in = 64 - lin;
291 294 *feed = 64 - lfeed;
292 295 return fvco;
293 296 }
294 297  
295   -static int Ti3026_setpclk(WPMINFO int clk) {
  298 +static int Ti3026_setpclk(struct matrox_fb_info *minfo, int clk)
  299 +{
296 300 unsigned int f_pll;
297 301 unsigned int pixfeed, pixin, pixpost;
298 302 struct matrox_hw_state *hw = &minfo->hw;
299 303  
300 304 DBG(__func__)
301 305  
302   - f_pll = Ti3026_calcclock(PMINFO clk, minfo->max_pixel_clock, &pixin, &pixfeed, &pixpost);
  306 + f_pll = Ti3026_calcclock(minfo, clk, minfo->max_pixel_clock, &pixin, &pixfeed, &pixpost);
303 307  
304 308 hw->DACclk[0] = pixin | 0xC0;
305 309 hw->DACclk[1] = pixfeed;
... ... @@ -361,7 +365,8 @@
361 365 return 0;
362 366 }
363 367  
364   -static int Ti3026_init(WPMINFO struct my_timming* m) {
  368 +static int Ti3026_init(struct matrox_fb_info *minfo, struct my_timming *m)
  369 +{
365 370 u_int8_t muxctrl = isInterleave(minfo) ? TVP3026_XMUXCTRL_MEMORY_64BIT : TVP3026_XMUXCTRL_MEMORY_32BIT;
366 371 struct matrox_hw_state *hw = &minfo->hw;
367 372  
... ... @@ -400,7 +405,7 @@
400 405 default:
401 406 return 1; /* TODO: failed */
402 407 }
403   - if (matroxfb_vgaHWinit(PMINFO m)) return 1;
  408 + if (matroxfb_vgaHWinit(minfo, m)) return 1;
404 409  
405 410 /* set SYNC */
406 411 hw->MiscOutReg = 0xCB;
407 412  
... ... @@ -429,11 +434,12 @@
429 434 if (isInterleave(minfo)) hw->MXoptionReg |= 0x00001000;
430 435  
431 436 /* set DAC */
432   - Ti3026_setpclk(PMINFO m->pixclock);
  437 + Ti3026_setpclk(minfo, m->pixclock);
433 438 return 0;
434 439 }
435 440  
436   -static void ti3026_setMCLK(WPMINFO int fout){
  441 +static void ti3026_setMCLK(struct matrox_fb_info *minfo, int fout)
  442 +{
437 443 unsigned int f_pll;
438 444 unsigned int pclk_m, pclk_n, pclk_p;
439 445 unsigned int mclk_m, mclk_n, mclk_p;
440 446  
441 447  
442 448  
443 449  
... ... @@ -442,29 +448,29 @@
442 448  
443 449 DBG(__func__)
444 450  
445   - f_pll = Ti3026_calcclock(PMINFO fout, minfo->max_pixel_clock, &mclk_n, &mclk_m, &mclk_p);
  451 + f_pll = Ti3026_calcclock(minfo, fout, minfo->max_pixel_clock, &mclk_n, &mclk_m, &mclk_p);
446 452  
447 453 /* save pclk */
448   - outTi3026(PMINFO TVP3026_XPLLADDR, 0xFC);
449   - pclk_n = inTi3026(PMINFO TVP3026_XPIXPLLDATA);
450   - outTi3026(PMINFO TVP3026_XPLLADDR, 0xFD);
451   - pclk_m = inTi3026(PMINFO TVP3026_XPIXPLLDATA);
452   - outTi3026(PMINFO TVP3026_XPLLADDR, 0xFE);
453   - pclk_p = inTi3026(PMINFO TVP3026_XPIXPLLDATA);
  454 + outTi3026(minfo, TVP3026_XPLLADDR, 0xFC);
  455 + pclk_n = inTi3026(minfo, TVP3026_XPIXPLLDATA);
  456 + outTi3026(minfo, TVP3026_XPLLADDR, 0xFD);
  457 + pclk_m = inTi3026(minfo, TVP3026_XPIXPLLDATA);
  458 + outTi3026(minfo, TVP3026_XPLLADDR, 0xFE);
  459 + pclk_p = inTi3026(minfo, TVP3026_XPIXPLLDATA);
454 460  
455 461 /* stop pclk */
456   - outTi3026(PMINFO TVP3026_XPLLADDR, 0xFE);
457   - outTi3026(PMINFO TVP3026_XPIXPLLDATA, 0x00);
  462 + outTi3026(minfo, TVP3026_XPLLADDR, 0xFE);
  463 + outTi3026(minfo, TVP3026_XPIXPLLDATA, 0x00);
458 464  
459 465 /* set pclk to new mclk */
460   - outTi3026(PMINFO TVP3026_XPLLADDR, 0xFC);
461   - outTi3026(PMINFO TVP3026_XPIXPLLDATA, mclk_n | 0xC0);
462   - outTi3026(PMINFO TVP3026_XPIXPLLDATA, mclk_m);
463   - outTi3026(PMINFO TVP3026_XPIXPLLDATA, mclk_p | 0xB0);
  466 + outTi3026(minfo, TVP3026_XPLLADDR, 0xFC);
  467 + outTi3026(minfo, TVP3026_XPIXPLLDATA, mclk_n | 0xC0);
  468 + outTi3026(minfo, TVP3026_XPIXPLLDATA, mclk_m);
  469 + outTi3026(minfo, TVP3026_XPIXPLLDATA, mclk_p | 0xB0);
464 470  
465 471 /* wait for PLL to lock */
466 472 for (tmout = 500000; tmout; tmout--) {
467   - if (inTi3026(PMINFO TVP3026_XPIXPLLDATA) & 0x40)
  473 + if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40)
468 474 break;
469 475 udelay(10);
470 476 };
471 477  
472 478  
473 479  
... ... @@ -472,23 +478,23 @@
472 478 printk(KERN_ERR "matroxfb: Temporary pixel PLL not locked after 5 secs\n");
473 479  
474 480 /* output pclk on mclk pin */
475   - mclk_ctl = inTi3026(PMINFO TVP3026_XMEMPLLCTRL);
476   - outTi3026(PMINFO TVP3026_XMEMPLLCTRL, mclk_ctl & 0xE7);
477   - outTi3026(PMINFO TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_STROBEMKC4);
  481 + mclk_ctl = inTi3026(minfo, TVP3026_XMEMPLLCTRL);
  482 + outTi3026(minfo, TVP3026_XMEMPLLCTRL, mclk_ctl & 0xE7);
  483 + outTi3026(minfo, TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_STROBEMKC4);
478 484  
479 485 /* stop MCLK */
480   - outTi3026(PMINFO TVP3026_XPLLADDR, 0xFB);
481   - outTi3026(PMINFO TVP3026_XMEMPLLDATA, 0x00);
  486 + outTi3026(minfo, TVP3026_XPLLADDR, 0xFB);
  487 + outTi3026(minfo, TVP3026_XMEMPLLDATA, 0x00);
482 488  
483 489 /* set mclk to new freq */
484   - outTi3026(PMINFO TVP3026_XPLLADDR, 0xF3);
485   - outTi3026(PMINFO TVP3026_XMEMPLLDATA, mclk_n | 0xC0);
486   - outTi3026(PMINFO TVP3026_XMEMPLLDATA, mclk_m);
487   - outTi3026(PMINFO TVP3026_XMEMPLLDATA, mclk_p | 0xB0);
  490 + outTi3026(minfo, TVP3026_XPLLADDR, 0xF3);
  491 + outTi3026(minfo, TVP3026_XMEMPLLDATA, mclk_n | 0xC0);
  492 + outTi3026(minfo, TVP3026_XMEMPLLDATA, mclk_m);
  493 + outTi3026(minfo, TVP3026_XMEMPLLDATA, mclk_p | 0xB0);
488 494  
489 495 /* wait for PLL to lock */
490 496 for (tmout = 500000; tmout; tmout--) {
491   - if (inTi3026(PMINFO TVP3026_XMEMPLLDATA) & 0x40)
  497 + if (inTi3026(minfo, TVP3026_XMEMPLLDATA) & 0x40)
492 498 break;
493 499 udelay(10);
494 500 }
495 501  
496 502  
497 503  
... ... @@ -509,22 +515,22 @@
509 515 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg);
510 516  
511 517 /* output MCLK to MCLK pin */
512   - outTi3026(PMINFO TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL);
513   - outTi3026(PMINFO TVP3026_XMEMPLLCTRL, (mclk_ctl ) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL | TVP3026_XMEMPLLCTRL_STROBEMKC4);
  518 + outTi3026(minfo, TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL);
  519 + outTi3026(minfo, TVP3026_XMEMPLLCTRL, (mclk_ctl ) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL | TVP3026_XMEMPLLCTRL_STROBEMKC4);
514 520  
515 521 /* stop PCLK */
516   - outTi3026(PMINFO TVP3026_XPLLADDR, 0xFE);
517   - outTi3026(PMINFO TVP3026_XPIXPLLDATA, 0x00);
  522 + outTi3026(minfo, TVP3026_XPLLADDR, 0xFE);
  523 + outTi3026(minfo, TVP3026_XPIXPLLDATA, 0x00);
518 524  
519 525 /* restore pclk */
520   - outTi3026(PMINFO TVP3026_XPLLADDR, 0xFC);
521   - outTi3026(PMINFO TVP3026_XPIXPLLDATA, pclk_n);
522   - outTi3026(PMINFO TVP3026_XPIXPLLDATA, pclk_m);
523   - outTi3026(PMINFO TVP3026_XPIXPLLDATA, pclk_p);
  526 + outTi3026(minfo, TVP3026_XPLLADDR, 0xFC);
  527 + outTi3026(minfo, TVP3026_XPIXPLLDATA, pclk_n);
  528 + outTi3026(minfo, TVP3026_XPIXPLLDATA, pclk_m);
  529 + outTi3026(minfo, TVP3026_XPIXPLLDATA, pclk_p);
524 530  
525 531 /* wait for PLL to lock */
526 532 for (tmout = 500000; tmout; tmout--) {
527   - if (inTi3026(PMINFO TVP3026_XPIXPLLDATA) & 0x40)
  533 + if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40)
528 534 break;
529 535 udelay(10);
530 536 }
... ... @@ -532,8 +538,8 @@
532 538 printk(KERN_ERR "matroxfb: Pixel PLL not locked after 5 secs\n");
533 539 }
534 540  
535   -static void ti3026_ramdac_init(WPMINFO2) {
536   -
  541 +static void ti3026_ramdac_init(struct matrox_fb_info *minfo)
  542 +{
537 543 DBG(__func__)
538 544  
539 545 minfo->features.pll.vco_freq_min = 110000;
540 546  
... ... @@ -545,10 +551,11 @@
545 551 minfo->features.pll.post_shift_max = 3;
546 552 if (minfo->devflags.noinit)
547 553 return;
548   - ti3026_setMCLK(PMINFO 60000);
  554 + ti3026_setMCLK(minfo, 60000);
549 555 }
550 556  
551   -static void Ti3026_restore(WPMINFO2) {
  557 +static void Ti3026_restore(struct matrox_fb_info *minfo)
  558 +{
552 559 int i;
553 560 unsigned char progdac[6];
554 561 struct matrox_hw_state *hw = &minfo->hw;
... ... @@ -569,7 +576,7 @@
569 576  
570 577 CRITEND
571 578  
572   - matroxfb_vgaHWrestore(PMINFO2);
  579 + matroxfb_vgaHWrestore(minfo);
573 580  
574 581 CRITBEGIN
575 582  
576 583  
... ... @@ -578,18 +585,18 @@
578 585 mga_setr(M_EXTVGA_INDEX, i, hw->CRTCEXT[i]);
579 586  
580 587 for (i = 0; i < 21; i++) {
581   - outTi3026(PMINFO DACseq[i], hw->DACreg[i]);
  588 + outTi3026(minfo, DACseq[i], hw->DACreg[i]);
582 589 }
583 590  
584   - outTi3026(PMINFO TVP3026_XPLLADDR, 0x00);
585   - progdac[0] = inTi3026(PMINFO TVP3026_XPIXPLLDATA);
586   - progdac[3] = inTi3026(PMINFO TVP3026_XLOOPPLLDATA);
587   - outTi3026(PMINFO TVP3026_XPLLADDR, 0x15);
588   - progdac[1] = inTi3026(PMINFO TVP3026_XPIXPLLDATA);
589   - progdac[4] = inTi3026(PMINFO TVP3026_XLOOPPLLDATA);
590   - outTi3026(PMINFO TVP3026_XPLLADDR, 0x2A);
591   - progdac[2] = inTi3026(PMINFO TVP3026_XPIXPLLDATA);
592   - progdac[5] = inTi3026(PMINFO TVP3026_XLOOPPLLDATA);
  591 + outTi3026(minfo, TVP3026_XPLLADDR, 0x00);
  592 + progdac[0] = inTi3026(minfo, TVP3026_XPIXPLLDATA);
  593 + progdac[3] = inTi3026(minfo, TVP3026_XLOOPPLLDATA);
  594 + outTi3026(minfo, TVP3026_XPLLADDR, 0x15);
  595 + progdac[1] = inTi3026(minfo, TVP3026_XPIXPLLDATA);
  596 + progdac[4] = inTi3026(minfo, TVP3026_XLOOPPLLDATA);
  597 + outTi3026(minfo, TVP3026_XPLLADDR, 0x2A);
  598 + progdac[2] = inTi3026(minfo, TVP3026_XPIXPLLDATA);
  599 + progdac[5] = inTi3026(minfo, TVP3026_XLOOPPLLDATA);
593 600  
594 601 CRITEND
595 602 if (memcmp(hw->DACclk, progdac, 6)) {
596 603  
597 604  
598 605  
599 606  
... ... @@ -598,20 +605,20 @@
598 605 /* Maybe even we should call schedule() ? */
599 606  
600 607 CRITBEGIN
601   - outTi3026(PMINFO TVP3026_XCLKCTRL, hw->DACreg[POS3026_XCLKCTRL]);
602   - outTi3026(PMINFO TVP3026_XPLLADDR, 0x2A);
603   - outTi3026(PMINFO TVP3026_XLOOPPLLDATA, 0);
604   - outTi3026(PMINFO TVP3026_XPIXPLLDATA, 0);
  608 + outTi3026(minfo, TVP3026_XCLKCTRL, hw->DACreg[POS3026_XCLKCTRL]);
  609 + outTi3026(minfo, TVP3026_XPLLADDR, 0x2A);
  610 + outTi3026(minfo, TVP3026_XLOOPPLLDATA, 0);
  611 + outTi3026(minfo, TVP3026_XPIXPLLDATA, 0);
605 612  
606   - outTi3026(PMINFO TVP3026_XPLLADDR, 0x00);
  613 + outTi3026(minfo, TVP3026_XPLLADDR, 0x00);
607 614 for (i = 0; i < 3; i++)
608   - outTi3026(PMINFO TVP3026_XPIXPLLDATA, hw->DACclk[i]);
  615 + outTi3026(minfo, TVP3026_XPIXPLLDATA, hw->DACclk[i]);
609 616 /* wait for PLL only if PLL clock requested (always for PowerMode, never for VGA) */
610 617 if (hw->MiscOutReg & 0x08) {
611 618 int tmout;
612   - outTi3026(PMINFO TVP3026_XPLLADDR, 0x3F);
  619 + outTi3026(minfo, TVP3026_XPLLADDR, 0x3F);
613 620 for (tmout = 500000; tmout; --tmout) {
614   - if (inTi3026(PMINFO TVP3026_XPIXPLLDATA) & 0x40)
  621 + if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40)
615 622 break;
616 623 udelay(10);
617 624 }
618 625  
619 626  
620 627  
... ... @@ -624,18 +631,18 @@
624 631 dprintk(KERN_INFO "PixelPLL: %d\n", 500000-tmout);
625 632 CRITBEGIN
626 633 }
627   - outTi3026(PMINFO TVP3026_XMEMPLLCTRL, hw->DACreg[POS3026_XMEMPLLCTRL]);
628   - outTi3026(PMINFO TVP3026_XPLLADDR, 0x00);
  634 + outTi3026(minfo, TVP3026_XMEMPLLCTRL, hw->DACreg[POS3026_XMEMPLLCTRL]);
  635 + outTi3026(minfo, TVP3026_XPLLADDR, 0x00);
629 636 for (i = 3; i < 6; i++)
630   - outTi3026(PMINFO TVP3026_XLOOPPLLDATA, hw->DACclk[i]);
  637 + outTi3026(minfo, TVP3026_XLOOPPLLDATA, hw->DACclk[i]);
631 638 CRITEND
632 639 if ((hw->MiscOutReg & 0x08) && ((hw->DACclk[5] & 0x80) == 0x80)) {
633 640 int tmout;
634 641  
635 642 CRITBEGIN
636   - outTi3026(PMINFO TVP3026_XPLLADDR, 0x3F);
  643 + outTi3026(minfo, TVP3026_XPLLADDR, 0x3F);
637 644 for (tmout = 500000; tmout; --tmout) {
638   - if (inTi3026(PMINFO TVP3026_XLOOPPLLDATA) & 0x40)
  645 + if (inTi3026(minfo, TVP3026_XLOOPPLLDATA) & 0x40)
639 646 break;
640 647 udelay(10);
641 648 }
642 649  
643 650  
... ... @@ -660,18 +667,19 @@
660 667 #endif
661 668 }
662 669  
663   -static void Ti3026_reset(WPMINFO2) {
664   -
  670 +static void Ti3026_reset(struct matrox_fb_info *minfo)
  671 +{
665 672 DBG(__func__)
666 673  
667   - ti3026_ramdac_init(PMINFO2);
  674 + ti3026_ramdac_init(minfo);
668 675 }
669 676  
670 677 static struct matrox_altout ti3026_output = {
671 678 .name = "Primary output",
672 679 };
673 680  
674   -static int Ti3026_preinit(WPMINFO2) {
  681 +static int Ti3026_preinit(struct matrox_fb_info *minfo)
  682 +{
675 683 static const int vxres_mill2[] = { 512, 640, 768, 800, 832, 960,
676 684 1024, 1152, 1280, 1600, 1664, 1920,
677 685 2048, 0};
678 686  
679 687  
680 688  
... ... @@ -706,19 +714,19 @@
706 714 hw->MXoptionReg |= 0x20000000;
707 715 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg);
708 716  
709   - minfo->accel.ramdac_rev = inTi3026(PMINFO TVP3026_XSILICONREV);
  717 + minfo->accel.ramdac_rev = inTi3026(minfo, TVP3026_XSILICONREV);
710 718  
711   - outTi3026(PMINFO TVP3026_XCLKCTRL, TVP3026_XCLKCTRL_SRC_CLK0VGA | TVP3026_XCLKCTRL_CLKSTOPPED);
712   - outTi3026(PMINFO TVP3026_XTRUECOLORCTRL, TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR);
713   - outTi3026(PMINFO TVP3026_XMUXCTRL, TVP3026_XMUXCTRL_VGA);
  719 + outTi3026(minfo, TVP3026_XCLKCTRL, TVP3026_XCLKCTRL_SRC_CLK0VGA | TVP3026_XCLKCTRL_CLKSTOPPED);
  720 + outTi3026(minfo, TVP3026_XTRUECOLORCTRL, TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR);
  721 + outTi3026(minfo, TVP3026_XMUXCTRL, TVP3026_XMUXCTRL_VGA);
714 722  
715   - outTi3026(PMINFO TVP3026_XPLLADDR, 0x2A);
716   - outTi3026(PMINFO TVP3026_XLOOPPLLDATA, 0x00);
717   - outTi3026(PMINFO TVP3026_XPIXPLLDATA, 0x00);
  723 + outTi3026(minfo, TVP3026_XPLLADDR, 0x2A);
  724 + outTi3026(minfo, TVP3026_XLOOPPLLDATA, 0x00);
  725 + outTi3026(minfo, TVP3026_XPIXPLLDATA, 0x00);
718 726  
719 727 mga_outb(M_MISC_REG, 0x67);
720 728  
721   - outTi3026(PMINFO TVP3026_XMEMPLLCTRL, TVP3026_XMEMPLLCTRL_STROBEMKC4 | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL);
  729 + outTi3026(minfo, TVP3026_XMEMPLLCTRL, TVP3026_XMEMPLLCTRL_STROBEMKC4 | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL);
722 730  
723 731 mga_outl(M_RESET, 1);
724 732 udelay(250);
drivers/video/matrox/matroxfb_accel.c
Diff comments   View file @ 316b4d6
... ... @@ -107,7 +107,8 @@
107 107 static void matroxfb_cfb4_fillrect(struct fb_info* info, const struct fb_fillrect* rect);
108 108 static void matroxfb_cfb4_copyarea(struct fb_info* info, const struct fb_copyarea* area);
109 109  
110   -void matrox_cfbX_init(WPMINFO2) {
  110 +void matrox_cfbX_init(struct matrox_fb_info *minfo)
  111 +{
111 112 u_int32_t maccess;
112 113 u_int32_t mpitch;
113 114 u_int32_t mopmode;
... ... @@ -195,7 +196,9 @@
195 196  
196 197 EXPORT_SYMBOL(matrox_cfbX_init);
197 198  
198   -static void matrox_accel_bmove(WPMINFO int vxres, int sy, int sx, int dy, int dx, int height, int width) {
  199 +static void matrox_accel_bmove(struct matrox_fb_info *minfo, int vxres, int sy,
  200 + int sx, int dy, int dx, int height, int width)
  201 +{
199 202 int start, end;
200 203 CRITFLAGS
201 204  
... ... @@ -231,7 +234,10 @@
231 234 CRITEND
232 235 }
233 236  
234   -static void matrox_accel_bmove_lin(WPMINFO int vxres, int sy, int sx, int dy, int dx, int height, int width) {
  237 +static void matrox_accel_bmove_lin(struct matrox_fb_info *minfo, int vxres,
  238 + int sy, int sx, int dy, int dx, int height,
  239 + int width)
  240 +{
235 241 int start, end;
236 242 CRITFLAGS
237 243  
238 244  
239 245  
... ... @@ -274,17 +280,18 @@
274 280 if ((area->sx | area->dx | area->width) & 1)
275 281 cfb_copyarea(info, area);
276 282 else
277   - matrox_accel_bmove_lin(PMINFO minfo->fbcon.var.xres_virtual >> 1, area->sy, area->sx >> 1, area->dy, area->dx >> 1, area->height, area->width >> 1);
  283 + matrox_accel_bmove_lin(minfo, minfo->fbcon.var.xres_virtual >> 1, area->sy, area->sx >> 1, area->dy, area->dx >> 1, area->height, area->width >> 1);
278 284 }
279 285  
280 286 static void matroxfb_copyarea(struct fb_info* info, const struct fb_copyarea* area) {
281 287 MINFO_FROM_INFO(info);
282 288  
283   - matrox_accel_bmove(PMINFO minfo->fbcon.var.xres_virtual, area->sy, area->sx, area->dy, area->dx, area->height, area->width);
  289 + matrox_accel_bmove(minfo, minfo->fbcon.var.xres_virtual, area->sy, area->sx, area->dy, area->dx, area->height, area->width);
284 290 }
285 291  
286   -static void matroxfb_accel_clear(WPMINFO u_int32_t color, int sy, int sx, int height,
287   - int width) {
  292 +static void matroxfb_accel_clear(struct matrox_fb_info *minfo, u_int32_t color,
  293 + int sy, int sx, int height, int width)
  294 +{
288 295 CRITFLAGS
289 296  
290 297 DBG(__func__)
291 298  
... ... @@ -306,12 +313,14 @@
306 313  
307 314 switch (rect->rop) {
308 315 case ROP_COPY:
309   - matroxfb_accel_clear(PMINFO ((u_int32_t*)info->pseudo_palette)[rect->color], rect->dy, rect->dx, rect->height, rect->width);
  316 + matroxfb_accel_clear(minfo, ((u_int32_t *)info->pseudo_palette)[rect->color], rect->dy, rect->dx, rect->height, rect->width);
310 317 break;
311 318 }
312 319 }
313 320  
314   -static void matroxfb_cfb4_clear(WPMINFO u_int32_t bgx, int sy, int sx, int height, int width) {
  321 +static void matroxfb_cfb4_clear(struct matrox_fb_info *minfo, u_int32_t bgx,
  322 + int sy, int sx, int height, int width)
  323 +{
315 324 int whattodo;
316 325 CRITFLAGS
317 326  
318 327  
... ... @@ -371,13 +380,15 @@
371 380  
372 381 switch (rect->rop) {
373 382 case ROP_COPY:
374   - matroxfb_cfb4_clear(PMINFO ((u_int32_t*)info->pseudo_palette)[rect->color], rect->dy, rect->dx, rect->height, rect->width);
  383 + matroxfb_cfb4_clear(minfo, ((u_int32_t *)info->pseudo_palette)[rect->color], rect->dy, rect->dx, rect->height, rect->width);
375 384 break;
376 385 }
377 386 }
378 387  
379   -static void matroxfb_1bpp_imageblit(WPMINFO u_int32_t fgx, u_int32_t bgx,
380   - const u_int8_t* chardata, int width, int height, int yy, int xx) {
  388 +static void matroxfb_1bpp_imageblit(struct matrox_fb_info *minfo, u_int32_t fgx,
  389 + u_int32_t bgx, const u_int8_t *chardata,
  390 + int width, int height, int yy, int xx)
  391 +{
381 392 u_int32_t step;
382 393 u_int32_t ydstlen;
383 394 u_int32_t xlen;
... ... @@ -476,7 +487,7 @@
476 487  
477 488 fgx = ((u_int32_t*)info->pseudo_palette)[image->fg_color];
478 489 bgx = ((u_int32_t*)info->pseudo_palette)[image->bg_color];
479   - matroxfb_1bpp_imageblit(PMINFO fgx, bgx, image->data, image->width, image->height, image->dy, image->dx);
  490 + matroxfb_1bpp_imageblit(minfo, fgx, bgx, image->data, image->width, image->height, image->dy, image->dx);
480 491 } else {
481 492 /* Danger! image->depth is useless: logo painting code always
482 493 passes framebuffer color depth here, although logo data are
drivers/video/matrox/matroxfb_accel.h
Diff comments   View file @ 316b4d6
... ... @@ -3,7 +3,7 @@
3 3  
4 4 #include "matroxfb_base.h"
5 5  
6   -void matrox_cfbX_init(WPMINFO2);
  6 +void matrox_cfbX_init(struct matrox_fb_info *minfo);
7 7  
8 8 #endif
drivers/video/matrox/matroxfb_base.c
Diff comments   View file @ 316b4d6
... ... @@ -154,7 +154,8 @@
154 154  
155 155  
156 156 /* --------------------------------------------------------------------- */
157   -static void update_crtc2(WPMINFO unsigned int pos) {
  157 +static void update_crtc2(struct matrox_fb_info *minfo, unsigned int pos)
  158 +{
158 159 struct matroxfb_dh_fb_info *info = minfo->crtc2.info;
159 160  
160 161 /* Make sure that displays are compatible */
... ... @@ -177,7 +178,8 @@
177 178 }
178 179 }
179 180  
180   -static void matroxfb_crtc1_panpos(WPMINFO2) {
  181 +static void matroxfb_crtc1_panpos(struct matrox_fb_info *minfo)
  182 +{
181 183 if (minfo->crtc1.panpos >= 0) {
182 184 unsigned long flags;
183 185 int panpos;
... ... @@ -210,7 +212,7 @@
210 212 if (status & 0x20) {
211 213 mga_outl(M_ICLEAR, 0x20);
212 214 minfo->crtc1.vsync.cnt++;
213   - matroxfb_crtc1_panpos(PMINFO2);
  215 + matroxfb_crtc1_panpos(minfo);
214 216 wake_up_interruptible(&minfo->crtc1.vsync.wait);
215 217 handled = 1;
216 218 }
... ... @@ -223,7 +225,8 @@
223 225 return IRQ_RETVAL(handled);
224 226 }
225 227  
226   -int matroxfb_enable_irq(WPMINFO int reenable) {
  228 +int matroxfb_enable_irq(struct matrox_fb_info *minfo, int reenable)
  229 +{
227 230 u_int32_t bm;
228 231  
229 232 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
230 233  
... ... @@ -252,10 +255,11 @@
252 255 return 0;
253 256 }
254 257  
255   -static void matroxfb_disable_irq(WPMINFO2) {
  258 +static void matroxfb_disable_irq(struct matrox_fb_info *minfo)
  259 +{
256 260 if (test_and_clear_bit(0, &minfo->irq_flags)) {
257 261 /* Flush pending pan-at-vbl request... */
258   - matroxfb_crtc1_panpos(PMINFO2);
  262 + matroxfb_crtc1_panpos(minfo);
259 263 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
260 264 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
261 265 else
... ... @@ -264,7 +268,8 @@
264 268 }
265 269 }
266 270  
267   -int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc) {
  271 +int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc)
  272 +{
268 273 struct matrox_vsync *vs;
269 274 unsigned int cnt;
270 275 int ret;
... ... @@ -282,7 +287,7 @@
282 287 default:
283 288 return -ENODEV;
284 289 }
285   - ret = matroxfb_enable_irq(PMINFO 0);
  290 + ret = matroxfb_enable_irq(minfo, 0);
286 291 if (ret) {
287 292 return ret;
288 293 }
... ... @@ -293,7 +298,7 @@
293 298 return ret;
294 299 }
295 300 if (ret == 0) {
296   - matroxfb_enable_irq(PMINFO 1);
  301 + matroxfb_enable_irq(minfo, 1);
297 302 return -ETIMEDOUT;
298 303 }
299 304 return 0;
... ... @@ -301,7 +306,9 @@
301 306  
302 307 /* --------------------------------------------------------------------- */
303 308  
304   -static void matrox_pan_var(WPMINFO struct fb_var_screeninfo *var) {
  309 +static void matrox_pan_var(struct matrox_fb_info *minfo,
  310 + struct fb_var_screeninfo *var)
  311 +{
305 312 unsigned int pos;
306 313 unsigned short p0, p1, p2;
307 314 #ifdef CONFIG_FB_MATROX_32MB
... ... @@ -329,7 +336,7 @@
329 336 #endif
330 337  
331 338 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
332   - vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(PMINFO 0) == 0);
  339 + vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(minfo, 0) == 0);
333 340  
334 341 CRITBEGIN
335 342  
336 343  
... ... @@ -349,12 +356,13 @@
349 356 }
350 357 matroxfb_DAC_unlock_irqrestore(flags);
351 358  
352   - update_crtc2(PMINFO pos);
  359 + update_crtc2(minfo, pos);
353 360  
354 361 CRITEND
355 362 }
356 363  
357   -static void matroxfb_remove(WPMINFO int dummy) {
  364 +static void matroxfb_remove(struct matrox_fb_info *minfo, int dummy)
  365 +{
358 366 /* Currently we are holding big kernel lock on all dead & usecount updates.
359 367 * Destroy everything after all users release it. Especially do not unregister
360 368 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
... ... @@ -370,7 +378,7 @@
370 378 }
371 379 matroxfb_unregister_device(minfo);
372 380 unregister_framebuffer(&minfo->fbcon);
373   - matroxfb_g450_shutdown(PMINFO2);
  381 + matroxfb_g450_shutdown(minfo);
374 382 #ifdef CONFIG_MTRR
375 383 if (minfo->mtrr.vram_valid)
376 384 mtrr_del(minfo->mtrr.vram, minfo->video.base, minfo->video.len);
377 385  
... ... @@ -410,11 +418,11 @@
410 418  
411 419 if (user) {
412 420 if (0 == --minfo->userusecount) {
413   - matroxfb_disable_irq(PMINFO2);
  421 + matroxfb_disable_irq(minfo);
414 422 }
415 423 }
416 424 if (!(--minfo->usecount) && minfo->dead) {
417   - matroxfb_remove(PMINFO 0);
  425 + matroxfb_remove(minfo, 0);
418 426 }
419 427 return(0);
420 428 }
421 429  
... ... @@ -425,11 +433,13 @@
425 433  
426 434 DBG(__func__)
427 435  
428   - matrox_pan_var(PMINFO var);
  436 + matrox_pan_var(minfo, var);
429 437 return 0;
430 438 }
431 439  
432   -static int matroxfb_get_final_bppShift(CPMINFO int bpp) {
  440 +static int matroxfb_get_final_bppShift(const struct matrox_fb_info *minfo,
  441 + int bpp)
  442 +{
433 443 int bppshft2;
434 444  
435 445 DBG(__func__)
... ... @@ -445,7 +455,9 @@
445 455 return bppshft2;
446 456 }
447 457  
448   -static int matroxfb_test_and_set_rounding(CPMINFO int xres, int bpp) {
  458 +static int matroxfb_test_and_set_rounding(const struct matrox_fb_info *minfo,
  459 + int xres, int bpp)
  460 +{
449 461 int over;
450 462 int rounding;
451 463  
... ... @@ -476,7 +488,9 @@
476 488 return xres;
477 489 }
478 490  
479   -static int matroxfb_pitch_adjust(CPMINFO int xres, int bpp) {
  491 +static int matroxfb_pitch_adjust(const struct matrox_fb_info *minfo, int xres,
  492 + int bpp)
  493 +{
480 494 const int* width;
481 495 int xres_new;
482 496  
483 497  
... ... @@ -488,14 +502,14 @@
488 502  
489 503 if (minfo->devflags.precise_width) {
490 504 while (*width) {
491   - if ((*width >= xres) && (matroxfb_test_and_set_rounding(PMINFO *width, bpp) == *width)) {
  505 + if ((*width >= xres) && (matroxfb_test_and_set_rounding(minfo, *width, bpp) == *width)) {
492 506 break;
493 507 }
494 508 width++;
495 509 }
496 510 xres_new = *width;
497 511 } else {
498   - xres_new = matroxfb_test_and_set_rounding(PMINFO xres, bpp);
  512 + xres_new = matroxfb_test_and_set_rounding(minfo, xres, bpp);
499 513 }
500 514 return xres_new;
501 515 }
... ... @@ -522,7 +536,10 @@
522 536 return 16; /* return something reasonable... or panic()? */
523 537 }
524 538  
525   -static int matroxfb_decode_var(CPMINFO struct fb_var_screeninfo *var, int *visual, int *video_cmap_len, unsigned int* ydstorg) {
  539 +static int matroxfb_decode_var(const struct matrox_fb_info *minfo,
  540 + struct fb_var_screeninfo *var, int *visual,
  541 + int *video_cmap_len, unsigned int* ydstorg)
  542 +{
526 543 struct RGBT {
527 544 unsigned char bpp;
528 545 struct {
... ... @@ -564,7 +581,7 @@
564 581 if (var->xres_virtual < var->xres)
565 582 var->xres_virtual = var->xres;
566 583  
567   - var->xres_virtual = matroxfb_pitch_adjust(PMINFO var->xres_virtual, bpp);
  584 + var->xres_virtual = matroxfb_pitch_adjust(minfo, var->xres_virtual, bpp);
568 585 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
569 586 if (memlen > vramlen) {
570 587 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
... ... @@ -700,7 +717,7 @@
700 717 return 0;
701 718 }
702 719  
703   -static void matroxfb_init_fix(WPMINFO2)
  720 +static void matroxfb_init_fix(struct matrox_fb_info *minfo)
704 721 {
705 722 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
706 723 DBG(__func__)
... ... @@ -715,7 +732,7 @@
715 732 fix->accel = minfo->devflags.accelerator;
716 733 }
717 734  
718   -static void matroxfb_update_fix(WPMINFO2)
  735 +static void matroxfb_update_fix(struct matrox_fb_info *minfo)
719 736 {
720 737 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
721 738 DBG(__func__)
... ... @@ -737,7 +754,7 @@
737 754 if (minfo->dead) {
738 755 return -ENXIO;
739 756 }
740   - if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
  757 + if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
741 758 return err;
742 759 return 0;
743 760 }
744 761  
... ... @@ -758,10 +775,10 @@
758 775 }
759 776  
760 777 var = &info->var;
761   - if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
  778 + if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
762 779 return err;
763 780 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase) + ydstorg;
764   - matroxfb_update_fix(PMINFO2);
  781 + matroxfb_update_fix(minfo);
765 782 minfo->fbcon.fix.visual = visual;
766 783 minfo->fbcon.fix.type = FB_TYPE_PACKED_PIXELS;
767 784 minfo->fbcon.fix.type_aux = 0;
... ... @@ -777,7 +794,7 @@
777 794 minfo->curr.ydstorg.pixels = ydstorg;
778 795 else
779 796 minfo->curr.ydstorg.pixels = (ydstorg * 8) / var->bits_per_pixel;
780   - minfo->curr.final_bppShift = matroxfb_get_final_bppShift(PMINFO var->bits_per_pixel);
  797 + minfo->curr.final_bppShift = matroxfb_get_final_bppShift(minfo, var->bits_per_pixel);
781 798 { struct my_timming mt;
782 799 struct matrox_hw_state* hw;
783 800 int out;
... ... @@ -805,7 +822,7 @@
805 822 up_read(&minfo->altout.lock);
806 823 minfo->crtc1.pixclock = mt.pixclock;
807 824 minfo->crtc1.mnp = mt.mnp;
808   - minfo->hw_switch->init(PMINFO &mt);
  825 + minfo->hw_switch->init(minfo, &mt);
809 826 pos = (var->yoffset * var->xres_virtual + var->xoffset) * minfo->curr.final_bppShift / 32;
810 827 pos += minfo->curr.ydstorg.chunks;
811 828  
... ... @@ -813,8 +830,8 @@
813 830 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
814 831 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
815 832 hw->CRTCEXT[8] = pos >> 21;
816   - minfo->hw_switch->restore(PMINFO2);
817   - update_crtc2(PMINFO pos);
  833 + minfo->hw_switch->restore(minfo);
  834 + update_crtc2(minfo, pos);
818 835 down_read(&minfo->altout.lock);
819 836 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
820 837 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
821 838  
822 839  
... ... @@ -829,18 +846,19 @@
829 846 }
830 847 }
831 848 up_read(&minfo->altout.lock);
832   - matrox_cfbX_init(PMINFO2);
  849 + matrox_cfbX_init(minfo);
833 850 }
834 851 }
835 852 minfo->initialized = 1;
836 853 return 0;
837 854 }
838 855  
839   -static int matroxfb_get_vblank(WPMINFO struct fb_vblank *vblank)
  856 +static int matroxfb_get_vblank(struct matrox_fb_info *minfo,
  857 + struct fb_vblank *vblank)
840 858 {
841 859 unsigned int sts1;
842 860  
843   - matroxfb_enable_irq(PMINFO 0);
  861 + matroxfb_enable_irq(minfo, 0);
844 862 memset(vblank, 0, sizeof(*vblank));
845 863 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
846 864 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
... ... @@ -886,7 +904,7 @@
886 904 struct fb_vblank vblank;
887 905 int err;
888 906  
889   - err = matroxfb_get_vblank(PMINFO &vblank);
  907 + err = matroxfb_get_vblank(minfo, &vblank);
890 908 if (err)
891 909 return err;
892 910 if (copy_to_user(argp, &vblank, sizeof(vblank)))
... ... @@ -900,7 +918,7 @@
900 918 if (get_user(crt, (u_int32_t __user *)arg))
901 919 return -EFAULT;
902 920  
903   - return matroxfb_wait_for_sync(PMINFO crt);
  921 + return matroxfb_wait_for_sync(minfo, crt);
904 922 }
905 923 case MATROXFB_SET_OUTPUT_MODE:
906 924 {
... ... @@ -1277,7 +1295,9 @@
1277 1295 static char videomode[64]; /* "matrox:mode:xxxxx" or "matrox:xxxxx" */
1278 1296 #endif
1279 1297  
1280   -static int matroxfb_getmemory(WPMINFO unsigned int maxSize, unsigned int *realSize){
  1298 +static int matroxfb_getmemory(struct matrox_fb_info *minfo,
  1299 + unsigned int maxSize, unsigned int *realSize)
  1300 +{
1281 1301 vaddr_t vm;
1282 1302 unsigned int offs;
1283 1303 unsigned int offs2;
... ... @@ -1554,7 +1574,8 @@
1554 1574  
1555 1575 static int hotplug = 0;
1556 1576  
1557   -static void setDefaultOutputs(WPMINFO2) {
  1577 +static void setDefaultOutputs(struct matrox_fb_info *minfo)
  1578 +{
1558 1579 unsigned int i;
1559 1580 const char* ptr;
1560 1581  
... ... @@ -1587,7 +1608,8 @@
1587 1608 outputs[0] = 0;
1588 1609 }
1589 1610  
1590   -static int initMatrox2(WPMINFO struct board* b){
  1611 +static int initMatrox2(struct matrox_fb_info *minfo, struct board *b)
  1612 +{
1591 1613 unsigned long ctrlptr_phys = 0;
1592 1614 unsigned long video_base_phys = 0;
1593 1615 unsigned int memsize;
... ... @@ -1636,7 +1658,7 @@
1636 1658 minfo->devflags.g450dac = (b->flags & DEVF_G450DAC) != 0;
1637 1659 minfo->devflags.textstep = minfo->devflags.vgastep * minfo->devflags.textmode;
1638 1660 minfo->devflags.textvram = 65536 / minfo->devflags.textmode;
1639   - setDefaultOutputs(PMINFO2);
  1661 + setDefaultOutputs(minfo);
1640 1662 if (b->flags & DEVF_PANELLINK_CAPABLE) {
1641 1663 minfo->outputs[2].data = minfo;
1642 1664 minfo->outputs[2].output = &panellink_output;
1643 1665  
... ... @@ -1719,13 +1741,13 @@
1719 1741 }
1720 1742  
1721 1743 err = -ENXIO;
1722   - matroxfb_read_pins(PMINFO2);
1723   - if (minfo->hw_switch->preinit(PMINFO2)) {
  1744 + matroxfb_read_pins(minfo);
  1745 + if (minfo->hw_switch->preinit(minfo)) {
1724 1746 goto failVideoIO;
1725 1747 }
1726 1748  
1727 1749 err = -ENOMEM;
1728   - if (!matroxfb_getmemory(PMINFO memsize, &minfo->video.len) || !minfo->video.len) {
  1750 + if (!matroxfb_getmemory(minfo, memsize, &minfo->video.len) || !minfo->video.len) {
1729 1751 printk(KERN_ERR "matroxfb: cannot determine memory size\n");
1730 1752 goto failVideoIO;
1731 1753 }
... ... @@ -1745,8 +1767,8 @@
1745 1767  
1746 1768 if (!minfo->devflags.novga)
1747 1769 request_region(0x3C0, 32, "matrox");
1748   - matroxfb_g450_connect(PMINFO2);
1749   - minfo->hw_switch->reset(PMINFO2);
  1770 + matroxfb_g450_connect(minfo);
  1771 + minfo->hw_switch->reset(minfo);
1750 1772  
1751 1773 minfo->fbcon.monspecs.hfmin = 0;
1752 1774 minfo->fbcon.monspecs.hfmax = fh;
... ... @@ -1870,7 +1892,7 @@
1870 1892 vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough
1871 1893 to yres_virtual * xres_virtual < 2^32 */
1872 1894 }
1873   - matroxfb_init_fix(PMINFO2);
  1895 + matroxfb_init_fix(minfo);
1874 1896 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase);
1875 1897 /* Normalize values (namely yres_virtual) */
1876 1898 matroxfb_check_var(&vesafb_defined, &minfo->fbcon);
... ... @@ -1910,7 +1932,7 @@
1910 1932  
1911 1933 return 0;
1912 1934 failVideoIO:;
1913   - matroxfb_g450_shutdown(PMINFO2);
  1935 + matroxfb_g450_shutdown(minfo);
1914 1936 mga_iounmap(minfo->video.vbase);
1915 1937 failCtrlIO:;
1916 1938 mga_iounmap(minfo->mmio.vbase);
... ... @@ -2075,7 +2097,7 @@
2075 2097 init_waitqueue_head(&minfo->crtc2.vsync.wait);
2076 2098 minfo->crtc1.panpos = -1;
2077 2099  
2078   - err = initMatrox2(PMINFO b);
  2100 + err = initMatrox2(minfo, b);
2079 2101 if (!err) {
2080 2102 matroxfb_register_device(minfo);
2081 2103 return 0;
... ... @@ -2088,7 +2110,7 @@
2088 2110 struct matrox_fb_info* minfo;
2089 2111  
2090 2112 minfo = pci_get_drvdata(pdev);
2091   - matroxfb_remove(PMINFO 1);
  2113 + matroxfb_remove(minfo, 1);
2092 2114 }
2093 2115  
2094 2116 static struct pci_device_id matroxfb_devices[] = {
drivers/video/matrox/matroxfb_base.h
Diff comments   View file @ 316b4d6
... ... @@ -524,22 +524,15 @@
524 524  
525 525 #define info2minfo(info) container_of(info, struct matrox_fb_info, fbcon)
526 526  
527   -#define WPMINFO2 struct matrox_fb_info* minfo
528   -#define WPMINFO WPMINFO2 ,
529   -#define CPMINFO2 const struct matrox_fb_info* minfo
530   -#define CPMINFO CPMINFO2 ,
531   -#define PMINFO2 minfo
532   -#define PMINFO PMINFO2 ,
533   -
534 527 #define MINFO_FROM(x) struct matrox_fb_info* minfo = x
535 528  
536 529 #define MINFO_FROM_INFO(x) MINFO_FROM(info2minfo(x))
537 530  
538 531 struct matrox_switch {
539   - int (*preinit)(WPMINFO2);
540   - void (*reset)(WPMINFO2);
541   - int (*init)(WPMINFO struct my_timming*);
542   - void (*restore)(WPMINFO2);
  532 + int (*preinit)(struct matrox_fb_info *minfo);
  533 + void (*reset)(struct matrox_fb_info *minfo);
  534 + int (*init)(struct matrox_fb_info *minfo, struct my_timming*);
  535 + void (*restore)(struct matrox_fb_info *minfo);
543 536 };
544 537  
545 538 struct matroxfb_driver {
546 539  
... ... @@ -729,11 +722,12 @@
729 722 #define matroxfb_DAC_unlock() spin_unlock(&minfo->lock.DAC)
730 723 #define matroxfb_DAC_lock_irqsave(flags) spin_lock_irqsave(&minfo->lock.DAC, flags)
731 724 #define matroxfb_DAC_unlock_irqrestore(flags) spin_unlock_irqrestore(&minfo->lock.DAC, flags)
732   -extern void matroxfb_DAC_out(CPMINFO int reg, int val);
733   -extern int matroxfb_DAC_in(CPMINFO int reg);
  725 +extern void matroxfb_DAC_out(const struct matrox_fb_info *minfo, int reg,
  726 + int val);
  727 +extern int matroxfb_DAC_in(const struct matrox_fb_info *minfo, int reg);
734 728 extern void matroxfb_var2my(struct fb_var_screeninfo* fvsi, struct my_timming* mt);
735   -extern int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc);
736   -extern int matroxfb_enable_irq(WPMINFO int reenable);
  729 +extern int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc);
  730 +extern int matroxfb_enable_irq(struct matrox_fb_info *minfo, int reenable);
737 731  
738 732 #ifdef MATROXFB_USE_SPINLOCKS
739 733 #define CRITBEGIN spin_lock_irqsave(&minfo->lock.accel, critflags);
drivers/video/matrox/matroxfb_crtc2.c
Diff comments   View file @ 316b4d6
... ... @@ -369,8 +369,8 @@
369 369 } else {
370 370 matroxfb_dh_disable(m2info);
371 371 }
372   - DAC1064_global_init(PMINFO2);
373   - DAC1064_global_restore(PMINFO2);
  372 + DAC1064_global_init(minfo);
  373 + DAC1064_global_restore(minfo);
374 374 down_read(&minfo->altout.lock);
375 375 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
376 376 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC2 &&
... ... @@ -401,7 +401,7 @@
401 401 static int matroxfb_dh_get_vblank(const struct matroxfb_dh_fb_info* m2info, struct fb_vblank* vblank) {
402 402 MINFO_FROM(m2info->primary_dev);
403 403  
404   - matroxfb_enable_irq(PMINFO 0);
  404 + matroxfb_enable_irq(minfo, 0);
405 405 memset(vblank, 0, sizeof(*vblank));
406 406 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VBLANK;
407 407 /* mask out reserved bits + field number (odd/even) */
... ... @@ -449,7 +449,7 @@
449 449  
450 450 if (crt != 0)
451 451 return -ENODEV;
452   - return matroxfb_wait_for_sync(PMINFO 1);
  452 + return matroxfb_wait_for_sync(minfo, 1);
453 453 }
454 454 case MATROXFB_SET_OUTPUT_MODE:
455 455 case MATROXFB_GET_OUTPUT_MODE:
... ... @@ -595,7 +595,9 @@
595 595 0, {0,0,0,0,0}
596 596 };
597 597  
598   -static int matroxfb_dh_regit(CPMINFO struct matroxfb_dh_fb_info* m2info) {
  598 +static int matroxfb_dh_regit(const struct matrox_fb_info *minfo,
  599 + struct matroxfb_dh_fb_info *m2info)
  600 +{
599 601 #define minfo (m2info->primary_dev)
600 602 void* oldcrtc2;
601 603  
... ... @@ -649,7 +651,7 @@
649 651  
650 652 static int matroxfb_dh_registerfb(struct matroxfb_dh_fb_info* m2info) {
651 653 #define minfo (m2info->primary_dev)
652   - if (matroxfb_dh_regit(PMINFO m2info)) {
  654 + if (matroxfb_dh_regit(minfo, m2info)) {
653 655 printk(KERN_ERR "matroxfb_crtc2: secondary head failed to register\n");
654 656 return -1;
655 657 }
drivers/video/matrox/matroxfb_g450.c
Diff comments   View file @ 316b4d6
... ... @@ -80,50 +80,57 @@
80 80 return -EINVAL;
81 81 }
82 82  
83   -static inline int* get_ctrl_ptr(WPMINFO unsigned int idx) {
  83 +static inline int *get_ctrl_ptr(struct matrox_fb_info *minfo, unsigned int idx)
  84 +{
84 85 return (int*)((char*)minfo + g450_controls[idx].control);
85 86 }
86 87  
87   -static void tvo_fill_defaults(WPMINFO2) {
  88 +static void tvo_fill_defaults(struct matrox_fb_info *minfo)
  89 +{
88 90 unsigned int i;
89 91  
90 92 for (i = 0; i < G450CTRLS; i++) {
91   - *get_ctrl_ptr(PMINFO i) = g450_controls[i].desc.default_value;
  93 + *get_ctrl_ptr(minfo, i) = g450_controls[i].desc.default_value;
92 94 }
93 95 }
94 96  
95   -static int cve2_get_reg(WPMINFO int reg) {
  97 +static int cve2_get_reg(struct matrox_fb_info *minfo, int reg)
  98 +{
96 99 unsigned long flags;
97 100 int val;
98 101  
99 102 matroxfb_DAC_lock_irqsave(flags);
100   - matroxfb_DAC_out(PMINFO 0x87, reg);
101   - val = matroxfb_DAC_in(PMINFO 0x88);
  103 + matroxfb_DAC_out(minfo, 0x87, reg);
  104 + val = matroxfb_DAC_in(minfo, 0x88);
102 105 matroxfb_DAC_unlock_irqrestore(flags);
103 106 return val;
104 107 }
105 108  
106   -static void cve2_set_reg(WPMINFO int reg, int val) {
  109 +static void cve2_set_reg(struct matrox_fb_info *minfo, int reg, int val)
  110 +{
107 111 unsigned long flags;
108 112  
109 113 matroxfb_DAC_lock_irqsave(flags);
110   - matroxfb_DAC_out(PMINFO 0x87, reg);
111   - matroxfb_DAC_out(PMINFO 0x88, val);
  114 + matroxfb_DAC_out(minfo, 0x87, reg);
  115 + matroxfb_DAC_out(minfo, 0x88, val);
112 116 matroxfb_DAC_unlock_irqrestore(flags);
113 117 }
114 118  
115   -static void cve2_set_reg10(WPMINFO int reg, int val) {
  119 +static void cve2_set_reg10(struct matrox_fb_info *minfo, int reg, int val)
  120 +{
116 121 unsigned long flags;
117 122  
118 123 matroxfb_DAC_lock_irqsave(flags);
119   - matroxfb_DAC_out(PMINFO 0x87, reg);
120   - matroxfb_DAC_out(PMINFO 0x88, val >> 2);
121   - matroxfb_DAC_out(PMINFO 0x87, reg + 1);
122   - matroxfb_DAC_out(PMINFO 0x88, val & 3);
  124 + matroxfb_DAC_out(minfo, 0x87, reg);
  125 + matroxfb_DAC_out(minfo, 0x88, val >> 2);
  126 + matroxfb_DAC_out(minfo, 0x87, reg + 1);
  127 + matroxfb_DAC_out(minfo, 0x88, val & 3);
123 128 matroxfb_DAC_unlock_irqrestore(flags);
124 129 }
125 130  
126   -static void g450_compute_bwlevel(CPMINFO int *bl, int *wl) {
  131 +static void g450_compute_bwlevel(const struct matrox_fb_info *minfo, int *bl,
  132 + int *wl)
  133 +{
127 134 const int b = minfo->altout.tvo_params.brightness + BLMIN;
128 135 const int c = minfo->altout.tvo_params.contrast;
129 136  
... ... @@ -162,7 +169,7 @@
162 169 /*
163 170 * Check if changed.
164 171 */
165   - if (p->value == *get_ctrl_ptr(PMINFO i)) return 0;
  172 + if (p->value == *get_ctrl_ptr(minfo, i)) return 0;
166 173  
167 174 /*
168 175 * Check limits.
169 176  
170 177  
171 178  
172 179  
173 180  
... ... @@ -173,31 +180,31 @@
173 180 /*
174 181 * Store new value.
175 182 */
176   - *get_ctrl_ptr(PMINFO i) = p->value;
  183 + *get_ctrl_ptr(minfo, i) = p->value;
177 184  
178 185 switch (p->id) {
179 186 case V4L2_CID_BRIGHTNESS:
180 187 case V4L2_CID_CONTRAST:
181 188 {
182 189 int blacklevel, whitelevel;
183   - g450_compute_bwlevel(PMINFO &blacklevel, &whitelevel);
184   - cve2_set_reg10(PMINFO 0x0e, blacklevel);
185   - cve2_set_reg10(PMINFO 0x1e, whitelevel);
  190 + g450_compute_bwlevel(minfo, &blacklevel, &whitelevel);
  191 + cve2_set_reg10(minfo, 0x0e, blacklevel);
  192 + cve2_set_reg10(minfo, 0x1e, whitelevel);
186 193 }
187 194 break;
188 195 case V4L2_CID_SATURATION:
189   - cve2_set_reg(PMINFO 0x20, p->value);
190   - cve2_set_reg(PMINFO 0x22, p->value);
  196 + cve2_set_reg(minfo, 0x20, p->value);
  197 + cve2_set_reg(minfo, 0x22, p->value);
191 198 break;
192 199 case V4L2_CID_HUE:
193   - cve2_set_reg(PMINFO 0x25, p->value);
  200 + cve2_set_reg(minfo, 0x25, p->value);
194 201 break;
195 202 case MATROXFB_CID_TESTOUT:
196 203 {
197   - unsigned char val = cve2_get_reg (PMINFO 0x05);
  204 + unsigned char val = cve2_get_reg(minfo, 0x05);
198 205 if (p->value) val |= 0x02;
199 206 else val &= ~0x02;
200   - cve2_set_reg(PMINFO 0x05, val);
  207 + cve2_set_reg(minfo, 0x05, val);
201 208 }
202 209 break;
203 210 }
... ... @@ -212,7 +219,7 @@
212 219  
213 220 i = get_ctrl_id(p->id);
214 221 if (i < 0) return -EINVAL;
215   - p->value = *get_ctrl_ptr(PMINFO i);
  222 + p->value = *get_ctrl_ptr(minfo, i);
216 223 return 0;
217 224 }
218 225  
... ... @@ -226,7 +233,9 @@
226 233 unsigned int v_total;
227 234 };
228 235  
229   -static void computeRegs(WPMINFO struct mavenregs* r, struct my_timming* mt, const struct output_desc* outd) {
  236 +static void computeRegs(struct matrox_fb_info *minfo, struct mavenregs *r,
  237 + struct my_timming *mt, const struct output_desc *outd)
  238 +{
230 239 u_int32_t chromasc;
231 240 u_int32_t hlen;
232 241 u_int32_t hsl;
233 242  
... ... @@ -251,10 +260,10 @@
251 260  
252 261 dprintk(KERN_DEBUG "Want %u kHz pixclock\n", (unsigned int)piic);
253 262  
254   - mnp = matroxfb_g450_setclk(PMINFO piic, M_VIDEO_PLL);
  263 + mnp = matroxfb_g450_setclk(minfo, piic, M_VIDEO_PLL);
255 264  
256 265 mt->mnp = mnp;
257   - mt->pixclock = g450_mnp2f(PMINFO mnp);
  266 + mt->pixclock = g450_mnp2f(minfo, mnp);
258 267  
259 268 dprintk(KERN_DEBUG "MNP=%08X\n", mnp);
260 269  
261 270  
262 271  
... ... @@ -490,20 +499,22 @@
490 499 return;
491 500 }
492 501  
493   -#define LR(x) cve2_set_reg(PMINFO (x), m->regs[(x)])
494   -static void cve2_init_TV(WPMINFO const struct mavenregs* m) {
  502 +#define LR(x) cve2_set_reg(minfo, (x), m->regs[(x)])
  503 +static void cve2_init_TV(struct matrox_fb_info *minfo,
  504 + const struct mavenregs *m)
  505 +{
495 506 int i;
496 507  
497 508 LR(0x80);
498 509 LR(0x82); LR(0x83);
499 510 LR(0x84); LR(0x85);
500 511  
501   - cve2_set_reg(PMINFO 0x3E, 0x01);
  512 + cve2_set_reg(minfo, 0x3E, 0x01);
502 513  
503 514 for (i = 0; i < 0x3E; i++) {
504 515 LR(i);
505 516 }
506   - cve2_set_reg(PMINFO 0x3E, 0x00);
  517 + cve2_set_reg(minfo, 0x3E, 0x00);
507 518 }
508 519  
509 520 static int matroxfb_g450_compute(void* md, struct my_timming* mt) {
... ... @@ -518,7 +529,7 @@
518 529 cve2_init_TVdata(minfo->outputs[1].mode, &minfo->hw.maven, &outd);
519 530 {
520 531 int blacklevel, whitelevel;
521   - g450_compute_bwlevel(PMINFO &blacklevel, &whitelevel);
  532 + g450_compute_bwlevel(minfo, &blacklevel, &whitelevel);
522 533 minfo->hw.maven.regs[0x0E] = blacklevel >> 2;
523 534 minfo->hw.maven.regs[0x0F] = blacklevel & 3;
524 535 minfo->hw.maven.regs[0x1E] = whitelevel >> 2;
525 536  
... ... @@ -533,12 +544,12 @@
533 544 minfo->hw.maven.regs[0x05] |= 0x02;
534 545 }
535 546 }
536   - computeRegs(PMINFO &minfo->hw.maven, mt, outd);
  547 + computeRegs(minfo, &minfo->hw.maven, mt, outd);
537 548 } else if (mt->mnp < 0) {
538 549 /* We must program clocks before CRTC2, otherwise interlaced mode
539 550 startup may fail */
540   - mt->mnp = matroxfb_g450_setclk(PMINFO mt->pixclock, (mt->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL);
541   - mt->pixclock = g450_mnp2f(PMINFO mt->mnp);
  551 + mt->mnp = matroxfb_g450_setclk(minfo, mt->pixclock, (mt->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL);
  552 + mt->pixclock = g450_mnp2f(minfo, mt->mnp);
542 553 }
543 554 dprintk(KERN_DEBUG "Pixclock = %u\n", mt->pixclock);
544 555 return 0;
... ... @@ -548,7 +559,7 @@
548 559 MINFO_FROM(md);
549 560  
550 561 if (minfo->outputs[1].mode != MATROXFB_OUTPUT_MODE_MONITOR) {
551   - cve2_init_TV(PMINFO &minfo->hw.maven);
  562 + cve2_init_TV(minfo, &minfo->hw.maven);
552 563 }
553 564 return 0;
554 565 }
... ... @@ -567,8 +578,8 @@
567 578 MINFO_FROM(md);
568 579  
569 580 if (mt->mnp < 0) {
570   - mt->mnp = matroxfb_g450_setclk(PMINFO mt->pixclock, (mt->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL);
571   - mt->pixclock = g450_mnp2f(PMINFO mt->mnp);
  581 + mt->mnp = matroxfb_g450_setclk(minfo, mt->pixclock, (mt->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL);
  582 + mt->pixclock = g450_mnp2f(minfo, mt->mnp);
572 583 }
573 584 return 0;
574 585 }
575 586  
... ... @@ -588,10 +599,11 @@
588 599 .compute = g450_dvi_compute,
589 600 };
590 601  
591   -void matroxfb_g450_connect(WPMINFO2) {
  602 +void matroxfb_g450_connect(struct matrox_fb_info *minfo)
  603 +{
592 604 if (minfo->devflags.g450dac) {
593 605 down_write(&minfo->altout.lock);
594   - tvo_fill_defaults(PMINFO2);
  606 + tvo_fill_defaults(minfo);
595 607 minfo->outputs[1].src = minfo->outputs[1].default_src;
596 608 minfo->outputs[1].data = minfo;
597 609 minfo->outputs[1].output = &matroxfb_g450_altout;
... ... @@ -604,7 +616,8 @@
604 616 }
605 617 }
606 618  
607   -void matroxfb_g450_shutdown(WPMINFO2) {
  619 +void matroxfb_g450_shutdown(struct matrox_fb_info *minfo)
  620 +{
608 621 if (minfo->devflags.g450dac) {
609 622 down_write(&minfo->altout.lock);
610 623 minfo->outputs[1].src = MATROXFB_SRC_NONE;
drivers/video/matrox/matroxfb_g450.h
Diff comments   View file @ 316b4d6
... ... @@ -4,11 +4,11 @@
4 4 #include "matroxfb_base.h"
5 5  
6 6 #ifdef CONFIG_FB_MATROX_G
7   -void matroxfb_g450_connect(WPMINFO2);
8   -void matroxfb_g450_shutdown(WPMINFO2);
  7 +void matroxfb_g450_connect(struct matrox_fb_info *minfo);
  8 +void matroxfb_g450_shutdown(struct matrox_fb_info *minfo);
9 9 #else
10   -static inline void matroxfb_g450_connect(WPMINFO2) { };
11   -static inline void matroxfb_g450_shutdown(WPMINFO2) { };
  10 +static inline void matroxfb_g450_connect(struct matrox_fb_info *minfo) { };
  11 +static inline void matroxfb_g450_shutdown(struct matrox_fb_info *minfo) { };
12 12 #endif
13 13  
14 14 #endif /* __MATROXFB_G450_H__ */
drivers/video/matrox/matroxfb_misc.c
Diff comments   View file @ 316b4d6
... ... @@ -89,13 +89,15 @@
89 89 #include <linux/interrupt.h>
90 90 #include <linux/matroxfb.h>
91 91  
92   -void matroxfb_DAC_out(CPMINFO int reg, int val) {
  92 +void matroxfb_DAC_out(const struct matrox_fb_info *minfo, int reg, int val)
  93 +{
93 94 DBG_REG(__func__)
94 95 mga_outb(M_RAMDAC_BASE+M_X_INDEX, reg);
95 96 mga_outb(M_RAMDAC_BASE+M_X_DATAREG, val);
96 97 }
97 98  
98   -int matroxfb_DAC_in(CPMINFO int reg) {
  99 +int matroxfb_DAC_in(const struct matrox_fb_info *minfo, int reg)
  100 +{
99 101 DBG_REG(__func__)
100 102 mga_outb(M_RAMDAC_BASE+M_X_INDEX, reg);
101 103 return mga_inb(M_RAMDAC_BASE+M_X_DATAREG);
... ... @@ -184,7 +186,8 @@
184 186 return bestvco;
185 187 }
186 188  
187   -int matroxfb_vgaHWinit(WPMINFO struct my_timming* m) {
  189 +int matroxfb_vgaHWinit(struct matrox_fb_info *minfo, struct my_timming *m)
  190 +{
188 191 unsigned int hd, hs, he, hbe, ht;
189 192 unsigned int vd, vs, ve, vt, lc;
190 193 unsigned int wd;
... ... @@ -331,7 +334,8 @@
331 334 return 0;
332 335 };
333 336  
334   -void matroxfb_vgaHWrestore(WPMINFO2) {
  337 +void matroxfb_vgaHWrestore(struct matrox_fb_info *minfo)
  338 +{
335 339 int i;
336 340 struct matrox_hw_state * const hw = &minfo->hw;
337 341 CRITFLAGS
... ... @@ -522,7 +526,9 @@
522 526 #endif
523 527 }
524 528  
525   -static int parse_pins1(WPMINFO const struct matrox_bios* bd) {
  529 +static int parse_pins1(struct matrox_fb_info *minfo,
  530 + const struct matrox_bios *bd)
  531 +{
526 532 unsigned int maxdac;
527 533  
528 534 switch (bd->pins[22]) {
... ... @@ -542,7 +548,8 @@
542 548 return 0;
543 549 }
544 550  
545   -static void default_pins1(WPMINFO2) {
  551 +static void default_pins1(struct matrox_fb_info *minfo)
  552 +{
546 553 /* Millennium */
547 554 minfo->limits.pixel.vcomax = 220000;
548 555 minfo->values.pll.system = 50000;
... ... @@ -550,7 +557,9 @@
550 557 minfo->values.reg.mctlwtst = 0x00030101;
551 558 }
552 559  
553   -static int parse_pins2(WPMINFO const struct matrox_bios* bd) {
  560 +static int parse_pins2(struct matrox_fb_info *minfo,
  561 + const struct matrox_bios *bd)
  562 +{
554 563 minfo->limits.pixel.vcomax =
555 564 minfo->limits.system.vcomax = (bd->pins[41] == 0xFF) ? 230000 : ((bd->pins[41] + 100) * 1000);
556 565 minfo->values.reg.mctlwtst = ((bd->pins[51] & 0x01) ? 0x00000001 : 0) |
... ... @@ -562,7 +571,8 @@
562 571 return 0;
563 572 }
564 573  
565   -static void default_pins2(WPMINFO2) {
  574 +static void default_pins2(struct matrox_fb_info *minfo)
  575 +{
566 576 /* Millennium II, Mystique */
567 577 minfo->limits.pixel.vcomax =
568 578 minfo->limits.system.vcomax = 230000;
... ... @@ -571,7 +581,9 @@
571 581 minfo->features.pll.ref_freq = 14318;
572 582 }
573 583  
574   -static int parse_pins3(WPMINFO const struct matrox_bios* bd) {
  584 +static int parse_pins3(struct matrox_fb_info *minfo,
  585 + const struct matrox_bios *bd)
  586 +{
575 587 minfo->limits.pixel.vcomax =
576 588 minfo->limits.system.vcomax = (bd->pins[36] == 0xFF) ? 230000 : ((bd->pins[36] + 100) * 1000);
577 589 minfo->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 48) == 0xFFFFFFFF ?
... ... @@ -587,7 +599,8 @@
587 599 return 0;
588 600 }
589 601  
590   -static void default_pins3(WPMINFO2) {
  602 +static void default_pins3(struct matrox_fb_info *minfo)
  603 +{
591 604 /* G100, G200 */
592 605 minfo->limits.pixel.vcomax =
593 606 minfo->limits.system.vcomax = 230000;
... ... @@ -598,7 +611,9 @@
598 611 minfo->features.pll.ref_freq = 27000;
599 612 }
600 613  
601   -static int parse_pins4(WPMINFO const struct matrox_bios* bd) {
  614 +static int parse_pins4(struct matrox_fb_info *minfo,
  615 + const struct matrox_bios *bd)
  616 +{
602 617 minfo->limits.pixel.vcomax = (bd->pins[ 39] == 0xFF) ? 230000 : bd->pins[ 39] * 4000;
603 618 minfo->limits.system.vcomax = (bd->pins[ 38] == 0xFF) ? minfo->limits.pixel.vcomax : bd->pins[ 38] * 4000;
604 619 minfo->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 71);
... ... @@ -615,7 +630,8 @@
615 630 return 0;
616 631 }
617 632  
618   -static void default_pins4(WPMINFO2) {
  633 +static void default_pins4(struct matrox_fb_info *minfo)
  634 +{
619 635 /* G400 */
620 636 minfo->limits.pixel.vcomax =
621 637 minfo->limits.system.vcomax = 252000;
... ... @@ -627,7 +643,9 @@
627 643 minfo->features.pll.ref_freq = 27000;
628 644 }
629 645  
630   -static int parse_pins5(WPMINFO const struct matrox_bios* bd) {
  646 +static int parse_pins5(struct matrox_fb_info *minfo,
  647 + const struct matrox_bios *bd)
  648 +{
631 649 unsigned int mult;
632 650  
633 651 mult = bd->pins[4]?8000:6000;
... ... @@ -662,7 +680,8 @@
662 680 return 0;
663 681 }
664 682  
665   -static void default_pins5(WPMINFO2) {
  683 +static void default_pins5(struct matrox_fb_info *minfo)
  684 +{
666 685 /* Mine 16MB G450 with SDRAM DDR */
667 686 minfo->limits.pixel.vcomax =
668 687 minfo->limits.system.vcomax =
669 688  
670 689  
671 690  
672 691  
... ... @@ -686,20 +705,22 @@
686 705 minfo->values.reg.maccess = 0x00004000;
687 706 }
688 707  
689   -static int matroxfb_set_limits(WPMINFO const struct matrox_bios* bd) {
  708 +static int matroxfb_set_limits(struct matrox_fb_info *minfo,
  709 + const struct matrox_bios *bd)
  710 +{
690 711 unsigned int pins_version;
691 712 static const unsigned int pinslen[] = { 64, 64, 64, 128, 128 };
692 713  
693 714 switch (minfo->chip) {
694   - case MGA_2064: default_pins1(PMINFO2); break;
  715 + case MGA_2064: default_pins1(minfo); break;
695 716 case MGA_2164:
696 717 case MGA_1064:
697   - case MGA_1164: default_pins2(PMINFO2); break;
  718 + case MGA_1164: default_pins2(minfo); break;
698 719 case MGA_G100:
699   - case MGA_G200: default_pins3(PMINFO2); break;
700   - case MGA_G400: default_pins4(PMINFO2); break;
  720 + case MGA_G200: default_pins3(minfo); break;
  721 + case MGA_G400: default_pins4(minfo); break;
701 722 case MGA_G450:
702   - case MGA_G550: default_pins5(PMINFO2); break;
  723 + case MGA_G550: default_pins5(minfo); break;
703 724 }
704 725 if (!bd->bios_valid) {
705 726 printk(KERN_INFO "matroxfb: Your Matrox device does not have BIOS\n");
706 727  
707 728  
708 729  
709 730  
710 731  
... ... @@ -724,22 +745,23 @@
724 745 }
725 746 switch (pins_version) {
726 747 case 1:
727   - return parse_pins1(PMINFO bd);
  748 + return parse_pins1(minfo, bd);
728 749 case 2:
729   - return parse_pins2(PMINFO bd);
  750 + return parse_pins2(minfo, bd);
730 751 case 3:
731   - return parse_pins3(PMINFO bd);
  752 + return parse_pins3(minfo, bd);
732 753 case 4:
733   - return parse_pins4(PMINFO bd);
  754 + return parse_pins4(minfo, bd);
734 755 case 5:
735   - return parse_pins5(PMINFO bd);
  756 + return parse_pins5(minfo, bd);
736 757 default:
737 758 printk(KERN_DEBUG "matroxfb: Powerup info version %u is not yet supported\n", pins_version);
738 759 return -1;
739 760 }
740 761 }
741 762  
742   -void matroxfb_read_pins(WPMINFO2) {
  763 +void matroxfb_read_pins(struct matrox_fb_info *minfo)
  764 +{
743 765 u32 opt;
744 766 u32 biosbase;
745 767 u32 fbbase;
... ... @@ -775,7 +797,7 @@
775 797 }
776 798 }
777 799 #endif
778   - matroxfb_set_limits(PMINFO &minfo->bios);
  800 + matroxfb_set_limits(minfo, &minfo->bios);
779 801 printk(KERN_INFO "PInS memtype = %u\n",
780 802 (minfo->values.reg.opt & 0x1C00) >> 10);
781 803 }
drivers/video/matrox/matroxfb_misc.h
Diff comments   View file @ 316b4d6
... ... @@ -6,14 +6,17 @@
6 6 /* also for modules */
7 7 int matroxfb_PLL_calcclock(const struct matrox_pll_features* pll, unsigned int freq, unsigned int fmax,
8 8 unsigned int* in, unsigned int* feed, unsigned int* post);
9   -static inline int PLL_calcclock(CPMINFO unsigned int freq, unsigned int fmax,
10   - unsigned int* in, unsigned int* feed, unsigned int* post) {
  9 +static inline int PLL_calcclock(const struct matrox_fb_info *minfo,
  10 + unsigned int freq, unsigned int fmax,
  11 + unsigned int *in, unsigned int *feed,
  12 + unsigned int *post)
  13 +{
11 14 return matroxfb_PLL_calcclock(&minfo->features.pll, freq, fmax, in, feed, post);
12 15 }
13 16  
14   -int matroxfb_vgaHWinit(WPMINFO struct my_timming* m);
15   -void matroxfb_vgaHWrestore(WPMINFO2);
16   -void matroxfb_read_pins(WPMINFO2);
  17 +int matroxfb_vgaHWinit(struct matrox_fb_info *minfo, struct my_timming* m);
  18 +void matroxfb_vgaHWrestore(struct matrox_fb_info *minfo);
  19 +void matroxfb_read_pins(struct matrox_fb_info *minfo);
17 20  
18 21 #endif /* __MATROXFB_MISC_H__ */