Eric Lee / linux-smarc-t335x-v3.2

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Commit 35de674982aa13de98cf470c640895164017563e

Authored by Greg Ungerer
1 parent f3c23a28ac
Exists in master and in 4 other branches v3.2_AM335xPSP_04.06.00.11, v3.2_NEWT335xPSP_04.06.00.11, v3.2_SBC_SMARTMEN, v3.2_SMARCT335xPSP_04.06.00.11

m68k: fix some atomic operation asm address modes for ColdFire 

The ColdFire processors have a much more limited set of addressing modes
that can be used for most instructions. A number of the atomic operations
have already been fixed to limit the addressing modes used with add and
sub instructions when building for ColdFire. But we missed a few.
Fix the remaining atomic operations to be clean for ColdFire processors.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>

Showing 1 changed file with 3 additions and 3 deletions Side-by-side Diff

arch/m68k/include/asm/atomic.h
Diff comments   View file @ 35de674
... ... @@ -169,18 +169,18 @@
169 169 char c;
170 170 __asm__ __volatile__("addl %2,%1; smi %0"
171 171 : "=d" (c), "+m" (*v)
172   - : "id" (i));
  172 + : ASM_DI (i));
173 173 return c != 0;
174 174 }
175 175  
176 176 static inline void atomic_clear_mask(unsigned long mask, unsigned long *v)
177 177 {
178   - __asm__ __volatile__("andl %1,%0" : "+m" (*v) : "id" (~(mask)));
  178 + __asm__ __volatile__("andl %1,%0" : "+m" (*v) : ASM_DI (~(mask)));
179 179 }
180 180  
181 181 static inline void atomic_set_mask(unsigned long mask, unsigned long *v)
182 182 {
183   - __asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask));
  183 + __asm__ __volatile__("orl %1,%0" : "+m" (*v) : ASM_DI (mask));
184 184 }
185 185  
186 186 static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)