Eric Lee / linux-smarc-t335x-v3.2

Download as
Browse Code ยป

Commit 39750324053c2aa4314e460b5ce1767f4dfbeff1

Authored by Mike Frysinger
1 parent c385acceb4
Exists in master and in 4 other branches v3.2_AM335xPSP_04.06.00.11, v3.2_NEWT335xPSP_04.06.00.11, v3.2_SBC_SMARTMEN, v3.2_SMARCT335xPSP_04.06.00.11

Blackfin: unify rotary encoder bitmasks 

Avoid duplication and ugly global namespace pollution.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Showing 4 changed files with 73 additions and 295 deletions Side-by-side Diff

arch/blackfin/include/asm/bfin_rotary.h
Diff comments   View file @ 3975032
... ... @@ -2,7 +2,7 @@
2 2 * board initialization should put one of these structures into platform_data
3 3 * and place the bfin-rotary onto platform_bus named "bfin-rotary".
4 4 *
5   - * Copyright 2008 Analog Devices Inc.
  5 + * Copyright 2008-2010 Analog Devices Inc.
6 6 *
7 7 * Licensed under the GPL-2 or later.
8 8 */
... ... @@ -40,5 +40,77 @@
40 40 unsigned short debounce; /* 0..17 */
41 41 unsigned short mode;
42 42 };
  43 +
  44 +/* CNT_CONFIG bitmasks */
  45 +#define CNTE (1 << 0) /* Counter Enable */
  46 +#define DEBE (1 << 1) /* Debounce Enable */
  47 +#define CDGINV (1 << 4) /* CDG Pin Polarity Invert */
  48 +#define CUDINV (1 << 5) /* CUD Pin Polarity Invert */
  49 +#define CZMINV (1 << 6) /* CZM Pin Polarity Invert */
  50 +#define CNTMODE_SHIFT 8
  51 +#define CNTMODE (0x7 << CNTMODE_SHIFT) /* Counter Operating Mode */
  52 +#define ZMZC (1 << 1) /* CZM Zeroes Counter Enable */
  53 +#define BNDMODE_SHIFT 12
  54 +#define BNDMODE (0x3 << BNDMODE_SHIFT) /* Boundary register Mode */
  55 +#define INPDIS (1 << 15) /* CUG and CDG Input Disable */
  56 +
  57 +#define CNTMODE_QUADENC (0 << CNTMODE_SHIFT) /* quadrature encoder mode */
  58 +#define CNTMODE_BINENC (1 << CNTMODE_SHIFT) /* binary encoder mode */
  59 +#define CNTMODE_UDCNT (2 << CNTMODE_SHIFT) /* up/down counter mode */
  60 +#define CNTMODE_DIRCNT (4 << CNTMODE_SHIFT) /* direction counter mode */
  61 +#define CNTMODE_DIRTMR (5 << CNTMODE_SHIFT) /* direction timer mode */
  62 +
  63 +#define BNDMODE_COMP (0 << BNDMODE_SHIFT) /* boundary compare mode */
  64 +#define BNDMODE_ZERO (1 << BNDMODE_SHIFT) /* boundary compare and zero mode */
  65 +#define BNDMODE_CAPT (2 << BNDMODE_SHIFT) /* boundary capture mode */
  66 +#define BNDMODE_AEXT (3 << BNDMODE_SHIFT) /* boundary auto-extend mode */
  67 +
  68 +/* CNT_IMASK bitmasks */
  69 +#define ICIE (1 << 0) /* Illegal Gray/Binary Code Interrupt Enable */
  70 +#define UCIE (1 << 1) /* Up count Interrupt Enable */
  71 +#define DCIE (1 << 2) /* Down count Interrupt Enable */
  72 +#define MINCIE (1 << 3) /* Min Count Interrupt Enable */
  73 +#define MAXCIE (1 << 4) /* Max Count Interrupt Enable */
  74 +#define COV31IE (1 << 5) /* Bit 31 Overflow Interrupt Enable */
  75 +#define COV15IE (1 << 6) /* Bit 15 Overflow Interrupt Enable */
  76 +#define CZEROIE (1 << 7) /* Count to Zero Interrupt Enable */
  77 +#define CZMIE (1 << 8) /* CZM Pin Interrupt Enable */
  78 +#define CZMEIE (1 << 9) /* CZM Error Interrupt Enable */
  79 +#define CZMZIE (1 << 10) /* CZM Zeroes Counter Interrupt Enable */
  80 +
  81 +/* CNT_STATUS bitmasks */
  82 +#define ICII (1 << 0) /* Illegal Gray/Binary Code Interrupt Identifier */
  83 +#define UCII (1 << 1) /* Up count Interrupt Identifier */
  84 +#define DCII (1 << 2) /* Down count Interrupt Identifier */
  85 +#define MINCII (1 << 3) /* Min Count Interrupt Identifier */
  86 +#define MAXCII (1 << 4) /* Max Count Interrupt Identifier */
  87 +#define COV31II (1 << 5) /* Bit 31 Overflow Interrupt Identifier */
  88 +#define COV15II (1 << 6) /* Bit 15 Overflow Interrupt Identifier */
  89 +#define CZEROII (1 << 7) /* Count to Zero Interrupt Identifier */
  90 +#define CZMII (1 << 8) /* CZM Pin Interrupt Identifier */
  91 +#define CZMEII (1 << 9) /* CZM Error Interrupt Identifier */
  92 +#define CZMZII (1 << 10) /* CZM Zeroes Counter Interrupt Identifier */
  93 +
  94 +/* CNT_COMMAND bitmasks */
  95 +#define W1LCNT 0xf /* Load Counter Register */
  96 +#define W1LMIN 0xf0 /* Load Min Register */
  97 +#define W1LMAX 0xf00 /* Load Max Register */
  98 +#define W1ZMONCE (1 << 12) /* Enable CZM Clear Counter Once */
  99 +
  100 +#define W1LCNT_ZERO (1 << 0) /* write 1 to load CNT_COUNTER with zero */
  101 +#define W1LCNT_MIN (1 << 2) /* write 1 to load CNT_COUNTER from CNT_MIN */
  102 +#define W1LCNT_MAX (1 << 3) /* write 1 to load CNT_COUNTER from CNT_MAX */
  103 +
  104 +#define W1LMIN_ZERO (1 << 4) /* write 1 to load CNT_MIN with zero */
  105 +#define W1LMIN_CNT (1 << 5) /* write 1 to load CNT_MIN from CNT_COUNTER */
  106 +#define W1LMIN_MAX (1 << 7) /* write 1 to load CNT_MIN from CNT_MAX */
  107 +
  108 +#define W1LMAX_ZERO (1 << 8) /* write 1 to load CNT_MAX with zero */
  109 +#define W1LMAX_CNT (1 << 9) /* write 1 to load CNT_MAX from CNT_COUNTER */
  110 +#define W1LMAX_MIN (1 << 10) /* write 1 to load CNT_MAX from CNT_MIN */
  111 +
  112 +/* CNT_DEBOUNCE bitmasks */
  113 +#define DPRESCALE 0xf /* Load Counter Register */
  114 +
43 115 #endif
arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
Diff comments   View file @ 3975032
... ... @@ -1576,114 +1576,6 @@
1576 1576  
1577 1577 #define HOST_COUNT_TIMEOUT 0x7ff /* Host Timeout count */
1578 1578  
1579   -/* Bit masks for CNT_CONFIG */
1580   -
1581   -#define CNTE 0x1 /* Counter Enable */
1582   -#define nCNTE 0x0
1583   -#define DEBE 0x2 /* Debounce Enable */
1584   -#define nDEBE 0x0
1585   -#define CDGINV 0x10 /* CDG Pin Polarity Invert */
1586   -#define nCDGINV 0x0
1587   -#define CUDINV 0x20 /* CUD Pin Polarity Invert */
1588   -#define nCUDINV 0x0
1589   -#define CZMINV 0x40 /* CZM Pin Polarity Invert */
1590   -#define nCZMINV 0x0
1591   -#define CNTMODE 0x700 /* Counter Operating Mode */
1592   -#define ZMZC 0x800 /* CZM Zeroes Counter Enable */
1593   -#define nZMZC 0x0
1594   -#define BNDMODE 0x3000 /* Boundary register Mode */
1595   -#define INPDIS 0x8000 /* CUG and CDG Input Disable */
1596   -#define nINPDIS 0x0
1597   -
1598   -/* Bit masks for CNT_IMASK */
1599   -
1600   -#define ICIE 0x1 /* Illegal Gray/Binary Code Interrupt Enable */
1601   -#define nICIE 0x0
1602   -#define UCIE 0x2 /* Up count Interrupt Enable */
1603   -#define nUCIE 0x0
1604   -#define DCIE 0x4 /* Down count Interrupt Enable */
1605   -#define nDCIE 0x0
1606   -#define MINCIE 0x8 /* Min Count Interrupt Enable */
1607   -#define nMINCIE 0x0
1608   -#define MAXCIE 0x10 /* Max Count Interrupt Enable */
1609   -#define nMAXCIE 0x0
1610   -#define COV31IE 0x20 /* Bit 31 Overflow Interrupt Enable */
1611   -#define nCOV31IE 0x0
1612   -#define COV15IE 0x40 /* Bit 15 Overflow Interrupt Enable */
1613   -#define nCOV15IE 0x0
1614   -#define CZEROIE 0x80 /* Count to Zero Interrupt Enable */
1615   -#define nCZEROIE 0x0
1616   -#define CZMIE 0x100 /* CZM Pin Interrupt Enable */
1617   -#define nCZMIE 0x0
1618   -#define CZMEIE 0x200 /* CZM Error Interrupt Enable */
1619   -#define nCZMEIE 0x0
1620   -#define CZMZIE 0x400 /* CZM Zeroes Counter Interrupt Enable */
1621   -#define nCZMZIE 0x0
1622   -
1623   -/* Bit masks for CNT_STATUS */
1624   -
1625   -#define ICII 0x1 /* Illegal Gray/Binary Code Interrupt Identifier */
1626   -#define nICII 0x0
1627   -#define UCII 0x2 /* Up count Interrupt Identifier */
1628   -#define nUCII 0x0
1629   -#define DCII 0x4 /* Down count Interrupt Identifier */
1630   -#define nDCII 0x0
1631   -#define MINCII 0x8 /* Min Count Interrupt Identifier */
1632   -#define nMINCII 0x0
1633   -#define MAXCII 0x10 /* Max Count Interrupt Identifier */
1634   -#define nMAXCII 0x0
1635   -#define COV31II 0x20 /* Bit 31 Overflow Interrupt Identifier */
1636   -#define nCOV31II 0x0
1637   -#define COV15II 0x40 /* Bit 15 Overflow Interrupt Identifier */
1638   -#define nCOV15II 0x0
1639   -#define CZEROII 0x80 /* Count to Zero Interrupt Identifier */
1640   -#define nCZEROII 0x0
1641   -#define CZMII 0x100 /* CZM Pin Interrupt Identifier */
1642   -#define nCZMII 0x0
1643   -#define CZMEII 0x200 /* CZM Error Interrupt Identifier */
1644   -#define nCZMEII 0x0
1645   -#define CZMZII 0x400 /* CZM Zeroes Counter Interrupt Identifier */
1646   -#define nCZMZII 0x0
1647   -
1648   -/* Bit masks for CNT_COMMAND */
1649   -
1650   -#define W1LCNT 0xf /* Load Counter Register */
1651   -#define W1LMIN 0xf0 /* Load Min Register */
1652   -#define W1LMAX 0xf00 /* Load Max Register */
1653   -#define W1ZMONCE 0x1000 /* Enable CZM Clear Counter Once */
1654   -#define nW1ZMONCE 0x0
1655   -
1656   -/* Bit masks for CNT_DEBOUNCE */
1657   -
1658   -#define DPRESCALE 0xf /* Load Counter Register */
1659   -
1660   -/* CNT_COMMAND bit field options */
1661   -
1662   -#define W1LCNT_ZERO 0x0001 /* write 1 to load CNT_COUNTER with zero */
1663   -#define W1LCNT_MIN 0x0004 /* write 1 to load CNT_COUNTER from CNT_MIN */
1664   -#define W1LCNT_MAX 0x0008 /* write 1 to load CNT_COUNTER from CNT_MAX */
1665   -
1666   -#define W1LMIN_ZERO 0x0010 /* write 1 to load CNT_MIN with zero */
1667   -#define W1LMIN_CNT 0x0020 /* write 1 to load CNT_MIN from CNT_COUNTER */
1668   -#define W1LMIN_MAX 0x0080 /* write 1 to load CNT_MIN from CNT_MAX */
1669   -
1670   -#define W1LMAX_ZERO 0x0100 /* write 1 to load CNT_MAX with zero */
1671   -#define W1LMAX_CNT 0x0200 /* write 1 to load CNT_MAX from CNT_COUNTER */
1672   -#define W1LMAX_MIN 0x0400 /* write 1 to load CNT_MAX from CNT_MIN */
1673   -
1674   -/* CNT_CONFIG bit field options */
1675   -
1676   -#define CNTMODE_QUADENC 0x0000 /* quadrature encoder mode */
1677   -#define CNTMODE_BINENC 0x0100 /* binary encoder mode */
1678   -#define CNTMODE_UDCNT 0x0200 /* up/down counter mode */
1679   -#define CNTMODE_DIRCNT 0x0400 /* direction counter mode */
1680   -#define CNTMODE_DIRTMR 0x0500 /* direction timer mode */
1681   -
1682   -#define BNDMODE_COMP 0x0000 /* boundary compare mode */
1683   -#define BNDMODE_ZERO 0x1000 /* boundary compare and zero mode */
1684   -#define BNDMODE_CAPT 0x2000 /* boundary capture mode */
1685   -#define BNDMODE_AEXT 0x3000 /* boundary auto-extend mode */
1686   -
1687 1579 /* Bit masks for SECURE_SYSSWT */
1688 1580  
1689 1581 #define EMUDABL 0x1 /* Emulation Disable. */
arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
Diff comments   View file @ 3975032
... ... @@ -1589,114 +1589,6 @@
1589 1589  
1590 1590 #define HOST_COUNT_TIMEOUT 0x7ff /* Host Timeout count */
1591 1591  
1592   -/* Bit masks for CNT_CONFIG */
1593   -
1594   -#define CNTE 0x1 /* Counter Enable */
1595   -#define nCNTE 0x0
1596   -#define DEBE 0x2 /* Debounce Enable */
1597   -#define nDEBE 0x0
1598   -#define CDGINV 0x10 /* CDG Pin Polarity Invert */
1599   -#define nCDGINV 0x0
1600   -#define CUDINV 0x20 /* CUD Pin Polarity Invert */
1601   -#define nCUDINV 0x0
1602   -#define CZMINV 0x40 /* CZM Pin Polarity Invert */
1603   -#define nCZMINV 0x0
1604   -#define CNTMODE 0x700 /* Counter Operating Mode */
1605   -#define ZMZC 0x800 /* CZM Zeroes Counter Enable */
1606   -#define nZMZC 0x0
1607   -#define BNDMODE 0x3000 /* Boundary register Mode */
1608   -#define INPDIS 0x8000 /* CUG and CDG Input Disable */
1609   -#define nINPDIS 0x0
1610   -
1611   -/* Bit masks for CNT_IMASK */
1612   -
1613   -#define ICIE 0x1 /* Illegal Gray/Binary Code Interrupt Enable */
1614   -#define nICIE 0x0
1615   -#define UCIE 0x2 /* Up count Interrupt Enable */
1616   -#define nUCIE 0x0
1617   -#define DCIE 0x4 /* Down count Interrupt Enable */
1618   -#define nDCIE 0x0
1619   -#define MINCIE 0x8 /* Min Count Interrupt Enable */
1620   -#define nMINCIE 0x0
1621   -#define MAXCIE 0x10 /* Max Count Interrupt Enable */
1622   -#define nMAXCIE 0x0
1623   -#define COV31IE 0x20 /* Bit 31 Overflow Interrupt Enable */
1624   -#define nCOV31IE 0x0
1625   -#define COV15IE 0x40 /* Bit 15 Overflow Interrupt Enable */
1626   -#define nCOV15IE 0x0
1627   -#define CZEROIE 0x80 /* Count to Zero Interrupt Enable */
1628   -#define nCZEROIE 0x0
1629   -#define CZMIE 0x100 /* CZM Pin Interrupt Enable */
1630   -#define nCZMIE 0x0
1631   -#define CZMEIE 0x200 /* CZM Error Interrupt Enable */
1632   -#define nCZMEIE 0x0
1633   -#define CZMZIE 0x400 /* CZM Zeroes Counter Interrupt Enable */
1634   -#define nCZMZIE 0x0
1635   -
1636   -/* Bit masks for CNT_STATUS */
1637   -
1638   -#define ICII 0x1 /* Illegal Gray/Binary Code Interrupt Identifier */
1639   -#define nICII 0x0
1640   -#define UCII 0x2 /* Up count Interrupt Identifier */
1641   -#define nUCII 0x0
1642   -#define DCII 0x4 /* Down count Interrupt Identifier */
1643   -#define nDCII 0x0
1644   -#define MINCII 0x8 /* Min Count Interrupt Identifier */
1645   -#define nMINCII 0x0
1646   -#define MAXCII 0x10 /* Max Count Interrupt Identifier */
1647   -#define nMAXCII 0x0
1648   -#define COV31II 0x20 /* Bit 31 Overflow Interrupt Identifier */
1649   -#define nCOV31II 0x0
1650   -#define COV15II 0x40 /* Bit 15 Overflow Interrupt Identifier */
1651   -#define nCOV15II 0x0
1652   -#define CZEROII 0x80 /* Count to Zero Interrupt Identifier */
1653   -#define nCZEROII 0x0
1654   -#define CZMII 0x100 /* CZM Pin Interrupt Identifier */
1655   -#define nCZMII 0x0
1656   -#define CZMEII 0x200 /* CZM Error Interrupt Identifier */
1657   -#define nCZMEII 0x0
1658   -#define CZMZII 0x400 /* CZM Zeroes Counter Interrupt Identifier */
1659   -#define nCZMZII 0x0
1660   -
1661   -/* Bit masks for CNT_COMMAND */
1662   -
1663   -#define W1LCNT 0xf /* Load Counter Register */
1664   -#define W1LMIN 0xf0 /* Load Min Register */
1665   -#define W1LMAX 0xf00 /* Load Max Register */
1666   -#define W1ZMONCE 0x1000 /* Enable CZM Clear Counter Once */
1667   -#define nW1ZMONCE 0x0
1668   -
1669   -/* Bit masks for CNT_DEBOUNCE */
1670   -
1671   -#define DPRESCALE 0xf /* Load Counter Register */
1672   -
1673   -/* CNT_COMMAND bit field options */
1674   -
1675   -#define W1LCNT_ZERO 0x0001 /* write 1 to load CNT_COUNTER with zero */
1676   -#define W1LCNT_MIN 0x0004 /* write 1 to load CNT_COUNTER from CNT_MIN */
1677   -#define W1LCNT_MAX 0x0008 /* write 1 to load CNT_COUNTER from CNT_MAX */
1678   -
1679   -#define W1LMIN_ZERO 0x0010 /* write 1 to load CNT_MIN with zero */
1680   -#define W1LMIN_CNT 0x0020 /* write 1 to load CNT_MIN from CNT_COUNTER */
1681   -#define W1LMIN_MAX 0x0080 /* write 1 to load CNT_MIN from CNT_MAX */
1682   -
1683   -#define W1LMAX_ZERO 0x0100 /* write 1 to load CNT_MAX with zero */
1684   -#define W1LMAX_CNT 0x0200 /* write 1 to load CNT_MAX from CNT_COUNTER */
1685   -#define W1LMAX_MIN 0x0400 /* write 1 to load CNT_MAX from CNT_MIN */
1686   -
1687   -/* CNT_CONFIG bit field options */
1688   -
1689   -#define CNTMODE_QUADENC 0x0000 /* quadrature encoder mode */
1690   -#define CNTMODE_BINENC 0x0100 /* binary encoder mode */
1691   -#define CNTMODE_UDCNT 0x0200 /* up/down counter mode */
1692   -#define CNTMODE_DIRCNT 0x0400 /* direction counter mode */
1693   -#define CNTMODE_DIRTMR 0x0500 /* direction timer mode */
1694   -
1695   -#define BNDMODE_COMP 0x0000 /* boundary compare mode */
1696   -#define BNDMODE_ZERO 0x1000 /* boundary compare and zero mode */
1697   -#define BNDMODE_CAPT 0x2000 /* boundary capture mode */
1698   -#define BNDMODE_AEXT 0x3000 /* boundary auto-extend mode */
1699   -
1700 1592 /* Bit masks for SECURE_SYSSWT */
1701 1593  
1702 1594 #define EMUDABL 0x1 /* Emulation Disable. */
arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
Diff comments   View file @ 3975032
... ... @@ -1958,57 +1958,6 @@
1958 1958 #define TRUN6 0x40000000 /* Timer 6 Slave Enable Status */
1959 1959 #define TRUN7 0x80000000 /* Timer 7 Slave Enable Status */
1960 1960  
1961   -/* Bit masks for CNT_CONFIG */
1962   -
1963   -#define CNTE 0x1 /* Counter Enable */
1964   -#define DEBE 0x2 /* Debounce Enable */
1965   -#define CDGINV 0x10 /* CDG Pin Polarity Invert */
1966   -#define CUDINV 0x20 /* CUD Pin Polarity Invert */
1967   -#define CZMINV 0x40 /* CZM Pin Polarity Invert */
1968   -#define CNTMODE 0x700 /* Counter Operating Mode */
1969   -#define ZMZC 0x800 /* CZM Zeroes Counter Enable */
1970   -#define BNDMODE 0x3000 /* Boundary register Mode */
1971   -#define INPDIS 0x8000 /* CUG and CDG Input Disable */
1972   -
1973   -/* Bit masks for CNT_IMASK */
1974   -
1975   -#define ICIE 0x1 /* Illegal Gray/Binary Code Interrupt Enable */
1976   -#define UCIE 0x2 /* Up count Interrupt Enable */
1977   -#define DCIE 0x4 /* Down count Interrupt Enable */
1978   -#define MINCIE 0x8 /* Min Count Interrupt Enable */
1979   -#define MAXCIE 0x10 /* Max Count Interrupt Enable */
1980   -#define COV31IE 0x20 /* Bit 31 Overflow Interrupt Enable */
1981   -#define COV15IE 0x40 /* Bit 15 Overflow Interrupt Enable */
1982   -#define CZEROIE 0x80 /* Count to Zero Interrupt Enable */
1983   -#define CZMIE 0x100 /* CZM Pin Interrupt Enable */
1984   -#define CZMEIE 0x200 /* CZM Error Interrupt Enable */
1985   -#define CZMZIE 0x400 /* CZM Zeroes Counter Interrupt Enable */
1986   -
1987   -/* Bit masks for CNT_STATUS */
1988   -
1989   -#define ICII 0x1 /* Illegal Gray/Binary Code Interrupt Identifier */
1990   -#define UCII 0x2 /* Up count Interrupt Identifier */
1991   -#define DCII 0x4 /* Down count Interrupt Identifier */
1992   -#define MINCII 0x8 /* Min Count Interrupt Identifier */
1993   -#define MAXCII 0x10 /* Max Count Interrupt Identifier */
1994   -#define COV31II 0x20 /* Bit 31 Overflow Interrupt Identifier */
1995   -#define COV15II 0x40 /* Bit 15 Overflow Interrupt Identifier */
1996   -#define CZEROII 0x80 /* Count to Zero Interrupt Identifier */
1997   -#define CZMII 0x100 /* CZM Pin Interrupt Identifier */
1998   -#define CZMEII 0x200 /* CZM Error Interrupt Identifier */
1999   -#define CZMZII 0x400 /* CZM Zeroes Counter Interrupt Identifier */
2000   -
2001   -/* Bit masks for CNT_COMMAND */
2002   -
2003   -#define W1LCNT 0xf /* Load Counter Register */
2004   -#define W1LMIN 0xf0 /* Load Min Register */
2005   -#define W1LMAX 0xf00 /* Load Max Register */
2006   -#define W1ZMONCE 0x1000 /* Enable CZM Clear Counter Once */
2007   -
2008   -/* Bit masks for CNT_DEBOUNCE */
2009   -
2010   -#define DPRESCALE 0xf /* Load Counter Register */
2011   -
2012 1961 /* Bit masks for SECURE_SYSSWT */
2013 1962  
2014 1963 #define EMUDABL 0x1 /* Emulation Disable. */
... ... @@ -2411,33 +2360,6 @@
2411 2360 #define BCODE_FULLBOOT 0x0010 /* always perform full boot */
2412 2361 #define BCODE_QUICKBOOT 0x0020 /* always perform quick boot */
2413 2362 #define BCODE_NOBOOT 0x0030 /* always perform full boot */
2414   -
2415   -/* CNT_COMMAND bit field options */
2416   -
2417   -#define W1LCNT_ZERO 0x0001 /* write 1 to load CNT_COUNTER with zero */
2418   -#define W1LCNT_MIN 0x0004 /* write 1 to load CNT_COUNTER from CNT_MIN */
2419   -#define W1LCNT_MAX 0x0008 /* write 1 to load CNT_COUNTER from CNT_MAX */
2420   -
2421   -#define W1LMIN_ZERO 0x0010 /* write 1 to load CNT_MIN with zero */
2422   -#define W1LMIN_CNT 0x0020 /* write 1 to load CNT_MIN from CNT_COUNTER */
2423   -#define W1LMIN_MAX 0x0080 /* write 1 to load CNT_MIN from CNT_MAX */
2424   -
2425   -#define W1LMAX_ZERO 0x0100 /* write 1 to load CNT_MAX with zero */
2426   -#define W1LMAX_CNT 0x0200 /* write 1 to load CNT_MAX from CNT_COUNTER */
2427   -#define W1LMAX_MIN 0x0400 /* write 1 to load CNT_MAX from CNT_MIN */
2428   -
2429   -/* CNT_CONFIG bit field options */
2430   -
2431   -#define CNTMODE_QUADENC 0x0000 /* quadrature encoder mode */
2432   -#define CNTMODE_BINENC 0x0100 /* binary encoder mode */
2433   -#define CNTMODE_UDCNT 0x0200 /* up/down counter mode */
2434   -#define CNTMODE_DIRCNT 0x0400 /* direction counter mode */
2435   -#define CNTMODE_DIRTMR 0x0500 /* direction timer mode */
2436   -
2437   -#define BNDMODE_COMP 0x0000 /* boundary compare mode */
2438   -#define BNDMODE_ZERO 0x1000 /* boundary compare and zero mode */
2439   -#define BNDMODE_CAPT 0x2000 /* boundary capture mode */
2440   -#define BNDMODE_AEXT 0x3000 /* boundary auto-extend mode */
2441 2363  
2442 2364 /* TMODE in TIMERx_CONFIG bit field options */
2443 2365