OMAP: OneNAND: determine frequency in one place

OneNAND frequency is determined when calculating GPMC timings. Return that value instead of determining it again in the OMAP OneNAND driver. Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>

OMAP: OneNAND: determine frequency in one place
OneNAND frequency is determined when calculating GPMC timings. Return that value instead of determining it again in the OMAP OneNAND driver. Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Adrian Hunter · Tony Lindgren
1 parent 1435ca0fc1
Showing 3 changed files with 12 additions and 28 deletions Side-by-side Diff
arch/arm/mach-omap2/gpmc-onenand.c
arch/arm/plat-omap/include/plat/onenand.h
drivers/mtd/onenand/omap2.c
@@ -123,7 +123,7 @@
  
 static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
 					void __iomem *onenand_base,
-					int freq)
+					int *freq_ptr)
 {
 	struct gpmc_timings t;
 	const int t_cer  = 15;
@@ -136,7 +136,7 @@
 	int tick_ns, div, fclk_offset_ns, fclk_offset, gpmc_clk_ns, latency;
 	int first_time = 0, hf = 0, vhf = 0, sync_read = 0, sync_write = 0;
 	int err, ticks_cez;
-	int cs = cfg->cs;
+	int cs = cfg->cs, freq = *freq_ptr;
 	u32 reg;
  
 	if (cfg->flags & ONENAND_SYNC_READ) {
  
  
@@ -330,16 +330,18 @@
  
 	set_onenand_cfg(onenand_base, latency, sync_read, sync_write, hf, vhf);
  
+	*freq_ptr = freq;
+
 	return 0;
 }
  
-static int gpmc_onenand_setup(void __iomem *onenand_base, int freq)
+static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr)
 {
 	struct device *dev = &gpmc_onenand_device.dev;
  
 	/* Set sync timings in GPMC */
 	if (omap2_onenand_set_sync_mode(gpmc_onenand_data, onenand_base,
-			freq) < 0) {
+			freq_ptr) < 0) {
 		dev_err(dev, "Unable to set synchronous mode\n");
 		return -EINVAL;
 	}
@@ -20,7 +20,7 @@
 	int			gpio_irq;
 	struct mtd_partition	*parts;
 	int			nr_parts;
-	int                     (*onenand_setup)(void __iomem *, int freq);
+	int			(*onenand_setup)(void __iomem *, int *freq_ptr);
 	int			dma_channel;
 	u8			flags;
 	u8			regulator_can_sleep;
@@ -63,7 +63,7 @@
 	struct completion dma_done;
 	int dma_channel;
 	int freq;
-	int (*setup)(void __iomem *base, int freq);
+	int (*setup)(void __iomem *base, int *freq_ptr);
 	struct regulator *regulator;
 };
  
@@ -581,7 +581,7 @@
  
 	/* DMA is not in use so this is all that is needed */
 	/* Revisit for OMAP3! */
-	ret = c->setup(c->onenand.base, c->freq);
+	ret = c->setup(c->onenand.base, &c->freq);
  
 	return ret;
 }
@@ -673,7 +673,7 @@
 	}
  
 	if (pdata->onenand_setup != NULL) {
-		r = pdata->onenand_setup(c->onenand.base, c->freq);
+		r = pdata->onenand_setup(c->onenand.base, &c->freq);
 		if (r < 0) {
 			dev_err(&pdev->dev, "Onenand platform setup failed: "
 				"%d\n", r);
@@ -718,8 +718,8 @@
 	}
  
 	dev_info(&pdev->dev, "initializing on CS%d, phys base 0x%08lx, virtual "
-		 "base %p\n", c->gpmc_cs, c->phys_base,
-		 c->onenand.base);
+		 "base %p, freq %d MHz\n", c->gpmc_cs, c->phys_base,
+		 c->onenand.base, c->freq);
  
 	c->pdev = pdev;
 	c->mtd.name = dev_name(&pdev->dev);
@@ -753,24 +753,6 @@
  
 	if ((r = onenand_scan(&c->mtd, 1)) < 0)
 		goto err_release_regulator;
-
-	switch ((c->onenand.version_id >> 4) & 0xf) {
-	case 0:
-		c->freq = 40;
-		break;
-	case 1:
-		c->freq = 54;
-		break;
-	case 2:
-		c->freq = 66;
-		break;
-	case 3:
-		c->freq = 83;
-		break;
-	case 4:
-		c->freq = 104;
-		break;
-	}
  
 #ifdef CONFIG_MTD_PARTITIONS
 	r = parse_mtd_partitions(&c->mtd, part_probes, &c->parts, 0);
...	...	@@ -123,7 +123,7 @@
123	123
124	124	static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
125	125	void __iomem *onenand_base,
126		- int freq)
	126	+ int *freq_ptr)
127	127	{
128	128	struct gpmc_timings t;
129	129	const int t_cer = 15;
...	...	@@ -136,7 +136,7 @@
136	136	int tick_ns, div, fclk_offset_ns, fclk_offset, gpmc_clk_ns, latency;
137	137	int first_time = 0, hf = 0, vhf = 0, sync_read = 0, sync_write = 0;
138	138	int err, ticks_cez;
139		- int cs = cfg->cs;
	139	+ int cs = cfg->cs, freq = *freq_ptr;
140	140	u32 reg;
141	141
142	142	if (cfg->flags & ONENAND_SYNC_READ) {
143	143
144	144
...	...	@@ -330,16 +330,18 @@
330	330
331	331	set_onenand_cfg(onenand_base, latency, sync_read, sync_write, hf, vhf);
332	332
	333	+ *freq_ptr = freq;
	334	+
333	335	return 0;
334	336	}
335	337
336		-static int gpmc_onenand_setup(void __iomem *onenand_base, int freq)
	338	+static int gpmc_onenand_setup(void __iomem onenand_base, int freq_ptr)
337	339	{
338	340	struct device *dev = &gpmc_onenand_device.dev;
339	341
340	342	/* Set sync timings in GPMC */
341	343	if (omap2_onenand_set_sync_mode(gpmc_onenand_data, onenand_base,
342		- freq) < 0) {
	344	+ freq_ptr) < 0) {
343	345	dev_err(dev, "Unable to set synchronous mode\n");
344	346	return -EINVAL;
345	347	}
...	...	@@ -20,7 +20,7 @@
20	20	int gpio_irq;
21	21	struct mtd_partition *parts;
22	22	int nr_parts;
23		- int (onenand_setup)(void __iomem , int freq);
	23	+ int (onenand_setup)(void __iomem , int *freq_ptr);
24	24	int dma_channel;
25	25	u8 flags;
26	26	u8 regulator_can_sleep;
...	...	@@ -63,7 +63,7 @@
63	63	struct completion dma_done;
64	64	int dma_channel;
65	65	int freq;
66		- int (setup)(void __iomem base, int freq);
	66	+ int (setup)(void __iomem base, int *freq_ptr);
67	67	struct regulator *regulator;
68	68	};
69	69
...	...	@@ -581,7 +581,7 @@
581	581
582	582	/* DMA is not in use so this is all that is needed */
583	583	/* Revisit for OMAP3! */
584		- ret = c->setup(c->onenand.base, c->freq);
	584	+ ret = c->setup(c->onenand.base, &c->freq);
585	585
586	586	return ret;
587	587	}
...	...	@@ -673,7 +673,7 @@
673	673	}
674	674
675	675	if (pdata->onenand_setup != NULL) {
676		- r = pdata->onenand_setup(c->onenand.base, c->freq);
	676	+ r = pdata->onenand_setup(c->onenand.base, &c->freq);
677	677	if (r < 0) {
678	678	dev_err(&pdev->dev, "Onenand platform setup failed: "
679	679	"%d\n", r);
...	...	@@ -718,8 +718,8 @@
718	718	}
719	719
720	720	dev_info(&pdev->dev, "initializing on CS%d, phys base 0x%08lx, virtual "
721		- "base %p\n", c->gpmc_cs, c->phys_base,
722		- c->onenand.base);
	721	+ "base %p, freq %d MHz\n", c->gpmc_cs, c->phys_base,
	722	+ c->onenand.base, c->freq);
723	723
724	724	c->pdev = pdev;
725	725	c->mtd.name = dev_name(&pdev->dev);
...	...	@@ -753,24 +753,6 @@
753	753
754	754	if ((r = onenand_scan(&c->mtd, 1)) < 0)
755	755	goto err_release_regulator;
756		-
757		- switch ((c->onenand.version_id >> 4) & 0xf) {
758		- case 0:
759		- c->freq = 40;
760		- break;
761		- case 1:
762		- c->freq = 54;
763		- break;
764		- case 2:
765		- c->freq = 66;
766		- break;
767		- case 3:
768		- c->freq = 83;
769		- break;
770		- case 4:
771		- c->freq = 104;
772		- break;
773		- }
774	756
775	757	#ifdef CONFIG_MTD_PARTITIONS
776	758	r = parse_mtd_partitions(&c->mtd, part_probes, &c->parts, 0);