MIPS: Alchemy: remove SOC_AU1X00 in favor of MIPS_ALCHEMY

Remove the CONFIG_SOC_AU1X00 Kconfig symbol since its job can also be done by MACH_ALCHEMY, now renamed to MIPS_ALCHEMY. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/1461/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

MIPS: Alchemy: remove SOC_AU1X00 in favor of MIPS_ALCHEMY
Remove the CONFIG_SOC_AU1X00 Kconfig symbol since its job can also be done by MACH_ALCHEMY, now renamed to MIPS_ALCHEMY. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/1461/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Manuel Lauss · Ralf Baechle
1 parent 745aef5df1
Showing 21 changed files with 33 additions and 51 deletions Side-by-side Diff
arch/mips/Kconfig
arch/mips/alchemy/Kconfig
arch/mips/alchemy/Platform
arch/mips/boot/compressed/Makefile
arch/mips/configs/db1000_defconfig
arch/mips/configs/db1100_defconfig
arch/mips/configs/db1200_defconfig
arch/mips/configs/db1500_defconfig
arch/mips/configs/db1550_defconfig
arch/mips/configs/mtx1_defconfig
arch/mips/configs/pb1100_defconfig
arch/mips/configs/pb1200_defconfig
arch/mips/configs/pb1500_defconfig
arch/mips/configs/pb1550_defconfig
arch/mips/include/asm/hazards.h
drivers/net/Kconfig
drivers/pcmcia/Kconfig
drivers/rtc/Kconfig
drivers/serial/Kconfig
drivers/usb/Kconfig
@@ -23,8 +23,17 @@
 	prompt "System type"
 	default SGI_IP22
  
-config MACH_ALCHEMY
+config MIPS_ALCHEMY
 	bool "Alchemy processor based machines"
+	select 64BIT_PHYS_ADDR
+	select CEVT_R4K_LIB
+	select CSRC_R4K_LIB
+	select IRQ_CPU
+	select SYS_HAS_CPU_MIPS32_R1
+	select SYS_SUPPORTS_32BIT_KERNEL
+	select SYS_SUPPORTS_APM_EMULATION
+	select GENERIC_GPIO
+	select ARCH_WANT_OPTIONAL_GPIOLIB
 	select SYS_SUPPORTS_ZBOOT
  
 config AR7
@@ -11,7 +11,7 @@
  
 choice
 	prompt "Machine type"
-	depends on MACH_ALCHEMY
+	depends on MIPS_ALCHEMY
 	default MIPS_DB1000
  
 config MIPS_MTX1
  
  
  
  
  
@@ -132,38 +132,21 @@
  
 config SOC_AU1000
 	bool
-	select SOC_AU1X00
 	select ALCHEMY_GPIOINT_AU1000
  
 config SOC_AU1100
 	bool
-	select SOC_AU1X00
 	select ALCHEMY_GPIOINT_AU1000
  
 config SOC_AU1500
 	bool
-	select SOC_AU1X00
 	select ALCHEMY_GPIOINT_AU1000
  
 config SOC_AU1550
 	bool
-	select SOC_AU1X00
 	select ALCHEMY_GPIOINT_AU1000
  
 config SOC_AU1200
 	bool
-	select SOC_AU1X00
 	select ALCHEMY_GPIOINT_AU1000
-
-config SOC_AU1X00
-	bool
-	select 64BIT_PHYS_ADDR
-	select CEVT_R4K_LIB
-	select CSRC_R4K_LIB
-	select IRQ_CPU
-	select SYS_HAS_CPU_MIPS32_R1
-	select SYS_SUPPORTS_32BIT_KERNEL
-	select SYS_SUPPORTS_APM_EMULATION
-	select GENERIC_GPIO
-	select ARCH_WANT_OPTIONAL_GPIOLIB
 #
 # Core Alchemy code
 #
-platform-$(CONFIG_MACH_ALCHEMY)	+= alchemy/common/
+platform-$(CONFIG_MIPS_ALCHEMY)	+= alchemy/common/
  
  
 #
@@ -106,5 +106,5 @@
 # compiler picks the board one.  If they don't, it will make sure
 # the alchemy generic gpio header is picked up.
  
-cflags-$(CONFIG_MACH_ALCHEMY)	+= -I$(srctree)/arch/mips/include/asm/mach-au1x00
+cflags-$(CONFIG_MIPS_ALCHEMY)	+= -I$(srctree)/arch/mips/include/asm/mach-au1x00
@@ -40,7 +40,7 @@
  
 ifdef CONFIG_DEBUG_ZBOOT
 vmlinuzobjs-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART16550) += $(obj)/uart-16550.o
-vmlinuzobjs-$(CONFIG_MACH_ALCHEMY)		   += $(obj)/uart-alchemy.o
+vmlinuzobjs-$(CONFIG_MIPS_ALCHEMY)		   += $(obj)/uart-alchemy.o
 endif
  
 targets += vmlinux.bin
@@ -8,7 +8,7 @@
 #
 # Machine selection
 #
-CONFIG_MACH_ALCHEMY=y
+CONFIG_MIPS_ALCHEMY=y
 # CONFIG_AR7 is not set
 # CONFIG_BCM47XX is not set
 # CONFIG_BCM63XX is not set
@@ -64,7 +64,6 @@
 # CONFIG_MIPS_PB1550 is not set
 # CONFIG_MIPS_XXS1500 is not set
 CONFIG_SOC_AU1000=y
-CONFIG_SOC_AU1X00=y
 CONFIG_LOONGSON_UART_BASE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
@@ -8,7 +8,7 @@
 #
 # Machine selection
 #
-CONFIG_MACH_ALCHEMY=y
+CONFIG_MIPS_ALCHEMY=y
 # CONFIG_AR7 is not set
 # CONFIG_BCM47XX is not set
 # CONFIG_BCM63XX is not set
@@ -64,7 +64,6 @@
 # CONFIG_MIPS_PB1550 is not set
 # CONFIG_MIPS_XXS1500 is not set
 CONFIG_SOC_AU1100=y
-CONFIG_SOC_AU1X00=y
 CONFIG_LOONGSON_UART_BASE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
@@ -8,7 +8,7 @@
 #
 # Machine selection
 #
-CONFIG_MACH_ALCHEMY=y
+CONFIG_MIPS_ALCHEMY=y
 # CONFIG_AR7 is not set
 # CONFIG_BCM47XX is not set
 # CONFIG_BCM63XX is not set
@@ -64,7 +64,6 @@
 # CONFIG_MIPS_PB1550 is not set
 # CONFIG_MIPS_XXS1500 is not set
 CONFIG_SOC_AU1200=y
-CONFIG_SOC_AU1X00=y
 CONFIG_LOONGSON_UART_BASE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
@@ -8,7 +8,7 @@
 #
 # Machine selection
 #
-CONFIG_MACH_ALCHEMY=y
+CONFIG_MIPS_ALCHEMY=y
 # CONFIG_AR7 is not set
 # CONFIG_BCM47XX is not set
 # CONFIG_BCM63XX is not set
@@ -64,7 +64,6 @@
 # CONFIG_MIPS_PB1550 is not set
 # CONFIG_MIPS_XXS1500 is not set
 CONFIG_SOC_AU1500=y
-CONFIG_SOC_AU1X00=y
 CONFIG_LOONGSON_UART_BASE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
@@ -8,7 +8,7 @@
 #
 # Machine selection
 #
-CONFIG_MACH_ALCHEMY=y
+CONFIG_MIPS_ALCHEMY=y
 # CONFIG_AR7 is not set
 # CONFIG_BCM47XX is not set
 # CONFIG_BCM63XX is not set
@@ -64,7 +64,6 @@
 # CONFIG_MIPS_PB1550 is not set
 # CONFIG_MIPS_XXS1500 is not set
 CONFIG_SOC_AU1550=y
-CONFIG_SOC_AU1X00=y
 CONFIG_LOONGSON_UART_BASE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
@@ -8,7 +8,7 @@
 #
 # Machine selection
 #
-CONFIG_MACH_ALCHEMY=y
+CONFIG_MIPS_ALCHEMY=y
 # CONFIG_AR7 is not set
 # CONFIG_BCM47XX is not set
 # CONFIG_BCM63XX is not set
@@ -64,7 +64,6 @@
 # CONFIG_MIPS_PB1550 is not set
 # CONFIG_MIPS_XXS1500 is not set
 CONFIG_SOC_AU1500=y
-CONFIG_SOC_AU1X00=y
 CONFIG_LOONGSON_UART_BASE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
@@ -8,7 +8,7 @@
 #
 # Machine selection
 #
-CONFIG_MACH_ALCHEMY=y
+CONFIG_MIPS_ALCHEMY=y
 # CONFIG_AR7 is not set
 # CONFIG_BCM47XX is not set
 # CONFIG_BCM63XX is not set
@@ -64,7 +64,6 @@
 # CONFIG_MIPS_PB1550 is not set
 # CONFIG_MIPS_XXS1500 is not set
 CONFIG_SOC_AU1100=y
-CONFIG_SOC_AU1X00=y
 CONFIG_LOONGSON_UART_BASE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
@@ -8,7 +8,7 @@
 #
 # Machine selection
 #
-CONFIG_MACH_ALCHEMY=y
+CONFIG_MIPS_ALCHEMY=y
 # CONFIG_AR7 is not set
 # CONFIG_BCM47XX is not set
 # CONFIG_BCM63XX is not set
@@ -64,7 +64,6 @@
 # CONFIG_MIPS_PB1550 is not set
 # CONFIG_MIPS_XXS1500 is not set
 CONFIG_SOC_AU1200=y
-CONFIG_SOC_AU1X00=y
 CONFIG_LOONGSON_UART_BASE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
@@ -8,7 +8,7 @@
 #
 # Machine selection
 #
-CONFIG_MACH_ALCHEMY=y
+CONFIG_MIPS_ALCHEMY=y
 # CONFIG_AR7 is not set
 # CONFIG_BCM47XX is not set
 # CONFIG_BCM63XX is not set
@@ -64,7 +64,6 @@
 # CONFIG_MIPS_PB1550 is not set
 # CONFIG_MIPS_XXS1500 is not set
 CONFIG_SOC_AU1500=y
-CONFIG_SOC_AU1X00=y
 CONFIG_LOONGSON_UART_BASE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
@@ -8,7 +8,7 @@
 #
 # Machine selection
 #
-CONFIG_MACH_ALCHEMY=y
+CONFIG_MIPS_ALCHEMY=y
 # CONFIG_AR7 is not set
 # CONFIG_BCM47XX is not set
 # CONFIG_BCM63XX is not set
@@ -64,7 +64,6 @@
 CONFIG_MIPS_PB1550=y
 # CONFIG_MIPS_XXS1500 is not set
 CONFIG_SOC_AU1550=y
-CONFIG_SOC_AU1X00=y
 CONFIG_LOONGSON_UART_BASE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
@@ -87,7 +87,7 @@
 	: "=r" (tmp));							\
 } while (0)
  
-#elif defined(CONFIG_CPU_MIPSR1) && !defined(CONFIG_MACH_ALCHEMY)
+#elif defined(CONFIG_CPU_MIPSR1) && !defined(CONFIG_MIPS_ALCHEMY)
  
 /*
  * These are slightly complicated by the fact that we guarantee R1 kernels to
@@ -138,7 +138,7 @@
 		__instruction_hazard();					\
 } while (0)
  
-#elif defined(CONFIG_MACH_ALCHEMY) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \
+#elif defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \
       defined(CONFIG_CPU_LOONGSON2) || defined(CONFIG_CPU_R10000) || \
       defined(CONFIG_CPU_R5500)
  
@@ -484,7 +484,7 @@
  
 config MIPS_AU1X00_ENET
 	tristate "MIPS AU1000 Ethernet support"
-	depends on SOC_AU1X00
+	depends on MIPS_ALCHEMY
 	select PHYLIB
 	select CRC32
 	help
@@ -157,11 +157,11 @@
  
 config PCMCIA_AU1X00
 	tristate "Au1x00 pcmcia support"
-	depends on SOC_AU1X00 && PCMCIA
+	depends on MIPS_ALCHEMY && PCMCIA
  
 config PCMCIA_ALCHEMY_DEVBOARD
 	tristate "Alchemy Db/Pb1xxx PCMCIA socket services"
-	depends on SOC_AU1X00 && PCMCIA
+	depends on MIPS_ALCHEMY && PCMCIA
 	select 64BIT_PHYS_ADDR
 	help
 	  Enable this driver of you want PCMCIA support on your Alchemy
@@ -774,7 +774,7 @@
  
 config RTC_DRV_AU1XXX
 	tristate "Au1xxx Counter0 RTC support"
-	depends on SOC_AU1X00
+	depends on MIPS_ALCHEMY
 	help
 	  This is a driver for the Au1xxx on-chip Counter0 (Time-Of-Year
 	  counter) to be used as a RTC.
@@ -260,7 +260,7 @@
  
 config SERIAL_8250_AU1X00
 	bool "Au1x00 serial port support"
-	depends on SERIAL_8250 != n && SOC_AU1X00
+	depends on SERIAL_8250 != n && MIPS_ALCHEMY
 	help
 	  If you have an Au1x00 SOC based board and want to use the serial port,
 	  say Y to this option. The driver can handle up to 4 serial ports,
@@ -45,7 +45,7 @@
 	default y if STB03xxx
 	default y if PPC_MPC52xx
 	# MIPS:
-	default y if SOC_AU1X00
+	default y if MIPS_ALCHEMY
 	# SH:
 	default y if CPU_SUBTYPE_SH7720
 	default y if CPU_SUBTYPE_SH7721
@@ -1031,7 +1031,7 @@
 #define PLATFORM_DRIVER		ohci_hcd_ep93xx_driver
 #endif
  
-#ifdef CONFIG_SOC_AU1X00
+#ifdef CONFIG_MIPS_ALCHEMY
 #include "ohci-au1xxx.c"
 #define PLATFORM_DRIVER		ohci_hcd_au1xxx_driver
 #endif
...	...	@@ -23,8 +23,17 @@
23	23	prompt "System type"
24	24	default SGI_IP22
25	25
26		-config MACH_ALCHEMY
	26	+config MIPS_ALCHEMY
27	27	bool "Alchemy processor based machines"
	28	+ select 64BIT_PHYS_ADDR
	29	+ select CEVT_R4K_LIB
	30	+ select CSRC_R4K_LIB
	31	+ select IRQ_CPU
	32	+ select SYS_HAS_CPU_MIPS32_R1
	33	+ select SYS_SUPPORTS_32BIT_KERNEL
	34	+ select SYS_SUPPORTS_APM_EMULATION
	35	+ select GENERIC_GPIO
	36	+ select ARCH_WANT_OPTIONAL_GPIOLIB
28	37	select SYS_SUPPORTS_ZBOOT
29	38
30	39	config AR7
...	...	@@ -11,7 +11,7 @@
11	11
12	12	choice
13	13	prompt "Machine type"
14		- depends on MACH_ALCHEMY
	14	+ depends on MIPS_ALCHEMY
15	15	default MIPS_DB1000
16	16
17	17	config MIPS_MTX1
18	18
19	19
20	20
21	21
22	22
...	...	@@ -132,38 +132,21 @@
132	132
133	133	config SOC_AU1000
134	134	bool
135		- select SOC_AU1X00
136	135	select ALCHEMY_GPIOINT_AU1000
137	136
138	137	config SOC_AU1100
139	138	bool
140		- select SOC_AU1X00
141	139	select ALCHEMY_GPIOINT_AU1000
142	140
143	141	config SOC_AU1500
144	142	bool
145		- select SOC_AU1X00
146	143	select ALCHEMY_GPIOINT_AU1000
147	144
148	145	config SOC_AU1550
149	146	bool
150		- select SOC_AU1X00
151	147	select ALCHEMY_GPIOINT_AU1000
152	148
153	149	config SOC_AU1200
154	150	bool
155		- select SOC_AU1X00
156	151	select ALCHEMY_GPIOINT_AU1000
157		-
158		-config SOC_AU1X00
159		- bool
160		- select 64BIT_PHYS_ADDR
161		- select CEVT_R4K_LIB
162		- select CSRC_R4K_LIB
163		- select IRQ_CPU
164		- select SYS_HAS_CPU_MIPS32_R1
165		- select SYS_SUPPORTS_32BIT_KERNEL
166		- select SYS_SUPPORTS_APM_EMULATION
167		- select GENERIC_GPIO
168		- select ARCH_WANT_OPTIONAL_GPIOLIB
1	1	#
2	2	# Core Alchemy code
3	3	#
4		-platform-$(CONFIG_MACH_ALCHEMY) += alchemy/common/
	4	+platform-$(CONFIG_MIPS_ALCHEMY) += alchemy/common/
5	5
6	6
7	7	#
...	...	@@ -106,5 +106,5 @@
106	106	# compiler picks the board one. If they don't, it will make sure
107	107	# the alchemy generic gpio header is picked up.
108	108
109		-cflags-$(CONFIG_MACH_ALCHEMY) += -I$(srctree)/arch/mips/include/asm/mach-au1x00
	109	+cflags-$(CONFIG_MIPS_ALCHEMY) += -I$(srctree)/arch/mips/include/asm/mach-au1x00
...	...	@@ -40,7 +40,7 @@
40	40
41	41	ifdef CONFIG_DEBUG_ZBOOT
42	42	vmlinuzobjs-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART16550) += $(obj)/uart-16550.o
43		-vmlinuzobjs-$(CONFIG_MACH_ALCHEMY) += $(obj)/uart-alchemy.o
	43	+vmlinuzobjs-$(CONFIG_MIPS_ALCHEMY) += $(obj)/uart-alchemy.o
44	44	endif
45	45
46	46	targets += vmlinux.bin
...	...	@@ -8,7 +8,7 @@
8	8	#
9	9	# Machine selection
10	10	#
11		-CONFIG_MACH_ALCHEMY=y
	11	+CONFIG_MIPS_ALCHEMY=y
12	12	# CONFIG_AR7 is not set
13	13	# CONFIG_BCM47XX is not set
14	14	# CONFIG_BCM63XX is not set
...	...	@@ -64,7 +64,6 @@
64	64	# CONFIG_MIPS_PB1550 is not set
65	65	# CONFIG_MIPS_XXS1500 is not set
66	66	CONFIG_SOC_AU1000=y
67		-CONFIG_SOC_AU1X00=y
68	67	CONFIG_LOONGSON_UART_BASE=y
69	68	CONFIG_RWSEM_GENERIC_SPINLOCK=y
70	69	# CONFIG_ARCH_HAS_ILOG2_U32 is not set
...	...	@@ -87,7 +87,7 @@
87	87	: "=r" (tmp)); \
88	88	} while (0)
89	89
90		-#elif defined(CONFIG_CPU_MIPSR1) && !defined(CONFIG_MACH_ALCHEMY)
	90	+#elif defined(CONFIG_CPU_MIPSR1) && !defined(CONFIG_MIPS_ALCHEMY)
91	91
92	92	/*
93	93	* These are slightly complicated by the fact that we guarantee R1 kernels to
...	...	@@ -138,7 +138,7 @@
138	138	__instruction_hazard(); \
139	139	} while (0)
140	140
141		-#elif defined(CONFIG_MACH_ALCHEMY) \|\| defined(CONFIG_CPU_CAVIUM_OCTEON) \|\| \
	141	+#elif defined(CONFIG_MIPS_ALCHEMY) \|\| defined(CONFIG_CPU_CAVIUM_OCTEON) \|\| \
142	142	defined(CONFIG_CPU_LOONGSON2) \|\| defined(CONFIG_CPU_R10000) \|\| \
143	143	defined(CONFIG_CPU_R5500)
144	144
...	...	@@ -484,7 +484,7 @@
484	484
485	485	config MIPS_AU1X00_ENET
486	486	tristate "MIPS AU1000 Ethernet support"
487		- depends on SOC_AU1X00
	487	+ depends on MIPS_ALCHEMY
488	488	select PHYLIB
489	489	select CRC32
490	490	help
...	...	@@ -157,11 +157,11 @@
157	157
158	158	config PCMCIA_AU1X00
159	159	tristate "Au1x00 pcmcia support"
160		- depends on SOC_AU1X00 && PCMCIA
	160	+ depends on MIPS_ALCHEMY && PCMCIA
161	161
162	162	config PCMCIA_ALCHEMY_DEVBOARD
163	163	tristate "Alchemy Db/Pb1xxx PCMCIA socket services"
164		- depends on SOC_AU1X00 && PCMCIA
	164	+ depends on MIPS_ALCHEMY && PCMCIA
165	165	select 64BIT_PHYS_ADDR
166	166	help
167	167	Enable this driver of you want PCMCIA support on your Alchemy
...	...	@@ -774,7 +774,7 @@
774	774
775	775	config RTC_DRV_AU1XXX
776	776	tristate "Au1xxx Counter0 RTC support"
777		- depends on SOC_AU1X00
	777	+ depends on MIPS_ALCHEMY
778	778	help
779	779	This is a driver for the Au1xxx on-chip Counter0 (Time-Of-Year
780	780	counter) to be used as a RTC.
...	...	@@ -260,7 +260,7 @@
260	260
261	261	config SERIAL_8250_AU1X00
262	262	bool "Au1x00 serial port support"
263		- depends on SERIAL_8250 != n && SOC_AU1X00
	263	+ depends on SERIAL_8250 != n && MIPS_ALCHEMY
264	264	help
265	265	If you have an Au1x00 SOC based board and want to use the serial port,
266	266	say Y to this option. The driver can handle up to 4 serial ports,