Commit 4a1479b6ec268d527b842878da59712620dca78c
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cc24c40594
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m68knommu: add smc91x support to ColdFire 5249 platform
The Freescale M5249EVB board is fitted with an SMC LAN91c11 ethernet device. Add platform support to the M5249EVB setup code to support this. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Showing 1 changed file with 48 additions and 0 deletions Side-by-side Diff
arch/m68knommu/platform/5249/config.c
... | ... | @@ -40,6 +40,30 @@ |
40 | 40 | .dev.platform_data = m5249_uart_platform, |
41 | 41 | }; |
42 | 42 | |
43 | +#ifdef CONFIG_M5249C3 | |
44 | + | |
45 | +static struct resource m5249_smc91x_resources[] = { | |
46 | + { | |
47 | + .start = 0xe0000300, | |
48 | + .end = 0xe0000300 + 0x100, | |
49 | + .flags = IORESOURCE_MEM, | |
50 | + }, | |
51 | + { | |
52 | + .start = MCFINTC2_GPIOIRQ6, | |
53 | + .end = MCFINTC2_GPIOIRQ6, | |
54 | + .flags = IORESOURCE_IRQ, | |
55 | + }, | |
56 | +}; | |
57 | + | |
58 | +static struct platform_device m5249_smc91x = { | |
59 | + .name = "smc91x", | |
60 | + .id = 0, | |
61 | + .num_resources = ARRAY_SIZE(m5249_smc91x_resources), | |
62 | + .resource = m5249_smc91x_resources, | |
63 | +}; | |
64 | + | |
65 | +#endif /* CONFIG_M5249C3 */ | |
66 | + | |
43 | 67 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) |
44 | 68 | static struct resource m5249_qspi_resources[] = { |
45 | 69 | { |
... | ... | @@ -200,6 +224,9 @@ |
200 | 224 | |
201 | 225 | static struct platform_device *m5249_devices[] __initdata = { |
202 | 226 | &m5249_uart, |
227 | +#ifdef CONFIG_M5249C3 | |
228 | + &m5249_smc91x, | |
229 | +#endif | |
203 | 230 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) |
204 | 231 | &m5249_qspi, |
205 | 232 | #endif |
... | ... | @@ -231,6 +258,24 @@ |
231 | 258 | |
232 | 259 | /***************************************************************************/ |
233 | 260 | |
261 | +#ifdef CONFIG_M5249C3 | |
262 | + | |
263 | +static void __init m5249_smc91x_init(void) | |
264 | +{ | |
265 | + u32 gpio; | |
266 | + | |
267 | + /* Set the GPIO line as interrupt source for smc91x device */ | |
268 | + gpio = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); | |
269 | + writel(gpio | 0x40, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); | |
270 | + | |
271 | + gpio = readl(MCF_MBAR2 + MCFSIM2_INTLEVEL5); | |
272 | + writel(gpio | 0x04000000, MCF_MBAR2 + MCFSIM2_INTLEVEL5); | |
273 | +} | |
274 | + | |
275 | +#endif /* CONFIG_M5249C3 */ | |
276 | + | |
277 | +/***************************************************************************/ | |
278 | + | |
234 | 279 | static void __init m5249_timers_init(void) |
235 | 280 | { |
236 | 281 | /* Timer1 is always used as system timer */ |
... | ... | @@ -264,6 +309,9 @@ |
264 | 309 | mach_reset = m5249_cpu_reset; |
265 | 310 | m5249_timers_init(); |
266 | 311 | m5249_uarts_init(); |
312 | +#ifdef CONFIG_M5249C3 | |
313 | + m5249_smc91x_init(); | |
314 | +#endif | |
267 | 315 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) |
268 | 316 | m5249_qspi_init(); |
269 | 317 | #endif |