Eric Lee / linux-smarc-t335x-v3.2

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Commit 4a3f8913f5f89039d97acdd8f896a31ee60a7c78

Authored by Nishanth Menon
Committed by Afzal Mohammed
1 parent 866c74bf7d
Exists in master

OMAP3+: OPP: add clock and voltagedomain info 

With hwmods, ideally, we should have been able to do:
pdm = omap_hwmod_get_pwrdm(oh);
voltdm = pwrdm_get_voltdm(pdm);
clk = clk_get(oh->main_clk);

Unfortunately hwmod database is'nt mature enough yet to handle
silicon variance within the same family, e.g. 4430 Vs 4460.
So we explicitly map the domain and clk names within the OPP
entries. This allows us to scale by having a central location for
the registration.

IMPORTANT NOTE: we probably will need to fix core and iva clk
setting.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com>
[vaibhav.bedia@ti.com: Pull in for AM33xx]
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>

Showing 3 changed files with 37 additions and 33 deletions Inline Diff

arch/arm/mach-omap2/omap_opp_data.h
Diff comments   View file @ 4a3f891
1 /* 1 /*
2 * OMAP SoC specific OPP Data helpers 2 * OMAP SoC specific OPP Data helpers
3 * 3 *
4 * Copyright (C) 2009-2010 Texas Instruments Incorporated - http://www.ti.com/ 4 * Copyright (C) 2009-2010 Texas Instruments Incorporated - http://www.ti.com/
5 * Nishanth Menon 5 * Nishanth Menon
6 * Kevin Hilman 6 * Kevin Hilman
7 * Copyright (C) 2010 Nokia Corporation. 7 * Copyright (C) 2010 Nokia Corporation.
8 * Eduardo Valentin 8 * Eduardo Valentin
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 * 13 *
14 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 14 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
15 * kind, whether express or implied; without even the implied warranty 15 * kind, whether express or implied; without even the implied warranty
16 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details. 17 * GNU General Public License for more details.
18 */ 18 */
19 #ifndef __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H 19 #ifndef __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H
20 #define __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H 20 #define __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H
21 21
22 #include <plat/omap_hwmod.h> 22 #include <plat/omap_hwmod.h>
23 23
24 #include "voltage.h" 24 #include "voltage.h"
25 25
26 /* 26 /*
27 * *BIG FAT WARNING*: 27 * *BIG FAT WARNING*:
28 * USE the following ONLY in opp data initialization common to an SoC. 28 * USE the following ONLY in opp data initialization common to an SoC.
29 * DO NOT USE these in board files/pm core etc. 29 * DO NOT USE these in board files/pm core etc.
30 */ 30 */
31 31
32 /** 32 /**
33 * struct omap_opp_def - OMAP OPP Definition 33 * struct omap_opp_def - OMAP OPP Definition
34 * @hwmod_name: Name of the hwmod for this domain 34 * @hwmod_name: Name of the hwmod for this domain
35 * @freq: Frequency in hertz corresponding to this OPP 35 * @freq: Frequency in hertz corresponding to this OPP
36 * @u_volt: Nominal voltage in microvolts corresponding to this OPP 36 * @u_volt: Nominal voltage in microvolts corresponding to this OPP
37 * @default_available: True/false - is this OPP available by default 37 * @default_available: True/false - is this OPP available by default
38 * 38 *
39 * OMAP SOCs have a standard set of tuples consisting of frequency and voltage 39 * OMAP SOCs have a standard set of tuples consisting of frequency and voltage
40 * pairs that the device will support per voltage domain. This is called 40 * pairs that the device will support per voltage domain. This is called
41 * Operating Points or OPP. The actual definitions of OMAP Operating Points 41 * Operating Points or OPP. The actual definitions of OMAP Operating Points
42 * varies over silicon within the same family of devices. For a specific 42 * varies over silicon within the same family of devices. For a specific
43 * domain, you can have a set of {frequency, voltage} pairs and this is denoted 43 * domain, you can have a set of {frequency, voltage} pairs and this is denoted
44 * by an array of omap_opp_def. As the kernel boots and more information is 44 * by an array of omap_opp_def. As the kernel boots and more information is
45 * available, a set of these are activated based on the precise nature of 45 * available, a set of these are activated based on the precise nature of
46 * device the kernel boots up on. It is interesting to remember that each IP 46 * device the kernel boots up on. It is interesting to remember that each IP
47 * which belongs to a voltage domain may define their own set of OPPs on top 47 * which belongs to a voltage domain may define their own set of OPPs on top
48 * of this - but this is handled by the appropriate driver. 48 * of this - but this is handled by the appropriate driver.
49 */ 49 */
50 struct omap_opp_def { 50 struct omap_opp_def {
51 char *hwmod_name; 51 char *hwmod_name;
52 char *voltdm_name;
53 char *clk_name;
52 54
53 unsigned long freq; 55 unsigned long freq;
54 unsigned long u_volt; 56 unsigned long u_volt;
55 57
56 bool default_available; 58 bool default_available;
57 }; 59 };
58 60
59 /* 61 /*
60 * Initialization wrapper used to define an OPP for OMAP variants. 62 * Initialization wrapper used to define an OPP for OMAP variants.
61 */ 63 */
62 #define OPP_INITIALIZER(_hwmod_name, _enabled, _freq, _uv) \ 64 #define OPP_INITIALIZER(_hwmod_name, _clk_name, _voltdm_name, _enabled, _freq, _uv) \
63 { \ 65 { \
64 .hwmod_name = _hwmod_name, \ 66 .hwmod_name = _hwmod_name, \
67 .clk_name = _clk_name, \
68 .voltdm_name = _voltdm_name, \
65 .default_available = _enabled, \ 69 .default_available = _enabled, \
66 .freq = _freq, \ 70 .freq = _freq, \
67 .u_volt = _uv, \ 71 .u_volt = _uv, \
68 } 72 }
69 73
70 /* 74 /*
71 * Initialization wrapper used to define SmartReflex process data 75 * Initialization wrapper used to define SmartReflex process data
72 * XXX Is this needed? Just use C99 initializers in data files? 76 * XXX Is this needed? Just use C99 initializers in data files?
73 */ 77 */
74 #define VOLT_DATA_DEFINE(_v_nom, _efuse_offs, _errminlimit, _errgain) \ 78 #define VOLT_DATA_DEFINE(_v_nom, _efuse_offs, _errminlimit, _errgain) \
75 { \ 79 { \
76 .volt_nominal = _v_nom, \ 80 .volt_nominal = _v_nom, \
77 .sr_efuse_offs = _efuse_offs, \ 81 .sr_efuse_offs = _efuse_offs, \
78 .sr_errminlimit = _errminlimit, \ 82 .sr_errminlimit = _errminlimit, \
79 .vp_errgain = _errgain \ 83 .vp_errgain = _errgain \
80 } 84 }
81 85
82 /* Use this to initialize the default table */ 86 /* Use this to initialize the default table */
83 extern int __init omap_init_opp_table(struct omap_opp_def *opp_def, 87 extern int __init omap_init_opp_table(struct omap_opp_def *opp_def,
84 u32 opp_def_size); 88 u32 opp_def_size);
85 89
86 90
87 extern struct omap_volt_data omap34xx_vddmpu_volt_data[]; 91 extern struct omap_volt_data omap34xx_vddmpu_volt_data[];
88 extern struct omap_volt_data omap34xx_vddcore_volt_data[]; 92 extern struct omap_volt_data omap34xx_vddcore_volt_data[];
89 extern struct omap_vdd_dep_info omap34xx_vddmpu_dep_info[]; 93 extern struct omap_vdd_dep_info omap34xx_vddmpu_dep_info[];
90 extern struct omap_volt_data omap36xx_vddmpu_volt_data[]; 94 extern struct omap_volt_data omap36xx_vddmpu_volt_data[];
91 extern struct omap_volt_data omap36xx_vddcore_volt_data[]; 95 extern struct omap_volt_data omap36xx_vddcore_volt_data[];
92 extern struct omap_vdd_dep_info omap36xx_vddmpu_dep_info[]; 96 extern struct omap_vdd_dep_info omap36xx_vddmpu_dep_info[];
93 97
94 extern struct omap_volt_data omap44xx_vdd_mpu_volt_data[]; 98 extern struct omap_volt_data omap44xx_vdd_mpu_volt_data[];
95 extern struct omap_volt_data omap44xx_vdd_iva_volt_data[]; 99 extern struct omap_volt_data omap44xx_vdd_iva_volt_data[];
96 extern struct omap_volt_data omap44xx_vdd_core_volt_data[]; 100 extern struct omap_volt_data omap44xx_vdd_core_volt_data[];
97 101
98 extern struct omap_vdd_dep_info omap443x_vddmpu_dep_info[]; 102 extern struct omap_vdd_dep_info omap443x_vddmpu_dep_info[];
99 extern struct omap_vdd_dep_info omap443x_vddiva_dep_info[]; 103 extern struct omap_vdd_dep_info omap443x_vddiva_dep_info[];
100 104
101 #endif /* __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H */ 105 #endif /* __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H */
102 106
arch/arm/mach-omap2/opp3xxx_data.c
Diff comments   View file @ 4a3f891
1 /* 1 /*
2 * OMAP3 OPP table definitions. 2 * OMAP3 OPP table definitions.
3 * 3 *
4 * Copyright (C) 2009-2010 Texas Instruments Incorporated - http://www.ti.com/ 4 * Copyright (C) 2009-2010 Texas Instruments Incorporated - http://www.ti.com/
5 * Nishanth Menon 5 * Nishanth Menon
6 * Kevin Hilman 6 * Kevin Hilman
7 * Copyright (C) 2010-2011 Nokia Corporation. 7 * Copyright (C) 2010-2011 Nokia Corporation.
8 * Eduardo Valentin 8 * Eduardo Valentin
9 * Paul Walmsley 9 * Paul Walmsley
10 * 10 *
11 * This program is free software; you can redistribute it and/or modify 11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as 12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation. 13 * published by the Free Software Foundation.
14 * 14 *
15 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 15 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
16 * kind, whether express or implied; without even the implied warranty 16 * kind, whether express or implied; without even the implied warranty
17 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details. 18 * GNU General Public License for more details.
19 */ 19 */
20 #include <linux/module.h> 20 #include <linux/module.h>
21 21
22 #include <plat/cpu.h> 22 #include <plat/cpu.h>
23 23
24 #include "control.h" 24 #include "control.h"
25 #include "omap_opp_data.h" 25 #include "omap_opp_data.h"
26 #include "pm.h" 26 #include "pm.h"
27 27
28 /* 34xx */ 28 /* 34xx */
29 29
30 /* VDD1 */ 30 /* VDD1 */
31 31
32 #define OMAP3430_VDD_MPU_OPP1_UV 975000 32 #define OMAP3430_VDD_MPU_OPP1_UV 975000
33 #define OMAP3430_VDD_MPU_OPP2_UV 1075000 33 #define OMAP3430_VDD_MPU_OPP2_UV 1075000
34 #define OMAP3430_VDD_MPU_OPP3_UV 1200000 34 #define OMAP3430_VDD_MPU_OPP3_UV 1200000
35 #define OMAP3430_VDD_MPU_OPP4_UV 1270000 35 #define OMAP3430_VDD_MPU_OPP4_UV 1270000
36 #define OMAP3430_VDD_MPU_OPP5_UV 1350000 36 #define OMAP3430_VDD_MPU_OPP5_UV 1350000
37 37
38 struct omap_volt_data omap34xx_vddmpu_volt_data[] = { 38 struct omap_volt_data omap34xx_vddmpu_volt_data[] = {
39 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c), 39 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c),
40 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c), 40 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c),
41 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18), 41 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18),
42 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18), 42 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18),
43 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18), 43 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18),
44 VOLT_DATA_DEFINE(0, 0, 0, 0), 44 VOLT_DATA_DEFINE(0, 0, 0, 0),
45 }; 45 };
46 46
47 /* VDD2 */ 47 /* VDD2 */
48 48
49 #define OMAP3430_VDD_CORE_OPP1_UV 975000 49 #define OMAP3430_VDD_CORE_OPP1_UV 975000
50 #define OMAP3430_VDD_CORE_OPP2_UV 1050000 50 #define OMAP3430_VDD_CORE_OPP2_UV 1050000
51 #define OMAP3430_VDD_CORE_OPP3_UV 1150000 51 #define OMAP3430_VDD_CORE_OPP3_UV 1150000
52 52
53 struct omap_volt_data omap34xx_vddcore_volt_data[] = { 53 struct omap_volt_data omap34xx_vddcore_volt_data[] = {
54 VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c), 54 VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c),
55 VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c), 55 VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c),
56 VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18), 56 VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18),
57 VOLT_DATA_DEFINE(0, 0, 0, 0), 57 VOLT_DATA_DEFINE(0, 0, 0, 0),
58 }; 58 };
59 59
60 /* OMAP 3430 MPU Core VDD dependency table */ 60 /* OMAP 3430 MPU Core VDD dependency table */
61 static struct omap_vdd_dep_volt omap34xx_vdd_mpu_core_dep_data[] = { 61 static struct omap_vdd_dep_volt omap34xx_vdd_mpu_core_dep_data[] = {
62 {.main_vdd_volt = OMAP3430_VDD_MPU_OPP1_UV, .dep_vdd_volt = OMAP3430_VDD_CORE_OPP2_UV}, 62 {.main_vdd_volt = OMAP3430_VDD_MPU_OPP1_UV, .dep_vdd_volt = OMAP3430_VDD_CORE_OPP2_UV},
63 {.main_vdd_volt = OMAP3430_VDD_MPU_OPP2_UV, .dep_vdd_volt = OMAP3430_VDD_CORE_OPP2_UV}, 63 {.main_vdd_volt = OMAP3430_VDD_MPU_OPP2_UV, .dep_vdd_volt = OMAP3430_VDD_CORE_OPP2_UV},
64 {.main_vdd_volt = OMAP3430_VDD_MPU_OPP3_UV, .dep_vdd_volt = OMAP3430_VDD_CORE_OPP3_UV}, 64 {.main_vdd_volt = OMAP3430_VDD_MPU_OPP3_UV, .dep_vdd_volt = OMAP3430_VDD_CORE_OPP3_UV},
65 {.main_vdd_volt = OMAP3430_VDD_MPU_OPP4_UV, .dep_vdd_volt = OMAP3430_VDD_CORE_OPP3_UV}, 65 {.main_vdd_volt = OMAP3430_VDD_MPU_OPP4_UV, .dep_vdd_volt = OMAP3430_VDD_CORE_OPP3_UV},
66 {.main_vdd_volt = OMAP3430_VDD_MPU_OPP5_UV, .dep_vdd_volt = OMAP3430_VDD_CORE_OPP3_UV}, 66 {.main_vdd_volt = OMAP3430_VDD_MPU_OPP5_UV, .dep_vdd_volt = OMAP3430_VDD_CORE_OPP3_UV},
67 }; 67 };
68 68
69 struct omap_vdd_dep_info omap34xx_vddmpu_dep_info[] = { 69 struct omap_vdd_dep_info omap34xx_vddmpu_dep_info[] = {
70 { 70 {
71 .name = "core", 71 .name = "core",
72 .dep_table = omap34xx_vdd_mpu_core_dep_data, 72 .dep_table = omap34xx_vdd_mpu_core_dep_data,
73 .nr_dep_entries = ARRAY_SIZE(omap34xx_vdd_mpu_core_dep_data), 73 .nr_dep_entries = ARRAY_SIZE(omap34xx_vdd_mpu_core_dep_data),
74 }, 74 },
75 {.name = NULL, .dep_table = NULL, .nr_dep_entries = 0}, 75 {.name = NULL, .dep_table = NULL, .nr_dep_entries = 0},
76 }; 76 };
77 77
78 /* 36xx */ 78 /* 36xx */
79 79
80 /* VDD1 */ 80 /* VDD1 */
81 81
82 #define OMAP3630_VDD_MPU_OPP50_UV 1012500 82 #define OMAP3630_VDD_MPU_OPP50_UV 1012500
83 #define OMAP3630_VDD_MPU_OPP100_UV 1200000 83 #define OMAP3630_VDD_MPU_OPP100_UV 1200000
84 #define OMAP3630_VDD_MPU_OPP120_UV 1325000 84 #define OMAP3630_VDD_MPU_OPP120_UV 1325000
85 #define OMAP3630_VDD_MPU_OPP1G_UV 1375000 85 #define OMAP3630_VDD_MPU_OPP1G_UV 1375000
86 86
87 struct omap_volt_data omap36xx_vddmpu_volt_data[] = { 87 struct omap_volt_data omap36xx_vddmpu_volt_data[] = {
88 VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c), 88 VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c),
89 VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16), 89 VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16),
90 VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23), 90 VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23),
91 VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27), 91 VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27),
92 VOLT_DATA_DEFINE(0, 0, 0, 0), 92 VOLT_DATA_DEFINE(0, 0, 0, 0),
93 }; 93 };
94 94
95 /* VDD2 */ 95 /* VDD2 */
96 96
97 #define OMAP3630_VDD_CORE_OPP50_UV 1000000 97 #define OMAP3630_VDD_CORE_OPP50_UV 1000000
98 #define OMAP3630_VDD_CORE_OPP100_UV 1200000 98 #define OMAP3630_VDD_CORE_OPP100_UV 1200000
99 99
100 struct omap_volt_data omap36xx_vddcore_volt_data[] = { 100 struct omap_volt_data omap36xx_vddcore_volt_data[] = {
101 VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c), 101 VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c),
102 VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16), 102 VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16),
103 VOLT_DATA_DEFINE(0, 0, 0, 0), 103 VOLT_DATA_DEFINE(0, 0, 0, 0),
104 }; 104 };
105 105
106 /* OPP data */ 106 /* OPP data */
107 107
108 static struct omap_opp_def __initdata omap34xx_opp_def_list[] = { 108 static struct omap_opp_def __initdata omap34xx_opp_def_list[] = {
109 /* MPU OPP1 */ 109 /* MPU OPP1 */
110 OPP_INITIALIZER("mpu", true, 125000000, OMAP3430_VDD_MPU_OPP1_UV), 110 OPP_INITIALIZER("mpu", "dpll1_ck", "mpu_iva", true, 125000000, OMAP3430_VDD_MPU_OPP1_UV),
111 /* MPU OPP2 */ 111 /* MPU OPP2 */
112 OPP_INITIALIZER("mpu", true, 250000000, OMAP3430_VDD_MPU_OPP2_UV), 112 OPP_INITIALIZER("mpu", "dpll1_ck", "mpu_iva", true, 250000000, OMAP3430_VDD_MPU_OPP2_UV),
113 /* MPU OPP3 */ 113 /* MPU OPP3 */
114 OPP_INITIALIZER("mpu", true, 500000000, OMAP3430_VDD_MPU_OPP3_UV), 114 OPP_INITIALIZER("mpu", "dpll1_ck", "mpu_iva", true, 500000000, OMAP3430_VDD_MPU_OPP3_UV),
115 /* MPU OPP4 */ 115 /* MPU OPP4 */
116 OPP_INITIALIZER("mpu", true, 550000000, OMAP3430_VDD_MPU_OPP4_UV), 116 OPP_INITIALIZER("mpu", "dpll1_ck", "mpu_iva", true, 550000000, OMAP3430_VDD_MPU_OPP4_UV),
117 /* MPU OPP5 */ 117 /* MPU OPP5 */
118 OPP_INITIALIZER("mpu", true, 600000000, OMAP3430_VDD_MPU_OPP5_UV), 118 OPP_INITIALIZER("mpu", "dpll1_ck", "mpu_iva", true, 600000000, OMAP3430_VDD_MPU_OPP5_UV),
119 119
120 /* 120 /*
121 * L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is 121 * L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is
122 * almost the same than the one at 83MHz thus providing very little 122 * almost the same than the one at 83MHz thus providing very little
123 * gain for the power point of view. In term of energy it will even 123 * gain for the power point of view. In term of energy it will even
124 * increase the consumption due to the very negative performance 124 * increase the consumption due to the very negative performance
125 * impact that frequency will do to the MPU and the whole system in 125 * impact that frequency will do to the MPU and the whole system in
126 * general. 126 * general.
127 */ 127 */
128 OPP_INITIALIZER("l3_main", false, 41500000, OMAP3430_VDD_CORE_OPP1_UV), 128 OPP_INITIALIZER("l3_main", "dpll3_ck", "core", false, 41500000, OMAP3430_VDD_CORE_OPP1_UV),
129 /* L3 OPP2 */ 129 /* L3 OPP2 */
130 OPP_INITIALIZER("l3_main", true, 83000000, OMAP3430_VDD_CORE_OPP2_UV), 130 OPP_INITIALIZER("l3_main", "dpll3_ck", "core", true, 83000000, OMAP3430_VDD_CORE_OPP2_UV),
131 /* L3 OPP3 */ 131 /* L3 OPP3 */
132 OPP_INITIALIZER("l3_main", true, 166000000, OMAP3430_VDD_CORE_OPP3_UV), 132 OPP_INITIALIZER("l3_main", "dpll3_ck", "core", true, 166000000, OMAP3430_VDD_CORE_OPP3_UV),
133 133
134 /* DSP OPP1 */ 134 /* DSP OPP1 */
135 OPP_INITIALIZER("iva", true, 90000000, OMAP3430_VDD_MPU_OPP1_UV), 135 OPP_INITIALIZER("iva", "dpll2_ck", "mpu_iva", true, 90000000, OMAP3430_VDD_MPU_OPP1_UV),
136 /* DSP OPP2 */ 136 /* DSP OPP2 */
137 OPP_INITIALIZER("iva", true, 180000000, OMAP3430_VDD_MPU_OPP2_UV), 137 OPP_INITIALIZER("iva", "dpll2_ck", "mpu_iva", true, 180000000, OMAP3430_VDD_MPU_OPP2_UV),
138 /* DSP OPP3 */ 138 /* DSP OPP3 */
139 OPP_INITIALIZER("iva", true, 360000000, OMAP3430_VDD_MPU_OPP3_UV), 139 OPP_INITIALIZER("iva", "dpll2_ck", "mpu_iva", true, 360000000, OMAP3430_VDD_MPU_OPP3_UV),
140 /* DSP OPP4 */ 140 /* DSP OPP4 */
141 OPP_INITIALIZER("iva", true, 400000000, OMAP3430_VDD_MPU_OPP4_UV), 141 OPP_INITIALIZER("iva", "dpll2_ck", "mpu_iva", true, 400000000, OMAP3430_VDD_MPU_OPP4_UV),
142 /* DSP OPP5 */ 142 /* DSP OPP5 */
143 OPP_INITIALIZER("iva", true, 430000000, OMAP3430_VDD_MPU_OPP5_UV), 143 OPP_INITIALIZER("iva", "dpll2_ck", "mpu_iva", true, 430000000, OMAP3430_VDD_MPU_OPP5_UV),
144 }; 144 };
145 145
146 static struct omap_opp_def __initdata omap36xx_opp_def_list[] = { 146 static struct omap_opp_def __initdata omap36xx_opp_def_list[] = {
147 /* MPU OPP1 - OPP50 */ 147 /* MPU OPP1 - OPP50 */
148 OPP_INITIALIZER("mpu", true, 300000000, OMAP3630_VDD_MPU_OPP50_UV), 148 OPP_INITIALIZER("mpu", "dpll1_ck", "mpu_iva", true, 300000000, OMAP3630_VDD_MPU_OPP50_UV),
149 /* MPU OPP2 - OPP100 */ 149 /* MPU OPP2 - OPP100 */
150 OPP_INITIALIZER("mpu", true, 600000000, OMAP3630_VDD_MPU_OPP100_UV), 150 OPP_INITIALIZER("mpu", "dpll1_ck", "mpu_iva", true, 600000000, OMAP3630_VDD_MPU_OPP100_UV),
151 /* MPU OPP3 - OPP-Turbo */ 151 /* MPU OPP3 - OPP-Turbo */
152 OPP_INITIALIZER("mpu", false, 800000000, OMAP3630_VDD_MPU_OPP120_UV), 152 OPP_INITIALIZER("mpu", "dpll1_ck", "mpu_iva", false, 800000000, OMAP3630_VDD_MPU_OPP120_UV),
153 /* MPU OPP4 - OPP-SB */ 153 /* MPU OPP4 - OPP-SB */
154 OPP_INITIALIZER("mpu", false, 1000000000, OMAP3630_VDD_MPU_OPP1G_UV), 154 OPP_INITIALIZER("mpu", "dpll1_ck", "mpu_iva", false, 1000000000, OMAP3630_VDD_MPU_OPP1G_UV),
155 155
156 /* L3 OPP1 - OPP50 */ 156 /* L3 OPP1 - OPP50 */
157 OPP_INITIALIZER("l3_main", true, 100000000, OMAP3630_VDD_CORE_OPP50_UV), 157 OPP_INITIALIZER("l3_main", "dpll3_ck", "core", true, 100000000, OMAP3630_VDD_CORE_OPP50_UV),
158 /* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */ 158 /* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */
159 OPP_INITIALIZER("l3_main", true, 200000000, OMAP3630_VDD_CORE_OPP100_UV), 159 OPP_INITIALIZER("l3_main", "dpll3_ck", "core", true, 200000000, OMAP3630_VDD_CORE_OPP100_UV),
160 160
161 /* DSP OPP1 - OPP50 */ 161 /* DSP OPP1 - OPP50 */
162 OPP_INITIALIZER("iva", true, 260000000, OMAP3630_VDD_MPU_OPP50_UV), 162 OPP_INITIALIZER("iva", "dpll2_ck", "mpu_iva", true, 260000000, OMAP3630_VDD_MPU_OPP50_UV),
163 /* DSP OPP2 - OPP100 */ 163 /* DSP OPP2 - OPP100 */
164 OPP_INITIALIZER("iva", true, 520000000, OMAP3630_VDD_MPU_OPP100_UV), 164 OPP_INITIALIZER("iva", "dpll2_ck", "mpu_iva", true, 520000000, OMAP3630_VDD_MPU_OPP100_UV),
165 /* DSP OPP3 - OPP-Turbo */ 165 /* DSP OPP3 - OPP-Turbo */
166 OPP_INITIALIZER("iva", false, 660000000, OMAP3630_VDD_MPU_OPP120_UV), 166 OPP_INITIALIZER("iva", "dpll2_ck", "mpu_iva", false, 660000000, OMAP3630_VDD_MPU_OPP120_UV),
167 /* DSP OPP4 - OPP-SB */ 167 /* DSP OPP4 - OPP-SB */
168 OPP_INITIALIZER("iva", false, 800000000, OMAP3630_VDD_MPU_OPP1G_UV), 168 OPP_INITIALIZER("iva", "dpll2_ck", "mpu_iva", false, 800000000, OMAP3630_VDD_MPU_OPP1G_UV),
169 }; 169 };
170 170
171 /* OMAP 3630 MPU Core VDD dependency table */ 171 /* OMAP 3630 MPU Core VDD dependency table */
172 static struct omap_vdd_dep_volt omap36xx_vdd_mpu_core_dep_data[] = { 172 static struct omap_vdd_dep_volt omap36xx_vdd_mpu_core_dep_data[] = {
173 {.main_vdd_volt = OMAP3630_VDD_MPU_OPP50_UV, .dep_vdd_volt = OMAP3630_VDD_CORE_OPP50_UV}, 173 {.main_vdd_volt = OMAP3630_VDD_MPU_OPP50_UV, .dep_vdd_volt = OMAP3630_VDD_CORE_OPP50_UV},
174 {.main_vdd_volt = OMAP3630_VDD_MPU_OPP100_UV, .dep_vdd_volt = OMAP3630_VDD_CORE_OPP100_UV}, 174 {.main_vdd_volt = OMAP3630_VDD_MPU_OPP100_UV, .dep_vdd_volt = OMAP3630_VDD_CORE_OPP100_UV},
175 {.main_vdd_volt = OMAP3630_VDD_MPU_OPP120_UV, .dep_vdd_volt = OMAP3630_VDD_CORE_OPP100_UV}, 175 {.main_vdd_volt = OMAP3630_VDD_MPU_OPP120_UV, .dep_vdd_volt = OMAP3630_VDD_CORE_OPP100_UV},
176 {.main_vdd_volt = OMAP3630_VDD_MPU_OPP1G_UV, .dep_vdd_volt = OMAP3630_VDD_CORE_OPP100_UV}, 176 {.main_vdd_volt = OMAP3630_VDD_MPU_OPP1G_UV, .dep_vdd_volt = OMAP3630_VDD_CORE_OPP100_UV},
177 }; 177 };
178 178
179 struct omap_vdd_dep_info omap36xx_vddmpu_dep_info[] = { 179 struct omap_vdd_dep_info omap36xx_vddmpu_dep_info[] = {
180 { 180 {
181 .name = "core", 181 .name = "core",
182 .dep_table = omap36xx_vdd_mpu_core_dep_data, 182 .dep_table = omap36xx_vdd_mpu_core_dep_data,
183 .nr_dep_entries = ARRAY_SIZE(omap36xx_vdd_mpu_core_dep_data), 183 .nr_dep_entries = ARRAY_SIZE(omap36xx_vdd_mpu_core_dep_data),
184 }, 184 },
185 {.name = NULL, .dep_table = NULL, .nr_dep_entries = 0}, 185 {.name = NULL, .dep_table = NULL, .nr_dep_entries = 0},
186 }; 186 };
187 187
188 /** 188 /**
189 * omap3_opp_init() - initialize omap3 opp table 189 * omap3_opp_init() - initialize omap3 opp table
190 */ 190 */
191 int __init omap3_opp_init(void) 191 int __init omap3_opp_init(void)
192 { 192 {
193 int r = -ENODEV; 193 int r = -ENODEV;
194 194
195 if (!cpu_is_omap34xx()) 195 if (!cpu_is_omap34xx())
196 return r; 196 return r;
197 197
198 if (cpu_is_omap3630()) 198 if (cpu_is_omap3630())
199 r = omap_init_opp_table(omap36xx_opp_def_list, 199 r = omap_init_opp_table(omap36xx_opp_def_list,
200 ARRAY_SIZE(omap36xx_opp_def_list)); 200 ARRAY_SIZE(omap36xx_opp_def_list));
201 else 201 else
202 r = omap_init_opp_table(omap34xx_opp_def_list, 202 r = omap_init_opp_table(omap34xx_opp_def_list,
203 ARRAY_SIZE(omap34xx_opp_def_list)); 203 ARRAY_SIZE(omap34xx_opp_def_list));
204 204
205 return r; 205 return r;
206 } 206 }
207 device_initcall(omap3_opp_init); 207 device_initcall(omap3_opp_init);
208 208
arch/arm/mach-omap2/opp4xxx_data.c
Diff comments   View file @ 4a3f891
1 /* 1 /*
2 * OMAP4 OPP table definitions. 2 * OMAP4 OPP table definitions.
3 * 3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ 4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 * Nishanth Menon 5 * Nishanth Menon
6 * Kevin Hilman 6 * Kevin Hilman
7 * Thara Gopinath 7 * Thara Gopinath
8 * Copyright (C) 2010-2011 Nokia Corporation. 8 * Copyright (C) 2010-2011 Nokia Corporation.
9 * Eduardo Valentin 9 * Eduardo Valentin
10 * Paul Walmsley 10 * Paul Walmsley
11 * 11 *
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 * 15 *
16 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 16 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
17 * kind, whether express or implied; without even the implied warranty 17 * kind, whether express or implied; without even the implied warranty
18 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details. 19 * GNU General Public License for more details.
20 */ 20 */
21 #include <linux/module.h> 21 #include <linux/module.h>
22 22
23 #include <plat/cpu.h> 23 #include <plat/cpu.h>
24 24
25 #include "control.h" 25 #include "control.h"
26 #include "omap_opp_data.h" 26 #include "omap_opp_data.h"
27 #include "pm.h" 27 #include "pm.h"
28 28
29 /* 29 /*
30 * Structures containing OMAP4430 voltage supported and various 30 * Structures containing OMAP4430 voltage supported and various
31 * voltage dependent data for each VDD. 31 * voltage dependent data for each VDD.
32 */ 32 */
33 33
34 #define OMAP4430_VDD_MPU_OPP50_UV 1025000 34 #define OMAP4430_VDD_MPU_OPP50_UV 1025000
35 #define OMAP4430_VDD_MPU_OPP100_UV 1200000 35 #define OMAP4430_VDD_MPU_OPP100_UV 1200000
36 #define OMAP4430_VDD_MPU_OPPTURBO_UV 1313000 36 #define OMAP4430_VDD_MPU_OPPTURBO_UV 1313000
37 #define OMAP4430_VDD_MPU_OPPNITRO_UV 1375000 37 #define OMAP4430_VDD_MPU_OPPNITRO_UV 1375000
38 38
39 struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = { 39 struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = {
40 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c), 40 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c),
41 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16), 41 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
42 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23), 42 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23),
43 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27), 43 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27),
44 VOLT_DATA_DEFINE(0, 0, 0, 0), 44 VOLT_DATA_DEFINE(0, 0, 0, 0),
45 }; 45 };
46 46
47 #define OMAP4430_VDD_IVA_OPP50_UV 1013000 47 #define OMAP4430_VDD_IVA_OPP50_UV 1013000
48 #define OMAP4430_VDD_IVA_OPP100_UV 1188000 48 #define OMAP4430_VDD_IVA_OPP100_UV 1188000
49 #define OMAP4430_VDD_IVA_OPPTURBO_UV 1300000 49 #define OMAP4430_VDD_IVA_OPPTURBO_UV 1300000
50 50
51 struct omap_volt_data omap44xx_vdd_iva_volt_data[] = { 51 struct omap_volt_data omap44xx_vdd_iva_volt_data[] = {
52 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c), 52 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c),
53 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16), 53 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
54 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23), 54 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23),
55 VOLT_DATA_DEFINE(0, 0, 0, 0), 55 VOLT_DATA_DEFINE(0, 0, 0, 0),
56 }; 56 };
57 57
58 #define OMAP4430_VDD_CORE_OPP50_UV 1025000 58 #define OMAP4430_VDD_CORE_OPP50_UV 1025000
59 #define OMAP4430_VDD_CORE_OPP100_UV 1200000 59 #define OMAP4430_VDD_CORE_OPP100_UV 1200000
60 60
61 struct omap_volt_data omap44xx_vdd_core_volt_data[] = { 61 struct omap_volt_data omap44xx_vdd_core_volt_data[] = {
62 VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c), 62 VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c),
63 VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16), 63 VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16),
64 VOLT_DATA_DEFINE(0, 0, 0, 0), 64 VOLT_DATA_DEFINE(0, 0, 0, 0),
65 }; 65 };
66 66
67 /* Dependency of domains are as follows for OMAP4430 (OPP based): 67 /* Dependency of domains are as follows for OMAP4430 (OPP based):
68 * 68 *
69 * MPU IVA CORE 69 * MPU IVA CORE
70 * 50 50 50+ 70 * 50 50 50+
71 * 50 100+ 100 71 * 50 100+ 100
72 * 100+ 50 100 72 * 100+ 50 100
73 * 100+ 100+ 100 73 * 100+ 100+ 100
74 */ 74 */
75 75
76 /* OMAP 4430 MPU Core VDD dependency table */ 76 /* OMAP 4430 MPU Core VDD dependency table */
77 static struct omap_vdd_dep_volt omap443x_vdd_mpu_core_dep_data[] = { 77 static struct omap_vdd_dep_volt omap443x_vdd_mpu_core_dep_data[] = {
78 {.main_vdd_volt = OMAP4430_VDD_MPU_OPP50_UV, .dep_vdd_volt = OMAP4430_VDD_MPU_OPP50_UV}, 78 {.main_vdd_volt = OMAP4430_VDD_MPU_OPP50_UV, .dep_vdd_volt = OMAP4430_VDD_MPU_OPP50_UV},
79 {.main_vdd_volt = OMAP4430_VDD_MPU_OPP100_UV, .dep_vdd_volt = OMAP4430_VDD_CORE_OPP100_UV}, 79 {.main_vdd_volt = OMAP4430_VDD_MPU_OPP100_UV, .dep_vdd_volt = OMAP4430_VDD_CORE_OPP100_UV},
80 {.main_vdd_volt = OMAP4430_VDD_MPU_OPPTURBO_UV, .dep_vdd_volt = OMAP4430_VDD_CORE_OPP100_UV}, 80 {.main_vdd_volt = OMAP4430_VDD_MPU_OPPTURBO_UV, .dep_vdd_volt = OMAP4430_VDD_CORE_OPP100_UV},
81 {.main_vdd_volt = OMAP4430_VDD_MPU_OPPNITRO_UV, .dep_vdd_volt = OMAP4430_VDD_CORE_OPP100_UV}, 81 {.main_vdd_volt = OMAP4430_VDD_MPU_OPPNITRO_UV, .dep_vdd_volt = OMAP4430_VDD_CORE_OPP100_UV},
82 }; 82 };
83 83
84 struct omap_vdd_dep_info omap443x_vddmpu_dep_info[] = { 84 struct omap_vdd_dep_info omap443x_vddmpu_dep_info[] = {
85 { 85 {
86 .name = "core", 86 .name = "core",
87 .dep_table = omap443x_vdd_mpu_core_dep_data, 87 .dep_table = omap443x_vdd_mpu_core_dep_data,
88 .nr_dep_entries = ARRAY_SIZE(omap443x_vdd_mpu_core_dep_data), 88 .nr_dep_entries = ARRAY_SIZE(omap443x_vdd_mpu_core_dep_data),
89 }, 89 },
90 {.name = NULL, .dep_table = NULL, .nr_dep_entries = 0}, 90 {.name = NULL, .dep_table = NULL, .nr_dep_entries = 0},
91 }; 91 };
92 92
93 /* OMAP 4430 MPU IVA VDD dependency table */ 93 /* OMAP 4430 MPU IVA VDD dependency table */
94 static struct omap_vdd_dep_volt omap443x_vdd_iva_core_dep_data[] = { 94 static struct omap_vdd_dep_volt omap443x_vdd_iva_core_dep_data[] = {
95 {.main_vdd_volt = OMAP4430_VDD_IVA_OPP50_UV, .dep_vdd_volt = OMAP4430_VDD_MPU_OPP50_UV}, 95 {.main_vdd_volt = OMAP4430_VDD_IVA_OPP50_UV, .dep_vdd_volt = OMAP4430_VDD_MPU_OPP50_UV},
96 {.main_vdd_volt = OMAP4430_VDD_IVA_OPP100_UV, .dep_vdd_volt = OMAP4430_VDD_CORE_OPP100_UV}, 96 {.main_vdd_volt = OMAP4430_VDD_IVA_OPP100_UV, .dep_vdd_volt = OMAP4430_VDD_CORE_OPP100_UV},
97 {.main_vdd_volt = OMAP4430_VDD_IVA_OPPTURBO_UV, .dep_vdd_volt = OMAP4430_VDD_CORE_OPP100_UV}, 97 {.main_vdd_volt = OMAP4430_VDD_IVA_OPPTURBO_UV, .dep_vdd_volt = OMAP4430_VDD_CORE_OPP100_UV},
98 }; 98 };
99 99
100 struct omap_vdd_dep_info omap443x_vddiva_dep_info[] = { 100 struct omap_vdd_dep_info omap443x_vddiva_dep_info[] = {
101 { 101 {
102 .name = "core", 102 .name = "core",
103 .dep_table = omap443x_vdd_iva_core_dep_data, 103 .dep_table = omap443x_vdd_iva_core_dep_data,
104 .nr_dep_entries = ARRAY_SIZE(omap443x_vdd_iva_core_dep_data), 104 .nr_dep_entries = ARRAY_SIZE(omap443x_vdd_iva_core_dep_data),
105 }, 105 },
106 {.name = NULL, .dep_table = NULL, .nr_dep_entries = 0}, 106 {.name = NULL, .dep_table = NULL, .nr_dep_entries = 0},
107 }; 107 };
108 108
109 static struct omap_opp_def __initdata omap44xx_opp_def_list[] = { 109 static struct omap_opp_def __initdata omap44xx_opp_def_list[] = {
110 /* MPU OPP1 - OPP50 */ 110 /* MPU OPP1 - OPP50 */
111 OPP_INITIALIZER("mpu", true, 300000000, OMAP4430_VDD_MPU_OPP50_UV), 111 OPP_INITIALIZER("mpu", "dpll_mpu_ck", "mpu", true, 300000000, OMAP4430_VDD_MPU_OPP50_UV),
112 /* MPU OPP2 - OPP100 */ 112 /* MPU OPP2 - OPP100 */
113 OPP_INITIALIZER("mpu", true, 600000000, OMAP4430_VDD_MPU_OPP100_UV), 113 OPP_INITIALIZER("mpu", "dpll_mpu_ck", "mpu", true, 600000000, OMAP4430_VDD_MPU_OPP100_UV),
114 /* MPU OPP3 - OPP-Turbo */ 114 /* MPU OPP3 - OPP-Turbo */
115 OPP_INITIALIZER("mpu", true, 800000000, OMAP4430_VDD_MPU_OPPTURBO_UV), 115 OPP_INITIALIZER("mpu", "dpll_mpu_ck", "mpu", true, 800000000, OMAP4430_VDD_MPU_OPPTURBO_UV),
116 /* MPU OPP4 - OPP-SB */ 116 /* MPU OPP4 - OPP-SB */
117 OPP_INITIALIZER("mpu", true, 1008000000, OMAP4430_VDD_MPU_OPPNITRO_UV), 117 OPP_INITIALIZER("mpu", "dpll_mpu_ck", "mpu", true, 1008000000, OMAP4430_VDD_MPU_OPPNITRO_UV),
118 /* L3 OPP1 - OPP50 */ 118 /* L3 OPP1 - OPP50 */
119 OPP_INITIALIZER("l3_main_1", true, 100000000, OMAP4430_VDD_CORE_OPP50_UV), 119 OPP_INITIALIZER("l3_main_1", "dpll_core_m5x2_ck", "core", true, 100000000, OMAP4430_VDD_CORE_OPP50_UV),
120 /* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */ 120 /* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */
121 OPP_INITIALIZER("l3_main_1", true, 200000000, OMAP4430_VDD_CORE_OPP100_UV), 121 OPP_INITIALIZER("l3_main_1", "dpll_core_m5x2_ck", "core", true, 200000000, OMAP4430_VDD_CORE_OPP100_UV),
122 /* IVA OPP1 - OPP50 */ 122 /* IVA OPP1 - OPP50 */
123 OPP_INITIALIZER("iva", true, 133000000, OMAP4430_VDD_IVA_OPP50_UV), 123 OPP_INITIALIZER("iva", "dpll_iva_m5x2_ck", "iva", true, 133000000, OMAP4430_VDD_IVA_OPP50_UV),
124 /* IVA OPP2 - OPP100 */ 124 /* IVA OPP2 - OPP100 */
125 OPP_INITIALIZER("iva", true, 266100000, OMAP4430_VDD_IVA_OPP100_UV), 125 OPP_INITIALIZER("iva", "dpll_iva_m5x2_ck", "iva", true, 266100000, OMAP4430_VDD_IVA_OPP100_UV),
126 /* IVA OPP3 - OPP-Turbo */ 126 /* IVA OPP3 - OPP-Turbo */
127 OPP_INITIALIZER("iva", false, 332000000, OMAP4430_VDD_IVA_OPPTURBO_UV), 127 OPP_INITIALIZER("iva", "dpll_iva_m5x2_ck", "iva", false, 332000000, OMAP4430_VDD_IVA_OPPTURBO_UV),
128 /* TODO: add DSP, aess, fdif, gpu */ 128 /* TODO: add DSP, aess, fdif, gpu */
129 }; 129 };
130 130
131 /** 131 /**
132 * omap4_opp_init() - initialize omap4 opp table 132 * omap4_opp_init() - initialize omap4 opp table
133 */ 133 */
134 int __init omap4_opp_init(void) 134 int __init omap4_opp_init(void)
135 { 135 {
136 int r = -ENODEV; 136 int r = -ENODEV;
137 137
138 if (!cpu_is_omap44xx()) 138 if (!cpu_is_omap44xx())
139 return r; 139 return r;
140 140
141 r = omap_init_opp_table(omap44xx_opp_def_list, 141 r = omap_init_opp_table(omap44xx_opp_def_list,
142 ARRAY_SIZE(omap44xx_opp_def_list)); 142 ARRAY_SIZE(omap44xx_opp_def_list));
143 143
144 return r; 144 return r;
145 } 145 }
146 device_initcall(omap4_opp_init); 146 device_initcall(omap4_opp_init);
147 147