Commit 502c8a0e07450ff886b80a11150a123bae92f3f7

Authored by Mike Frysinger
1 parent 306208f40c

Blackfin: BF51x: fix handling of PH8 (the "internal" SPI0SEL4 pin)

Even though the PH8 pin is only internal to the processor packaging, it
can be controlled like any other GPIO pin.  Now that we have a proper GPIO
define, we can fix the SPI0 CS4 define for the internal SPI flash.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Showing 2 changed files with 3 additions and 2 deletions Side-by-side Diff

arch/blackfin/mach-bf518/include/mach/gpio.h
... ... @@ -7,7 +7,7 @@
7 7 #ifndef _MACH_GPIO_H_
8 8 #define _MACH_GPIO_H_
9 9  
10   -#define MAX_BLACKFIN_GPIOS 40
  10 +#define MAX_BLACKFIN_GPIOS 41
11 11  
12 12 #define GPIO_PF0 0
13 13 #define GPIO_PF1 1
... ... @@ -49,6 +49,7 @@
49 49 #define GPIO_PH5 37
50 50 #define GPIO_PH6 38
51 51 #define GPIO_PH7 39
  52 +#define GPIO_PH8 40
52 53  
53 54 #define PORT_F GPIO_PF0
54 55 #define PORT_G GPIO_PG0
arch/blackfin/mach-bf518/include/mach/portmux.h
... ... @@ -95,7 +95,7 @@
95 95 #define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(0))
96 96 #define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(0))
97 97 #define P_SPI0_SSEL3 (P_DEFINED | P_IDENT(GPIO_PH4) | P_FUNCT(2))
98   -#define P_SPI0_SSEL4 (P_DEFINED | P_IDENT(GPIO_PG10) | P_FUNCT(2))
  98 +#define P_SPI0_SSEL4 (P_DEFINED | P_IDENT(GPIO_PH8) | P_FUNCT(2))
99 99 #define P_SPI0_SSEL5 (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(2))
100 100  
101 101 #define P_SPI1_SS (P_DEFINED | P_IDENT(GPIO_PH0) | P_FUNCT(1))