Commit 56b9aea3b740be7665be100872a913da9bdc653b
1 parent
e8a7e48bb2
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intel_idle: recognize ARAT on WSM-EX
We erroneously ignored the Always Running APIC Timer on WSM-EX. Move the check for ARAT down so that it can apply to any/all models. Signed-off-by: Len Brown <len.brown@intel.com>
Showing 1 changed file with 3 additions and 9 deletions Side-by-side Diff
drivers/idle/intel_idle.c
... | ... | @@ -273,8 +273,6 @@ |
273 | 273 | |
274 | 274 | pr_debug(PREFIX "MWAIT substates: 0x%x\n", mwait_substates); |
275 | 275 | |
276 | - if (boot_cpu_has(X86_FEATURE_ARAT)) /* Always Reliable APIC Timer */ | |
277 | - lapic_timer_reliable_states = 0xFFFFFFFF; | |
278 | 276 | |
279 | 277 | if (boot_cpu_data.x86 != 6) /* family 6 */ |
280 | 278 | return -ENODEV; |
... | ... | @@ -286,8 +284,6 @@ |
286 | 284 | case 0x1F: /* Core i7 and i5 Processor - Nehalem */ |
287 | 285 | case 0x2E: /* Nehalem-EX Xeon */ |
288 | 286 | case 0x2F: /* Westmere-EX Xeon */ |
289 | - lapic_timer_reliable_states = (1 << 1); /* C1 */ | |
290 | - | |
291 | 287 | case 0x25: /* Westmere */ |
292 | 288 | case 0x2C: /* Westmere */ |
293 | 289 | cpuidle_state_table = nehalem_cstates; |
... | ... | @@ -295,7 +291,6 @@ |
295 | 291 | |
296 | 292 | case 0x1C: /* 28 - Atom Processor */ |
297 | 293 | case 0x26: /* 38 - Lincroft Atom Processor */ |
298 | - lapic_timer_reliable_states = (1 << 1); /* C1 */ | |
299 | 294 | cpuidle_state_table = atom_cstates; |
300 | 295 | break; |
301 | 296 | |
302 | 297 | |
... | ... | @@ -303,16 +298,15 @@ |
303 | 298 | case 0x2D: /* SNB Xeon */ |
304 | 299 | cpuidle_state_table = snb_cstates; |
305 | 300 | break; |
306 | -#ifdef FUTURE_USE | |
307 | - case 0x17: /* 23 - Core 2 Duo */ | |
308 | - lapic_timer_reliable_states = (1 << 2) | (1 << 1); /* C2, C1 */ | |
309 | -#endif | |
310 | 301 | |
311 | 302 | default: |
312 | 303 | pr_debug(PREFIX "does not run on family %d model %d\n", |
313 | 304 | boot_cpu_data.x86, boot_cpu_data.x86_model); |
314 | 305 | return -ENODEV; |
315 | 306 | } |
307 | + | |
308 | + if (boot_cpu_has(X86_FEATURE_ARAT)) /* Always Reliable APIC Timer */ | |
309 | + lapic_timer_reliable_states = 0xFFFFFFFF; | |
316 | 310 | |
317 | 311 | pr_debug(PREFIX "v" INTEL_IDLE_VERSION |
318 | 312 | " model 0x%X\n", boot_cpu_data.x86_model); |