Commit 5f0b2976cb2b62668a076f54419c24b8ab677167

Authored by Yinghai Lu
Committed by Ingo Molnar
1 parent e8ee6f0ae5

x86: add pci=check_enable_amd_mmconf and dmi check

so will disable that feature by default, and only enable that via
pci=check_enable_amd_mmconf or for system match with dmi table.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

Showing 5 changed files with 51 additions and 8 deletions Side-by-side Diff

arch/x86/kernel/mmconf-fam10h_64.c
... ... @@ -6,12 +6,15 @@
6 6 #include <linux/mm.h>
7 7 #include <linux/string.h>
8 8 #include <linux/pci.h>
  9 +#include <linux/dmi.h>
9 10 #include <asm/pci-direct.h>
10 11 #include <linux/sort.h>
11 12 #include <asm/io.h>
12 13 #include <asm/msr.h>
13 14 #include <asm/acpi.h>
14 15  
  16 +#include "../pci/pci.h"
  17 +
15 18 struct pci_hostbridge_probe {
16 19 u32 bus;
17 20 u32 slot;
... ... @@ -176,6 +179,9 @@
176 179 u64 val;
177 180 u32 address;
178 181  
  182 + if (!(pci_probe & PCI_CHECK_ENABLE_AMD_MMCONF))
  183 + return;
  184 +
179 185 address = MSR_FAM10H_MMIO_CONF_BASE;
180 186 rdmsrl(address, val);
181 187  
... ... @@ -212,5 +218,27 @@
212 218 val |= fam10h_pci_mmconf_base | (8 << FAM10H_MMIO_CONF_BUSRANGE_SHIFT) |
213 219 FAM10H_MMIO_CONF_ENABLE;
214 220 wrmsrl(address, val);
  221 +}
  222 +
  223 +static int __devinit set_check_enable_amd_mmconf(const struct dmi_system_id *d)
  224 +{
  225 + pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
  226 + return 0;
  227 +}
  228 +
  229 +static struct dmi_system_id __devinitdata mmconf_dmi_table[] = {
  230 + {
  231 + .callback = set_check_enable_amd_mmconf,
  232 + .ident = "Sun Microsystems Machine",
  233 + .matches = {
  234 + DMI_MATCH(DMI_SYS_VENDOR, "Sun Microsystems"),
  235 + },
  236 + },
  237 + {}
  238 +};
  239 +
  240 +void __init check_enable_amd_mmconf_dmi(void)
  241 +{
  242 + dmi_check_system(mmconf_dmi_table);
215 243 }
arch/x86/kernel/setup_64.c
... ... @@ -289,6 +289,18 @@
289 289 }
290 290 }
291 291  
  292 +#ifdef CONFIG_PCI_MMCONFIG
  293 +extern void __cpuinit fam10h_check_enable_mmcfg(void);
  294 +extern void __init check_enable_amd_mmconf_dmi(void);
  295 +#else
  296 +void __cpuinit fam10h_check_enable_mmcfg(void)
  297 +{
  298 +}
  299 +void __init check_enable_amd_mmconf_dmi(void)
  300 +{
  301 +}
  302 +#endif
  303 +
292 304 /*
293 305 * setup_arch - architecture-specific boot-time initializations
294 306 *
... ... @@ -510,6 +522,9 @@
510 522 conswitchp = &dummy_con;
511 523 #endif
512 524 #endif
  525 +
  526 + /* do this before identify_cpu for boot cpu */
  527 + check_enable_amd_mmconf_dmi();
513 528 }
514 529  
515 530 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
... ... @@ -696,14 +711,6 @@
696 711 if (c->x86_power & (1<<8))
697 712 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
698 713 }
699   -
700   -#ifdef CONFIG_PCI_MMCONFIG
701   -extern void __cpuinit fam10h_check_enable_mmcfg(void);
702   -#else
703   -void __cpuinit fam10h_check_enable_mmcfg(void)
704   -{
705   -}
706   -#endif
707 714  
708 715 static void __cpuinit init_amd(struct cpuinfo_x86 *c)
709 716 {
arch/x86/pci/common.c
... ... @@ -425,6 +425,10 @@
425 425 pci_probe &= ~PCI_PROBE_MMCONF;
426 426 return NULL;
427 427 }
  428 + else if (!strcmp(str, "check_enable_amd_mmconf")) {
  429 + pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
  430 + return NULL;
  431 + }
428 432 #endif
429 433 else if (!strcmp(str, "noacpi")) {
430 434 acpi_noirq_set();
arch/x86/pci/mmconfig-shared.c
... ... @@ -107,6 +107,9 @@
107 107 int i;
108 108 unsigned segnbits = 0, busnbits;
109 109  
  110 + if (!(pci_probe & PCI_CHECK_ENABLE_AMD_MMCONF))
  111 + return NULL;
  112 +
110 113 address = MSR_FAM10H_MMIO_CONF_BASE;
111 114 if (rdmsr_safe(address, &low, &high))
112 115 return NULL;
... ... @@ -26,6 +26,7 @@
26 26 #define PCI_ASSIGN_ALL_BUSSES 0x4000
27 27 #define PCI_CAN_SKIP_ISA_ALIGN 0x8000
28 28 #define PCI_USE__CRS 0x10000
  29 +#define PCI_CHECK_ENABLE_AMD_MMCONF 0x20000
29 30  
30 31 extern unsigned int pci_probe;
31 32 extern unsigned long pirq_table_addr;