Eric Lee / linux-smarc-t335x-v3.2

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Commit 636a1595cc008e0e5a7389929304af734532c8e2

Authored by Philip, Avinash
Committed by Afzal Mohammed
1 parent 2f8f35d41b
Exists in master

AM335x: SPI device support is added 

This patch adds support for
1. SPI (instance 0 & 1) controller on am33xx
2. MTD Partition table and Pin-muxing for spi flash device.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>

Showing 2 changed files with 115 additions and 0 deletions Side-by-side Diff

arch/arm/mach-omap2/board-am335xevm.c
Diff comments   View file @ 636a159
... ... @@ -17,6 +17,8 @@
17 17 #include <linux/i2c.h>
18 18 #include <linux/i2c/at24.h>
19 19 #include <linux/gpio.h>
  20 +#include <linux/spi/spi.h>
  21 +#include <linux/spi/flash.h>
20 22 #include <linux/mtd/mtd.h>
21 23 #include <linux/mtd/nand.h>
22 24 #include <linux/mtd/partitions.h>
23 25  
... ... @@ -331,7 +333,32 @@
331 333 {NULL, 0},
332 334 };
333 335  
  336 +/* Module pin mux for SPI fash */
  337 +static struct pinmux_config spi0_pin_mux[] = {
  338 + {"spi0_sclk.spi0_sclk", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL
  339 + | AM33XX_INPUT_EN},
  340 + {"spi0_d0.spi0_d0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP
  341 + | AM33XX_INPUT_EN},
  342 + {"spi0_d1.spi0_d1", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL
  343 + | AM33XX_INPUT_EN},
  344 + {"spi0_cs0.spi0_cs0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP
  345 + | AM33XX_INPUT_EN},
  346 + {NULL, 0},
  347 +};
334 348  
  349 +/* Module pin mux for SPI flash */
  350 +static struct pinmux_config spi1_pin_mux[] = {
  351 + {"mcasp0_aclkx.spi1_sclk", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
  352 + | AM33XX_INPUT_EN},
  353 + {"mcasp0_fsx.spi1_d0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
  354 + | AM33XX_PULL_UP | AM33XX_INPUT_EN},
  355 + {"mcasp0_axr0.spi1_d1", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
  356 + | AM33XX_INPUT_EN},
  357 + {"mcasp0_ahclkr.spi1_cs0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
  358 + | AM33XX_PULL_UP | AM33XX_INPUT_EN},
  359 + {NULL, 0},
  360 +};
  361 +
335 362 /* Module pin mux for rgmii1 */
336 363 static struct pinmux_config rgmii1_pin_mux[] = {
337 364 {"mii1_txen.rgmii1_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
... ... @@ -677,6 +704,72 @@
677 704 },
678 705 };
679 706  
  707 +/* SPI 0/1 Platform Data */
  708 +/* SPI flash information */
  709 +static struct mtd_partition am335x_spi_partitions[] = {
  710 + /* All the partition sizes are listed in terms of erase size */
  711 + {
  712 + .name = "U-Boot-min",
  713 + .offset = 0,
  714 + .size = SZ_128K,
  715 + .mask_flags = MTD_WRITEABLE, /* force read-only */
  716 + },
  717 + {
  718 + .name = "U-Boot",
  719 + .offset = MTDPART_OFS_APPEND,
  720 + .size = 2 * SZ_128K,
  721 + .mask_flags = MTD_WRITEABLE, /* force read-only */
  722 + },
  723 + {
  724 + .name = "U-Boot Env",
  725 + .offset = MTDPART_OFS_APPEND,
  726 + .size = 2 * SZ_4K,
  727 + },
  728 + {
  729 + .name = "Kernel",
  730 + .offset = MTDPART_OFS_APPEND,
  731 + .size = 20 * SZ_128K,
  732 + },
  733 + {
  734 + .name = "File System",
  735 + .offset = MTDPART_OFS_APPEND,
  736 + .size = MTDPART_SIZ_FULL, /* size ~= 1.1 MiB */
  737 + }
  738 +};
  739 +
  740 +static const struct flash_platform_data am335x_spi_flash = {
  741 + .type = "w25q64",
  742 + .name = "spi_flash",
  743 + .parts = am335x_spi_partitions,
  744 + .nr_parts = ARRAY_SIZE(am335x_spi_partitions),
  745 +};
  746 +
  747 +/*
  748 + * SPI Flash works at 80Mhz however SPI Controller works at 48MHz.
  749 + * So setup Max speed to be less than that of Controller speed
  750 + */
  751 +static struct spi_board_info am335x_spi0_slave_info[] = {
  752 + {
  753 + .modalias = "m25p80",
  754 + .platform_data = &am335x_spi_flash,
  755 + .irq = -1,
  756 + .max_speed_hz = 12000000,
  757 + .bus_num = 1,
  758 + .chip_select = 0,
  759 + },
  760 +};
  761 +
  762 +static struct spi_board_info am335x_spi1_slave_info[] = {
  763 + {
  764 + .modalias = "m25p80",
  765 + .platform_data = &am335x_spi_flash,
  766 + .irq = -1,
  767 + .max_speed_hz = 12000000,
  768 + .bus_num = 2,
  769 + .chip_select = 0,
  770 + },
  771 +};
  772 +
680 773 static void evm_nand_init(int evm_id, int profile)
681 774 {
682 775 setup_pin_mux(nand_pin_mux);
... ... @@ -752,6 +845,24 @@
752 845 }
753 846  
754 847  
  848 +/* setup spi0 */
  849 +static void spi0_init(int evm_id, int profile)
  850 +{
  851 + setup_pin_mux(spi0_pin_mux);
  852 + spi_register_board_info(am335x_spi0_slave_info,
  853 + ARRAY_SIZE(am335x_spi0_slave_info));
  854 + return;
  855 +}
  856 +
  857 +/* setup spi1 */
  858 +static void spi1_init(int evm_id, int profile)
  859 +{
  860 + setup_pin_mux(spi1_pin_mux);
  861 + spi_register_board_info(am335x_spi1_slave_info,
  862 + ARRAY_SIZE(am335x_spi1_slave_info));
  863 + return;
  864 +}
  865 +
755 866 /* Low-Cost EVM */
756 867 static struct evm_dev_cfg low_cost_evm_dev_cfg[] = {
757 868 {rgmii1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
... ... @@ -782,6 +893,7 @@
782 893 {mmc2_init, DEV_ON_DGHTR_BRD, PROFILE_4},
783 894 {mmc0_init, DEV_ON_BASEBOARD, (PROFILE_ALL & ~PROFILE_5)},
784 895 {mmc0_no_cd_init, DEV_ON_BASEBOARD, PROFILE_5},
  896 + {spi0_init, DEV_ON_DGHTR_BRD, PROFILE_2},
785 897 {NULL, 0, 0},
786 898 };
787 899  
... ... @@ -791,6 +903,7 @@
791 903 {usb0_init, DEV_ON_BASEBOARD, PROFILE_ALL},
792 904 {usb1_init, DEV_ON_BASEBOARD, PROFILE_ALL},
793 905 {evm_nand_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
  906 + {spi1_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
794 907 {NULL, 0, 0},
795 908 };
796 909  
arch/arm/mach-omap2/devices.c
Diff comments   View file @ 636a159
... ... @@ -445,6 +445,8 @@
445 445 break;
446 446 case OMAP4_MCSPI_REV:
447 447 pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
  448 + if (cpu_is_am33xx())
  449 + pdata->dma_not_enabled = true;
448 450 break;
449 451 default:
450 452 pr_err("Invalid McSPI Revision value\n");