Eric Lee / linux-smarc-t335x-v3.2

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Commit 69b26c7ad00fd5b6129400725e2ffb95134a0e1b

Authored by Linus Torvalds
2 parents ddb0c5a689 cfe3fdadb1
Exists in master and in 4 other branches v3.2_AM335xPSP_04.06.00.11, v3.2_NEWT335xPSP_04.06.00.11, v3.2_SBC_SMARTMEN, v3.2_SMARCT335xPSP_04.06.00.11

Merge git://git.infradead.org/mtd-2.6 

* git://git.infradead.org/mtd-2.6:
  mtd: nand: Fix probe of Samsung NAND chips
  mtd: nand: Fix regression in BBM detection
  pxa3xx: fix ns2cycle equation

Showing 2 changed files Side-by-side Diff

drivers/mtd/nand/nand_base.c
Diff comments   View file @ 69b26c7
... ... @@ -2866,6 +2866,7 @@
2866 2866 */
2867 2867 if (id_data[0] == id_data[6] && id_data[1] == id_data[7] &&
2868 2868 id_data[0] == NAND_MFR_SAMSUNG &&
  2869 + (chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
2869 2870 id_data[5] != 0x00) {
2870 2871 /* Calc pagesize */
2871 2872 mtd->writesize = 2048 << (extid & 0x03);
2872 2873  
... ... @@ -2934,14 +2935,10 @@
2934 2935 chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32)) + 32 - 1;
2935 2936  
2936 2937 /* Set the bad block position */
2937   - if (!(busw & NAND_BUSWIDTH_16) && (*maf_id == NAND_MFR_STMICRO ||
2938   - (*maf_id == NAND_MFR_SAMSUNG &&
2939   - mtd->writesize == 512) ||
2940   - *maf_id == NAND_MFR_AMD))
2941   - chip->badblockpos = NAND_SMALL_BADBLOCK_POS;
2942   - else
  2938 + if (mtd->writesize > 512 || (busw & NAND_BUSWIDTH_16))
2943 2939 chip->badblockpos = NAND_LARGE_BADBLOCK_POS;
2944   -
  2940 + else
  2941 + chip->badblockpos = NAND_SMALL_BADBLOCK_POS;
2945 2942  
2946 2943 /* Get chip options, preserve non chip based options */
2947 2944 chip->options &= ~NAND_CHIPOPTIONS_MSK;
drivers/mtd/nand/pxa3xx_nand.c
Diff comments   View file @ 69b26c7
... ... @@ -363,7 +363,7 @@
363 363 #define tAR_NDTR1(r) (((r) >> 0) & 0xf)
364 364  
365 365 /* convert nano-seconds to nand flash controller clock cycles */
366   -#define ns2cycle(ns, clk) (int)(((ns) * (clk / 1000000) / 1000) - 1)
  366 +#define ns2cycle(ns, clk) (int)((ns) * (clk / 1000000) / 1000)
367 367  
368 368 /* convert nand flash controller clock cycles to nano-seconds */
369 369 #define cycle2ns(c, clk) ((((c) + 1) * 1000000 + clk / 500) / (clk / 1000))