Commit 6f074abb624aced31339a0f8fac778b344adac4c
Committed by
Mauro Carvalho Chehab
1 parent
ccbe64c664
Exists in
master
and in
4 other branches
V4L/DVB (6194): Changes to support interrupts on VIDB
Changes to support interrupts on VIDB Signed-off-by: Steven Toth <stoth@hauppauge.com> Reviewed-by: Michael Krufky <mkrufky@linuxtv.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Showing 1 changed file with 54 additions and 5 deletions Side-by-side Diff
drivers/media/video/cx23885/cx23885-core.c
... | ... | @@ -1252,20 +1252,23 @@ |
1252 | 1252 | struct cx23885_dev *dev = dev_id; |
1253 | 1253 | struct cx23885_tsport *port = &dev->ts2; |
1254 | 1254 | u32 pci_status, pci_mask; |
1255 | + u32 ts1_status, ts1_mask; | |
1255 | 1256 | u32 ts2_status, ts2_mask; |
1256 | 1257 | int count = 0, handled = 0; |
1257 | 1258 | |
1258 | 1259 | pci_status = cx_read(PCI_INT_STAT); |
1259 | 1260 | pci_mask = cx_read(PCI_INT_MSK); |
1260 | - | |
1261 | + ts1_status = cx_read(VID_B_INT_STAT); | |
1262 | + ts1_mask = cx_read(VID_B_INT_MSK); | |
1261 | 1263 | ts2_status = cx_read(VID_C_INT_STAT); |
1262 | 1264 | ts2_mask = cx_read(VID_C_INT_MSK); |
1263 | 1265 | |
1264 | - if ( (pci_status == 0) && (ts2_status == 0) ) | |
1266 | + if ( (pci_status == 0) && (ts2_status == 0) && (ts1_status == 0) ) | |
1265 | 1267 | goto out; |
1266 | 1268 | |
1267 | 1269 | count = cx_read(port->reg_gpcnt); |
1268 | 1270 | dprintk(7, "pci_status: 0x%08x pci_mask: 0x%08x\n", pci_status, pci_mask ); |
1271 | + dprintk(7, "ts1_status: 0x%08x ts1_mask: 0x%08x count: 0x%x\n", ts1_status, ts1_mask, count ); | |
1269 | 1272 | dprintk(7, "ts2_status: 0x%08x ts2_mask: 0x%08x count: 0x%x\n", ts2_status, ts2_mask, count ); |
1270 | 1273 | |
1271 | 1274 | if ( (pci_status & PCI_MSK_RISC_RD) || |
... | ... | @@ -1303,6 +1306,48 @@ |
1303 | 1306 | |
1304 | 1307 | } |
1305 | 1308 | |
1309 | + if ( (ts1_status & VID_B_MSK_OPC_ERR) || | |
1310 | + (ts1_status & VID_B_MSK_BAD_PKT) || | |
1311 | + (ts1_status & VID_B_MSK_SYNC) || | |
1312 | + (ts1_status & VID_B_MSK_OF)) | |
1313 | + { | |
1314 | + if (ts1_status & VID_B_MSK_OPC_ERR) | |
1315 | + dprintk(7, " (VID_B_MSK_OPC_ERR 0x%08x)\n", VID_B_MSK_OPC_ERR); | |
1316 | + if (ts1_status & VID_B_MSK_BAD_PKT) | |
1317 | + dprintk(7, " (VID_B_MSK_BAD_PKT 0x%08x)\n", VID_B_MSK_BAD_PKT); | |
1318 | + if (ts1_status & VID_B_MSK_SYNC) | |
1319 | + dprintk(7, " (VID_B_MSK_SYNC 0x%08x)\n", VID_B_MSK_SYNC); | |
1320 | + if (ts1_status & VID_B_MSK_OF) | |
1321 | + dprintk(7, " (VID_B_MSK_OF 0x%08x)\n", VID_B_MSK_OF); | |
1322 | + | |
1323 | + printk(KERN_ERR "%s: mpeg risc op code error\n", dev->name); | |
1324 | + | |
1325 | + cx_clear(port->reg_dma_ctl, port->dma_ctl_val); | |
1326 | + cx23885_sram_channel_dump(dev, &dev->sram_channels[ port->sram_chno ]); | |
1327 | + | |
1328 | + } else if (ts1_status & VID_B_MSK_RISCI1) { | |
1329 | + | |
1330 | + dprintk(7, " (RISCI1 0x%08x)\n", VID_B_MSK_RISCI1); | |
1331 | + | |
1332 | + spin_lock(&port->slock); | |
1333 | + count = cx_read(port->reg_gpcnt); | |
1334 | + cx23885_wakeup(port, &port->mpegq, count); | |
1335 | + spin_unlock(&port->slock); | |
1336 | + | |
1337 | + } else if (ts1_status & VID_B_MSK_RISCI2) { | |
1338 | + | |
1339 | + dprintk(7, " (RISCI2 0x%08x)\n", VID_B_MSK_RISCI2); | |
1340 | + | |
1341 | + spin_lock(&port->slock); | |
1342 | + cx23885_restart_queue(port, &port->mpegq); | |
1343 | + spin_unlock(&port->slock); | |
1344 | + | |
1345 | + } | |
1346 | + if (ts1_status) { | |
1347 | + cx_write(VID_B_INT_STAT, ts1_status); | |
1348 | + handled = 1; | |
1349 | + } | |
1350 | + | |
1306 | 1351 | if ( (ts2_status & VID_C_MSK_OPC_ERR) || |
1307 | 1352 | (ts2_status & VID_C_MSK_BAD_PKT) || |
1308 | 1353 | (ts2_status & VID_C_MSK_SYNC) || |
... | ... | @@ -1341,9 +1386,13 @@ |
1341 | 1386 | |
1342 | 1387 | } |
1343 | 1388 | |
1344 | - cx_write(VID_C_INT_STAT, ts2_status); | |
1345 | - cx_write(PCI_INT_STAT, pci_status); | |
1346 | - handled = 1; | |
1389 | + if (ts2_status) { | |
1390 | + cx_write(VID_C_INT_STAT, ts2_status); | |
1391 | + handled = 1; | |
1392 | + } | |
1393 | + | |
1394 | + if (handled) | |
1395 | + cx_write(PCI_INT_STAT, pci_status); | |
1347 | 1396 | out: |
1348 | 1397 | return IRQ_RETVAL(handled); |
1349 | 1398 | } |