Eric Lee / linux-smarc-t335x-v3.2

Download as
Browse Code ยป

Commit 709731bb369b562586ee4c60f3f0393eb94dd9d6

Authored by Kalle Jokiniemi
Committed by Kevin Hilman
1 parent bb4de3df69
Exists in master and in 4 other branches v3.2_AM335xPSP_04.06.00.11, v3.2_NEWT335xPSP_04.06.00.11, v3.2_SBC_SMARTMEN, v3.2_SMARCT335xPSP_04.06.00.11

OMAP3: cpuidle: Add valid field into C-state parameter passing 

Different boards benefit differently from the available
seven C-states for cpu idle. In most cases, only few,
properly spaced (in terms of consumption and latency)
C-states are required to make the power management
optimal. Hence we need a possibility to pass which
C-states are actually used for each board.

So added the valid field to cpuidle_params and added
support to 3430sdp, which uses the paramenter passing.

Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Showing 3 changed files with 31 additions and 21 deletions Side-by-side Diff

arch/arm/mach-omap2/board-3430sdp.c
Diff comments   View file @ 709731b
... ... @@ -61,19 +61,19 @@
61 61 /* FIXME: These values need to be updated based on more profiling on 3430sdp*/
62 62 static struct cpuidle_params omap3_cpuidle_params_table[] = {
63 63 /* C1 */
64   - {2, 2, 5},
  64 + {1, 2, 2, 5},
65 65 /* C2 */
66   - {10, 10, 30},
  66 + {1, 10, 10, 30},
67 67 /* C3 */
68   - {50, 50, 300},
  68 + {1, 50, 50, 300},
69 69 /* C4 */
70   - {1500, 1800, 4000},
  70 + {1, 1500, 1800, 4000},
71 71 /* C5 */
72   - {2500, 7500, 12000},
  72 + {1, 2500, 7500, 12000},
73 73 /* C6 */
74   - {3000, 8500, 15000},
  74 + {1, 3000, 8500, 15000},
75 75 /* C7 */
76   - {10000, 30000, 300000},
  76 + {1, 10000, 30000, 300000},
77 77 };
78 78  
79 79 static int board_keymap[] = {
arch/arm/mach-omap2/cpuidle34xx.c
Diff comments   View file @ 709731b
... ... @@ -71,19 +71,19 @@
71 71 */
72 72 static struct cpuidle_params cpuidle_params_table[] = {
73 73 /* C1 */
74   - {2, 2, 5},
  74 + {1, 2, 2, 5},
75 75 /* C2 */
76   - {10, 10, 30},
  76 + {1, 10, 10, 30},
77 77 /* C3 */
78   - {50, 50, 300},
  78 + {1, 50, 50, 300},
79 79 /* C4 */
80   - {1500, 1800, 4000},
  80 + {1, 1500, 1800, 4000},
81 81 /* C5 */
82   - {2500, 7500, 12000},
  82 + {1, 2500, 7500, 12000},
83 83 /* C6 */
84   - {3000, 8500, 15000},
  84 + {1, 3000, 8500, 15000},
85 85 /* C7 */
86   - {10000, 30000, 300000},
  86 + {1, 10000, 30000, 300000},
87 87 };
88 88  
89 89 static int omap3_idle_bm_check(void)
... ... @@ -277,6 +277,8 @@
277 277 return;
278 278  
279 279 for (i = OMAP3_STATE_C1; i < OMAP3_MAX_STATES; i++) {
  280 + cpuidle_params_table[i].valid =
  281 + cpuidle_board_params[i].valid;
280 282 cpuidle_params_table[i].sleep_latency =
281 283 cpuidle_board_params[i].sleep_latency;
282 284 cpuidle_params_table[i].wake_latency =
... ... @@ -301,7 +303,8 @@
301 303 void omap_init_power_states(void)
302 304 {
303 305 /* C1 . MPU WFI + Core active */
304   - omap3_power_states[OMAP3_STATE_C1].valid = 1;
  306 + omap3_power_states[OMAP3_STATE_C1].valid =
  307 + cpuidle_params_table[OMAP3_STATE_C1].valid;
305 308 omap3_power_states[OMAP3_STATE_C1].type = OMAP3_STATE_C1;
306 309 omap3_power_states[OMAP3_STATE_C1].sleep_latency =
307 310 cpuidle_params_table[OMAP3_STATE_C1].sleep_latency;
... ... @@ -314,7 +317,8 @@
314 317 omap3_power_states[OMAP3_STATE_C1].flags = CPUIDLE_FLAG_TIME_VALID;
315 318  
316 319 /* C2 . MPU WFI + Core inactive */
317   - omap3_power_states[OMAP3_STATE_C2].valid = 1;
  320 + omap3_power_states[OMAP3_STATE_C2].valid =
  321 + cpuidle_params_table[OMAP3_STATE_C2].valid;
318 322 omap3_power_states[OMAP3_STATE_C2].type = OMAP3_STATE_C2;
319 323 omap3_power_states[OMAP3_STATE_C2].sleep_latency =
320 324 cpuidle_params_table[OMAP3_STATE_C2].sleep_latency;
... ... @@ -327,7 +331,8 @@
327 331 omap3_power_states[OMAP3_STATE_C2].flags = CPUIDLE_FLAG_TIME_VALID;
328 332  
329 333 /* C3 . MPU CSWR + Core inactive */
330   - omap3_power_states[OMAP3_STATE_C3].valid = 1;
  334 + omap3_power_states[OMAP3_STATE_C3].valid =
  335 + cpuidle_params_table[OMAP3_STATE_C3].valid;
331 336 omap3_power_states[OMAP3_STATE_C3].type = OMAP3_STATE_C3;
332 337 omap3_power_states[OMAP3_STATE_C3].sleep_latency =
333 338 cpuidle_params_table[OMAP3_STATE_C3].sleep_latency;
... ... @@ -341,7 +346,8 @@
341 346 CPUIDLE_FLAG_CHECK_BM;
342 347  
343 348 /* C4 . MPU OFF + Core inactive */
344   - omap3_power_states[OMAP3_STATE_C4].valid = 1;
  349 + omap3_power_states[OMAP3_STATE_C4].valid =
  350 + cpuidle_params_table[OMAP3_STATE_C4].valid;
345 351 omap3_power_states[OMAP3_STATE_C4].type = OMAP3_STATE_C4;
346 352 omap3_power_states[OMAP3_STATE_C4].sleep_latency =
347 353 cpuidle_params_table[OMAP3_STATE_C4].sleep_latency;
... ... @@ -355,7 +361,8 @@
355 361 CPUIDLE_FLAG_CHECK_BM;
356 362  
357 363 /* C5 . MPU CSWR + Core CSWR*/
358   - omap3_power_states[OMAP3_STATE_C5].valid = 1;
  364 + omap3_power_states[OMAP3_STATE_C5].valid =
  365 + cpuidle_params_table[OMAP3_STATE_C5].valid;
359 366 omap3_power_states[OMAP3_STATE_C5].type = OMAP3_STATE_C5;
360 367 omap3_power_states[OMAP3_STATE_C5].sleep_latency =
361 368 cpuidle_params_table[OMAP3_STATE_C5].sleep_latency;
... ... @@ -369,7 +376,8 @@
369 376 CPUIDLE_FLAG_CHECK_BM;
370 377  
371 378 /* C6 . MPU OFF + Core CSWR */
372   - omap3_power_states[OMAP3_STATE_C6].valid = 1;
  379 + omap3_power_states[OMAP3_STATE_C6].valid =
  380 + cpuidle_params_table[OMAP3_STATE_C6].valid;
373 381 omap3_power_states[OMAP3_STATE_C6].type = OMAP3_STATE_C6;
374 382 omap3_power_states[OMAP3_STATE_C6].sleep_latency =
375 383 cpuidle_params_table[OMAP3_STATE_C6].sleep_latency;
... ... @@ -383,7 +391,8 @@
383 391 CPUIDLE_FLAG_CHECK_BM;
384 392  
385 393 /* C7 . MPU OFF + Core OFF */
386   - omap3_power_states[OMAP3_STATE_C7].valid = 1;
  394 + omap3_power_states[OMAP3_STATE_C7].valid =
  395 + cpuidle_params_table[OMAP3_STATE_C7].valid;
387 396 omap3_power_states[OMAP3_STATE_C7].type = OMAP3_STATE_C7;
388 397 omap3_power_states[OMAP3_STATE_C7].sleep_latency =
389 398 cpuidle_params_table[OMAP3_STATE_C7].sleep_latency;
arch/arm/mach-omap2/pm.h
Diff comments   View file @ 709731b
... ... @@ -24,6 +24,7 @@
24 24 extern int omap3_idle_init(void);
25 25  
26 26 struct cpuidle_params {
  27 + u8 valid;
27 28 u32 sleep_latency;
28 29 u32 wake_latency;
29 30 u32 threshold;