Commit 710224fa2750cf449c02dd115548acebfdd2c86a

Authored by FUJITA Tomonori
Committed by Linus Torvalds
1 parent c227e69028

arm: fix "arm: fix pci_set_consistent_dma_mask for dmabounce devices"

This fixes the regression caused by the commit 6fee48cd330c68
("dma-mapping: arm: use generic pci_set_dma_mask and
pci_set_consistent_dma_mask").

ARM needs to clip the dma coherent mask for dmabounce devices. This
restores the old trick.

Note that strictly speaking, the DMA API doesn't allow architectures to do
such but I'm not sure it's worth adding the new API to set the dma mask
that allows architectures to clip it.

Reported-by: Krzysztof Halasa <khc@pm.waw.pl>
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Showing 6 changed files with 25 additions and 1 deletions Side-by-side Diff

arch/arm/common/it8152.c
... ... @@ -271,6 +271,14 @@
271 271 ((dma_addr + size - PHYS_OFFSET) >= SZ_64M);
272 272 }
273 273  
  274 +int dma_set_coherent_mask(struct device *dev, u64 mask)
  275 +{
  276 + if (mask >= PHYS_OFFSET + SZ_64M - 1)
  277 + return 0;
  278 +
  279 + return -EIO;
  280 +}
  281 +
274 282 int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
275 283 {
276 284 it8152_io.start = IT8152_IO_BASE + 0x12000;
arch/arm/mach-ixp4xx/common-pci.c
... ... @@ -503,6 +503,14 @@
503 503 return pci_scan_bus(sys->busnr, &ixp4xx_ops, sys);
504 504 }
505 505  
  506 +int dma_set_coherent_mask(struct device *dev, u64 mask)
  507 +{
  508 + if (mask >= SZ_64M - 1)
  509 + return 0;
  510 +
  511 + return -EIO;
  512 +}
  513 +
506 514 EXPORT_SYMBOL(ixp4xx_pci_read);
507 515 EXPORT_SYMBOL(ixp4xx_pci_write);
arch/arm/mach-ixp4xx/include/mach/hardware.h
... ... @@ -26,6 +26,8 @@
26 26 #define PCIBIOS_MAX_MEM 0x4BFFFFFF
27 27 #endif
28 28  
  29 +#define ARCH_HAS_DMA_SET_COHERENT_MASK
  30 +
29 31 #define pcibios_assign_all_busses() 1
30 32  
31 33 /* Register locations and bits */
arch/arm/mach-pxa/include/mach/hardware.h
... ... @@ -309,8 +309,8 @@
309 309 #define PCIBIOS_MIN_IO 0
310 310 #define PCIBIOS_MIN_MEM 0
311 311 #define pcibios_assign_all_busses() 1
  312 +#define ARCH_HAS_DMA_SET_COHERENT_MASK
312 313 #endif
313   -
314 314  
315 315 #endif /* _ASM_ARCH_HARDWARE_H */
arch/arm/mach-pxa/include/mach/io.h
... ... @@ -6,6 +6,8 @@
6 6 #ifndef __ASM_ARM_ARCH_IO_H
7 7 #define __ASM_ARM_ARCH_IO_H
8 8  
  9 +#include <mach/hardware.h>
  10 +
9 11 #define IO_SPACE_LIMIT 0xffffffff
10 12  
11 13 /*
include/linux/dma-mapping.h
... ... @@ -102,6 +102,9 @@
102 102 return DMA_BIT_MASK(32);
103 103 }
104 104  
  105 +#ifdef ARCH_HAS_DMA_SET_COHERENT_MASK
  106 +int dma_set_coherent_mask(struct device *dev, u64 mask);
  107 +#else
105 108 static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
106 109 {
107 110 if (!dma_supported(dev, mask))
... ... @@ -109,6 +112,7 @@
109 112 dev->coherent_dma_mask = mask;
110 113 return 0;
111 114 }
  115 +#endif
112 116  
113 117 extern u64 dma_get_required_mask(struct device *dev);
114 118