Commit 7fb9db4270711a434a8dd322ad1e3a6e7f798b91
Committed by
Vaibhav Hiremath
1 parent
8607406b53
Exists in
v3.2_SMARCT335xPSP_04.06.00.11
and in
3 other branches
IIO: ti_adc: Handle overrun before threshold event
If an overrun occurs, the threshold event is meaningless, handle the overrun event first. Signed-off-by: Russ Dill <Russ.Dill@ti.com>
Showing 1 changed file with 13 additions and 14 deletions Side-by-side Diff
drivers/staging/iio/adc/ti_adc.c
... | ... | @@ -152,7 +152,19 @@ |
152 | 152 | unsigned int status, config; |
153 | 153 | |
154 | 154 | status = adc_readl(adc_dev, TSCADC_REG_IRQSTATUS); |
155 | - if (status & TSCADC_IRQENB_FIFO1THRES) { | |
155 | + if (status & TSCADC_IRQENB_FIFO1OVRRUN) { | |
156 | + config = adc_readl(adc_dev, TSCADC_REG_CTRL); | |
157 | + config &= ~(TSCADC_CNTRLREG_TSCSSENB); | |
158 | + adc_writel(adc_dev, TSCADC_REG_CTRL, config); | |
159 | + | |
160 | + adc_writel(adc_dev, TSCADC_REG_IRQSTATUS, | |
161 | + TSCADC_IRQENB_FIFO1OVRRUN | | |
162 | + TSCADC_IRQENB_FIFO1UNDRFLW); | |
163 | + | |
164 | + adc_writel(adc_dev, TSCADC_REG_CTRL, | |
165 | + (config | TSCADC_CNTRLREG_TSCSSENB)); | |
166 | + return IRQ_HANDLED; | |
167 | + } else if (status & TSCADC_IRQENB_FIFO1THRES) { | |
156 | 168 | adc_writel(adc_dev, TSCADC_REG_IRQCLR, |
157 | 169 | TSCADC_IRQENB_FIFO1THRES); |
158 | 170 | |
... | ... | @@ -164,19 +176,6 @@ |
164 | 176 | } |
165 | 177 | adc_writel(adc_dev, TSCADC_REG_IRQSTATUS, |
166 | 178 | TSCADC_IRQENB_FIFO1THRES); |
167 | - return IRQ_HANDLED; | |
168 | - } else if ((status & TSCADC_IRQENB_FIFO1OVRRUN) || | |
169 | - (status & TSCADC_IRQENB_FIFO1UNDRFLW)) { | |
170 | - config = adc_readl(adc_dev, TSCADC_REG_CTRL); | |
171 | - config &= ~(TSCADC_CNTRLREG_TSCSSENB); | |
172 | - adc_writel(adc_dev, TSCADC_REG_CTRL, config); | |
173 | - | |
174 | - adc_writel(adc_dev, TSCADC_REG_IRQSTATUS, | |
175 | - TSCADC_IRQENB_FIFO1OVRRUN | | |
176 | - TSCADC_IRQENB_FIFO1UNDRFLW); | |
177 | - | |
178 | - adc_writel(adc_dev, TSCADC_REG_CTRL, | |
179 | - (config | TSCADC_CNTRLREG_TSCSSENB)); | |
180 | 179 | return IRQ_HANDLED; |
181 | 180 | } else { |
182 | 181 | return IRQ_NONE; |