Commit 80723c3fe457a5d29c178da4ac72983f47b37ed7

Authored by Nishanth Menon
Committed by Kevin Hilman
1 parent c4236d2e79

OMAP3: PM: make omap3_cpuidle_update_states independent of enable_off_mode

Currently omap3_cpuidle_update_states makes whole sale decision
on which C states to update based on enable_off_mode variable
Instead, achieve the same functionality by independently providing
mpu and core deepest states the system is allowed to achieve and
update the idle states accordingly.

Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
[khilman: fixed additional user of this API in OMAP CPUidle driver]
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Showing 3 changed files with 16 additions and 12 deletions Side-by-side Diff

arch/arm/mach-omap2/cpuidle34xx.c
... ... @@ -293,25 +293,26 @@
293 293 DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
294 294  
295 295 /**
296   - * omap3_cpuidle_update_states - Update the cpuidle states.
  296 + * omap3_cpuidle_update_states() - Update the cpuidle states
  297 + * @mpu_deepest_state: Enable states upto and including this for mpu domain
  298 + * @core_deepest_state: Enable states upto and including this for core domain
297 299 *
298   - * Currently, this function toggles the validity of idle states based upon
299   - * the flag 'enable_off_mode'. When the flag is set all states are valid.
300   - * Else, states leading to OFF state set to be invalid.
  300 + * This goes through the list of states available and enables and disables the
  301 + * validity of C states based on deepest state that can be achieved for the
  302 + * variable domain
301 303 */
302   -void omap3_cpuidle_update_states(void)
  304 +void omap3_cpuidle_update_states(u32 mpu_deepest_state, u32 core_deepest_state)
303 305 {
304 306 int i;
305 307  
306 308 for (i = OMAP3_STATE_C1; i < OMAP3_MAX_STATES; i++) {
307 309 struct omap3_processor_cx *cx = &omap3_power_states[i];
308 310  
309   - if (enable_off_mode) {
  311 + if ((cx->mpu_state >= mpu_deepest_state) &&
  312 + (cx->core_state >= core_deepest_state)) {
310 313 cx->valid = 1;
311 314 } else {
312   - if ((cx->mpu_state == PWRDM_POWER_OFF) ||
313   - (cx->core_state == PWRDM_POWER_OFF))
314   - cx->valid = 0;
  315 + cx->valid = 0;
315 316 }
316 317 }
317 318 }
... ... @@ -504,7 +505,10 @@
504 505 return -EINVAL;
505 506 dev->state_count = count;
506 507  
507   - omap3_cpuidle_update_states();
  508 + if (enable_off_mode)
  509 + omap3_cpuidle_update_states(PWRDM_POWER_OFF, PWRDM_POWER_OFF);
  510 + else
  511 + omap3_cpuidle_update_states(PWRDM_POWER_RET, PWRDM_POWER_RET);
508 512  
509 513 if (cpuidle_register_device(dev)) {
510 514 printk(KERN_ERR "%s: CPUidle register device failed\n",
arch/arm/mach-omap2/pm.h
... ... @@ -58,7 +58,7 @@
58 58 #endif
59 59  
60 60 #if defined(CONFIG_CPU_IDLE)
61   -extern void omap3_cpuidle_update_states(void);
  61 +extern void omap3_cpuidle_update_states(u32, u32);
62 62 #endif
63 63  
64 64 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
arch/arm/mach-omap2/pm34xx.c
... ... @@ -917,7 +917,7 @@
917 917 state = PWRDM_POWER_RET;
918 918  
919 919 #ifdef CONFIG_CPU_IDLE
920   - omap3_cpuidle_update_states();
  920 + omap3_cpuidle_update_states(state, state);
921 921 #endif
922 922  
923 923 list_for_each_entry(pwrst, &pwrst_list, node) {