hwmon: (pmbus) Add support for TI UCD9200 series of PWM System Controllers

This patch adds hardware monitoring support for TI UCD9220, UCD9222, UCD9224, UCD9240, UCD9244, UCD9246, and UCD9248 Digital PWM System Controllers. Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com> Reviewed-by: Tom Grennan <tom.grennan@ericsson.com>

hwmon: (pmbus) Add support for TI UCD9200 series of PWM System Controllers
This patch adds hardware monitoring support for TI UCD9220, UCD9222, UCD9224, UCD9240, UCD9244, UCD9246, and UCD9248 Digital PWM System Controllers. Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com> Reviewed-by: Tom Grennan <tom.grennan@ericsson.com>
Guenter Roeck
1 parent 6586b14c7b
Showing 4 changed files with 333 additions and 0 deletions Side-by-side Diff
Documentation/hwmon/ucd9200
drivers/hwmon/Kconfig
drivers/hwmon/Makefile
drivers/hwmon/ucd9200.c
+Kernel driver ucd9200
+=====================
+
+Supported chips:
+  * TI UCD9220, UCD9222, UCD9224, UCD9240, UCD9244, UCD9246, and UCD9248
+    Prefixes: 'ucd9220', 'ucd9222', 'ucd9224', 'ucd9240', 'ucd9244', 'ucd9246',
+	'ucd9248'
+    Addresses scanned: -
+    Datasheets:
+	http://focus.ti.com/lit/ds/symlink/ucd9220.pdf
+	http://focus.ti.com/lit/ds/symlink/ucd9222.pdf
+	http://focus.ti.com/lit/ds/symlink/ucd9224.pdf
+	http://focus.ti.com/lit/ds/symlink/ucd9240.pdf
+	http://focus.ti.com/lit/ds/symlink/ucd9244.pdf
+	http://focus.ti.com/lit/ds/symlink/ucd9246.pdf
+	http://focus.ti.com/lit/ds/symlink/ucd9248.pdf
+
+Author: Guenter Roeck <guenter.roeck@ericsson.com>
+
+
+Description
+-----------
+
+[From datasheets] UCD9220, UCD9222, UCD9224, UCD9240, UCD9244, UCD9246, and
+UCD9248 are multi-rail, multi-phase synchronous buck digital PWM controllers
+designed for non-isolated DC/DC power applications. The devices integrate
+dedicated circuitry for DC/DC loop management with flash memory and a serial
+interface to support configuration, monitoring and management.
+
+This driver is a client driver to the core PMBus driver. Please see
+Documentation/hwmon/pmbus for details on PMBus client drivers.
+
+
+Usage Notes
+-----------
+
+This driver does not auto-detect devices. You will have to instantiate the
+devices explicitly. Please see Documentation/i2c/instantiating-devices for
+details.
+
+
+Platform data support
+---------------------
+
+The driver supports standard PMBus driver platform data. Please see
+Documentation/hwmon/pmbus for details.
+
+
+Sysfs entries
+-------------
+
+The following attributes are supported. Limits are read-write; all other
+attributes are read-only.
+
+in1_label		"vin".
+in1_input		Measured voltage. From READ_VIN register.
+in1_min			Minumum Voltage. From VIN_UV_WARN_LIMIT register.
+in1_max			Maximum voltage. From VIN_OV_WARN_LIMIT register.
+in1_lcrit		Critical minumum Voltage. VIN_UV_FAULT_LIMIT register.
+in1_crit		Critical maximum voltage. From VIN_OV_FAULT_LIMIT register.
+in1_min_alarm		Voltage low alarm. From VIN_UV_WARNING status.
+in1_max_alarm		Voltage high alarm. From VIN_OV_WARNING status.
+in1_lcrit_alarm		Voltage critical low alarm. From VIN_UV_FAULT status.
+in1_crit_alarm		Voltage critical high alarm. From VIN_OV_FAULT status.
+
+in[2-5]_label		"vout[1-4]".
+in[2-5]_input		Measured voltage. From READ_VOUT register.
+in[2-5]_min		Minumum Voltage. From VOUT_UV_WARN_LIMIT register.
+in[2-5]_max		Maximum voltage. From VOUT_OV_WARN_LIMIT register.
+in[2-5]_lcrit		Critical minumum Voltage. VOUT_UV_FAULT_LIMIT register.
+in[2-5]_crit		Critical maximum voltage. From VOUT_OV_FAULT_LIMIT register.
+in[2-5]_min_alarm	Voltage low alarm. From VOLTAGE_UV_WARNING status.
+in[2-5]_max_alarm	Voltage high alarm. From VOLTAGE_OV_WARNING status.
+in[2-5]_lcrit_alarm	Voltage critical low alarm. From VOLTAGE_UV_FAULT status.
+in[2-5]_crit_alarm	Voltage critical high alarm. From VOLTAGE_OV_FAULT status.
+
+curr1_label		"iin".
+curr1_input		Measured current. From READ_IIN register.
+
+curr[2-5]_label		"iout[1-4]".
+curr[2-5]_input		Measured current. From READ_IOUT register.
+curr[2-5]_max		Maximum current. From IOUT_OC_WARN_LIMIT register.
+curr[2-5]_lcrit		Critical minumum output current. From IOUT_UC_FAULT_LIMIT
+			register.
+curr[2-5]_crit		Critical maximum current. From IOUT_OC_FAULT_LIMIT register.
+curr[2-5]_max_alarm	Current high alarm. From IOUT_OC_WARNING status.
+curr[2-5]_crit_alarm	Current critical high alarm. From IOUT_OC_FAULT status.
+
+power1_input		Measured input power. From READ_PIN register.
+power1_label		"pin"
+
+power[2-5]_input	Measured output power. From READ_POUT register.
+power[2-5]_label	"pout[1-4]"
+
+			The number of output voltage, current, and power
+			attribute sets is determined by the number of enabled
+			rails. See chip datasheets for details.
+
+temp[1-5]_input		Measured temperatures. From READ_TEMPERATURE_1 and
+		        READ_TEMPERATURE_2 registers.
+			temp1 is the chip internal temperature. temp[2-5] are
+			rail temperatures.  temp[2-5] attributes are only
+			created for enabled rails. See chip datasheets for
+			details.
+temp[1-5]_max		Maximum temperature. From OT_WARN_LIMIT register.
+temp[1-5]_crit		Critical high temperature. From OT_FAULT_LIMIT register.
+temp[1-5]_max_alarm	Temperature high alarm.
+temp[1-5]_crit_alarm	Temperature critical high alarm.
+
+fan1_input		Fan RPM. ucd9240 only.
+fan1_alarm		Fan alarm. ucd9240 only.
+fan1_fault		Fan fault. ucd9240 only.
@@ -857,6 +857,16 @@
 	  This driver can also be built as a module. If so, the module will
 	  be called max8688.
  
+config SENSORS_UCD9200
+	tristate "TI UCD9220, UCD9222, UCD9224, UCD9240, UCD9244, UCD9246, UCD9248"
+	default n
+	help
+	  If you say yes here you get hardware monitoring support for TI
+	  UCD9220, UCD9222, UCD9224, UCD9240, UCD9244, UCD9246, and UCD9248.
+
+	  This driver can also be built as a module. If so, the module will
+	  be called ucd9200.
+
 endif # PMBUS
  
 config SENSORS_SHT15
@@ -123,6 +123,7 @@
 obj-$(CONFIG_SENSORS_MAX16064)	+= max16064.o
 obj-$(CONFIG_SENSORS_MAX34440)	+= max34440.o
 obj-$(CONFIG_SENSORS_MAX8688)	+= max8688.o
+obj-$(CONFIG_SENSORS_UCD9200)	+= ucd9200.o
  
 ccflags-$(CONFIG_HWMON_DEBUG_CHIP) := -DDEBUG
+/*
+ * Hardware monitoring driver for ucd9200 series Digital PWM System Controllers
+ *
+ * Copyright (C) 2011 Ericsson AB.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/i2c/pmbus.h>
+#include "pmbus.h"
+
+#define UCD9200_PHASE_INFO	0xd2
+#define UCD9200_DEVICE_ID	0xfd
+
+enum chips { ucd9200, ucd9220, ucd9222, ucd9224, ucd9240, ucd9244, ucd9246,
+	     ucd9248 };
+
+static const struct i2c_device_id ucd9200_id[] = {
+	{"ucd9200", ucd9200},
+	{"ucd9220", ucd9220},
+	{"ucd9222", ucd9222},
+	{"ucd9224", ucd9224},
+	{"ucd9240", ucd9240},
+	{"ucd9244", ucd9244},
+	{"ucd9246", ucd9246},
+	{"ucd9248", ucd9248},
+	{}
+};
+MODULE_DEVICE_TABLE(i2c, ucd9200_id);
+
+static int ucd9200_probe(struct i2c_client *client,
+			 const struct i2c_device_id *id)
+{
+	u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1];
+	struct pmbus_driver_info *info;
+	const struct i2c_device_id *mid;
+	int i, j, ret;
+
+	if (!i2c_check_functionality(client->adapter,
+				     I2C_FUNC_SMBUS_BYTE_DATA |
+				     I2C_FUNC_SMBUS_BLOCK_DATA))
+		return -ENODEV;
+
+	ret = i2c_smbus_read_block_data(client, UCD9200_DEVICE_ID,
+					block_buffer);
+	if (ret < 0) {
+		dev_err(&client->dev, "Failed to read device ID\n");
+		return ret;
+	}
+	block_buffer[ret] = '\0';
+	dev_info(&client->dev, "Device ID %s\n", block_buffer);
+
+	mid = NULL;
+	for (i = 0; i < ARRAY_SIZE(ucd9200_id); i++) {
+		mid = &ucd9200_id[i];
+		if (!strncasecmp(mid->name, block_buffer, strlen(mid->name)))
+			break;
+	}
+	if (!mid || !strlen(mid->name)) {
+		dev_err(&client->dev, "Unsupported device\n");
+		return -ENODEV;
+	}
+	if (id->driver_data != ucd9200 && id->driver_data != mid->driver_data)
+		dev_notice(&client->dev,
+			   "Device mismatch: Configured %s, detected %s\n",
+			   id->name, mid->name);
+
+	info = kzalloc(sizeof(struct pmbus_driver_info), GFP_KERNEL);
+	if (!info)
+		return -ENOMEM;
+
+	ret = i2c_smbus_read_block_data(client, UCD9200_PHASE_INFO,
+					block_buffer);
+	if (ret < 0) {
+		dev_err(&client->dev, "Failed to read phase information\n");
+		goto out;
+	}
+
+	/*
+	 * Calculate number of configured pages (rails) from PHASE_INFO
+	 * register.
+	 * Rails have to be sequential, so we can abort after finding
+	 * the first unconfigured rail.
+	 */
+	info->pages = 0;
+	for (i = 0; i < ret; i++) {
+		if (!block_buffer[i])
+			break;
+		info->pages++;
+	}
+	if (!info->pages) {
+		dev_err(&client->dev, "No rails configured\n");
+		ret = -ENODEV;
+		goto out;
+	}
+	dev_info(&client->dev, "%d rails configured\n", info->pages);
+
+	/*
+	 * Set PHASE registers on all pages to 0xff to ensure that phase
+	 * specific commands will apply to all phases of a given page (rail).
+	 * This only affects the READ_IOUT and READ_TEMPERATURE2 registers.
+	 * READ_IOUT will return the sum of currents of all phases of a rail,
+	 * and READ_TEMPERATURE2 will return the maximum temperature detected
+	 * for the the phases of the rail.
+	 */
+	for (i = 0; i < info->pages; i++) {
+		/*
+		 * Setting PAGE & PHASE fails once in a while for no obvious
+		 * reason, so we need to retry a couple of times.
+		 */
+		for (j = 0; j < 3; j++) {
+			ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i);
+			if (ret < 0)
+				continue;
+			ret = i2c_smbus_write_byte_data(client, PMBUS_PHASE,
+							0xff);
+			if (ret < 0)
+				continue;
+			break;
+		}
+		if (ret < 0) {
+			dev_err(&client->dev,
+				"Failed to initialize PHASE registers\n");
+			goto out;
+		}
+	}
+	if (info->pages > 1)
+		i2c_smbus_write_byte_data(client, PMBUS_PAGE, 0);
+
+	info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT |
+			PMBUS_HAVE_IIN | PMBUS_HAVE_PIN |
+			PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+			PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
+			PMBUS_HAVE_POUT | PMBUS_HAVE_TEMP |
+			PMBUS_HAVE_TEMP2 | PMBUS_HAVE_STATUS_TEMP;
+
+	for (i = 1; i < info->pages; i++)
+		info->func[i] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+			PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
+			PMBUS_HAVE_POUT |
+			PMBUS_HAVE_TEMP2 | PMBUS_HAVE_STATUS_TEMP;
+
+	/* ucd9240 supports a single fan */
+	if (mid->driver_data == ucd9240)
+		info->func[0] |= PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12;
+
+	ret = pmbus_do_probe(client, mid, info);
+	if (ret < 0)
+		goto out;
+	return 0;
+out:
+	kfree(info);
+	return ret;
+}
+
+static int ucd9200_remove(struct i2c_client *client)
+{
+	int ret;
+	const struct pmbus_driver_info *info;
+
+	info = pmbus_get_driver_info(client);
+	ret = pmbus_do_remove(client);
+	kfree(info);
+	return ret;
+}
+
+
+/* This is the driver that will be inserted */
+static struct i2c_driver ucd9200_driver = {
+	.driver = {
+		.name = "ucd9200",
+	},
+	.probe = ucd9200_probe,
+	.remove = ucd9200_remove,
+	.id_table = ucd9200_id,
+};
+
+static int __init ucd9200_init(void)
+{
+	return i2c_add_driver(&ucd9200_driver);
+}
+
+static void __exit ucd9200_exit(void)
+{
+	i2c_del_driver(&ucd9200_driver);
+}
+
+MODULE_AUTHOR("Guenter Roeck");
+MODULE_DESCRIPTION("PMBus driver for TI UCD922x, UCD924x");
+MODULE_LICENSE("GPL");
+module_init(ucd9200_init);
+module_exit(ucd9200_exit);
	1	+Kernel driver ucd9200
	2	+=====================
	3	+
	4	+Supported chips:
	5	+ * TI UCD9220, UCD9222, UCD9224, UCD9240, UCD9244, UCD9246, and UCD9248
	6	+ Prefixes: 'ucd9220', 'ucd9222', 'ucd9224', 'ucd9240', 'ucd9244', 'ucd9246',
	7	+ 'ucd9248'
	8	+ Addresses scanned: -
	9	+ Datasheets:
	10	+ http://focus.ti.com/lit/ds/symlink/ucd9220.pdf
	11	+ http://focus.ti.com/lit/ds/symlink/ucd9222.pdf
	12	+ http://focus.ti.com/lit/ds/symlink/ucd9224.pdf
	13	+ http://focus.ti.com/lit/ds/symlink/ucd9240.pdf
	14	+ http://focus.ti.com/lit/ds/symlink/ucd9244.pdf
	15	+ http://focus.ti.com/lit/ds/symlink/ucd9246.pdf
	16	+ http://focus.ti.com/lit/ds/symlink/ucd9248.pdf
	17	+
	18	+Author: Guenter Roeck <guenter.roeck@ericsson.com>
	19	+
	20	+
	21	+Description
	22	+-----------
	23	+
	24	+[From datasheets] UCD9220, UCD9222, UCD9224, UCD9240, UCD9244, UCD9246, and
	25	+UCD9248 are multi-rail, multi-phase synchronous buck digital PWM controllers
	26	+designed for non-isolated DC/DC power applications. The devices integrate
	27	+dedicated circuitry for DC/DC loop management with flash memory and a serial
	28	+interface to support configuration, monitoring and management.
	29	+
	30	+This driver is a client driver to the core PMBus driver. Please see
	31	+Documentation/hwmon/pmbus for details on PMBus client drivers.
	32	+
	33	+
	34	+Usage Notes
	35	+-----------
	36	+
	37	+This driver does not auto-detect devices. You will have to instantiate the
	38	+devices explicitly. Please see Documentation/i2c/instantiating-devices for
	39	+details.
	40	+
	41	+
	42	+Platform data support
	43	+---------------------
	44	+
	45	+The driver supports standard PMBus driver platform data. Please see
	46	+Documentation/hwmon/pmbus for details.
	47	+
	48	+
	49	+Sysfs entries
	50	+-------------
	51	+
	52	+The following attributes are supported. Limits are read-write; all other
	53	+attributes are read-only.
	54	+
	55	+in1_label "vin".
	56	+in1_input Measured voltage. From READ_VIN register.
	57	+in1_min Minumum Voltage. From VIN_UV_WARN_LIMIT register.
	58	+in1_max Maximum voltage. From VIN_OV_WARN_LIMIT register.
	59	+in1_lcrit Critical minumum Voltage. VIN_UV_FAULT_LIMIT register.
	60	+in1_crit Critical maximum voltage. From VIN_OV_FAULT_LIMIT register.
	61	+in1_min_alarm Voltage low alarm. From VIN_UV_WARNING status.
	62	+in1_max_alarm Voltage high alarm. From VIN_OV_WARNING status.
	63	+in1_lcrit_alarm Voltage critical low alarm. From VIN_UV_FAULT status.
	64	+in1_crit_alarm Voltage critical high alarm. From VIN_OV_FAULT status.
	65	+
	66	+in[2-5]_label "vout[1-4]".
	67	+in[2-5]_input Measured voltage. From READ_VOUT register.
	68	+in[2-5]_min Minumum Voltage. From VOUT_UV_WARN_LIMIT register.
	69	+in[2-5]_max Maximum voltage. From VOUT_OV_WARN_LIMIT register.
	70	+in[2-5]_lcrit Critical minumum Voltage. VOUT_UV_FAULT_LIMIT register.
	71	+in[2-5]_crit Critical maximum voltage. From VOUT_OV_FAULT_LIMIT register.
	72	+in[2-5]_min_alarm Voltage low alarm. From VOLTAGE_UV_WARNING status.
	73	+in[2-5]_max_alarm Voltage high alarm. From VOLTAGE_OV_WARNING status.
	74	+in[2-5]_lcrit_alarm Voltage critical low alarm. From VOLTAGE_UV_FAULT status.
	75	+in[2-5]_crit_alarm Voltage critical high alarm. From VOLTAGE_OV_FAULT status.
	76	+
	77	+curr1_label "iin".
	78	+curr1_input Measured current. From READ_IIN register.
	79	+
	80	+curr[2-5]_label "iout[1-4]".
	81	+curr[2-5]_input Measured current. From READ_IOUT register.
	82	+curr[2-5]_max Maximum current. From IOUT_OC_WARN_LIMIT register.
	83	+curr[2-5]_lcrit Critical minumum output current. From IOUT_UC_FAULT_LIMIT
	84	+ register.
	85	+curr[2-5]_crit Critical maximum current. From IOUT_OC_FAULT_LIMIT register.
	86	+curr[2-5]_max_alarm Current high alarm. From IOUT_OC_WARNING status.
	87	+curr[2-5]_crit_alarm Current critical high alarm. From IOUT_OC_FAULT status.
	88	+
	89	+power1_input Measured input power. From READ_PIN register.
	90	+power1_label "pin"
	91	+
	92	+power[2-5]_input Measured output power. From READ_POUT register.
	93	+power[2-5]_label "pout[1-4]"
	94	+
	95	+ The number of output voltage, current, and power
	96	+ attribute sets is determined by the number of enabled
	97	+ rails. See chip datasheets for details.
	98	+
	99	+temp[1-5]_input Measured temperatures. From READ_TEMPERATURE_1 and
	100	+ READ_TEMPERATURE_2 registers.
	101	+ temp1 is the chip internal temperature. temp[2-5] are
	102	+ rail temperatures. temp[2-5] attributes are only
	103	+ created for enabled rails. See chip datasheets for
	104	+ details.
	105	+temp[1-5]_max Maximum temperature. From OT_WARN_LIMIT register.
	106	+temp[1-5]_crit Critical high temperature. From OT_FAULT_LIMIT register.
	107	+temp[1-5]_max_alarm Temperature high alarm.
	108	+temp[1-5]_crit_alarm Temperature critical high alarm.
	109	+
	110	+fan1_input Fan RPM. ucd9240 only.
	111	+fan1_alarm Fan alarm. ucd9240 only.
	112	+fan1_fault Fan fault. ucd9240 only.
...	...	@@ -857,6 +857,16 @@
857	857	This driver can also be built as a module. If so, the module will
858	858	be called max8688.
859	859
	860	+config SENSORS_UCD9200
	861	+ tristate "TI UCD9220, UCD9222, UCD9224, UCD9240, UCD9244, UCD9246, UCD9248"
	862	+ default n
	863	+ help
	864	+ If you say yes here you get hardware monitoring support for TI
	865	+ UCD9220, UCD9222, UCD9224, UCD9240, UCD9244, UCD9246, and UCD9248.
	866	+
	867	+ This driver can also be built as a module. If so, the module will
	868	+ be called ucd9200.
	869	+
860	870	endif # PMBUS
861	871
862	872	config SENSORS_SHT15
...	...	@@ -123,6 +123,7 @@
123	123	obj-$(CONFIG_SENSORS_MAX16064) += max16064.o
124	124	obj-$(CONFIG_SENSORS_MAX34440) += max34440.o
125	125	obj-$(CONFIG_SENSORS_MAX8688) += max8688.o
	126	+obj-$(CONFIG_SENSORS_UCD9200) += ucd9200.o
126	127
127	128	ccflags-$(CONFIG_HWMON_DEBUG_CHIP) := -DDEBUG
	1	+/*
	2	+ * Hardware monitoring driver for ucd9200 series Digital PWM System Controllers
	3	+ *
	4	+ * Copyright (C) 2011 Ericsson AB.
	5	+ *
	6	+ * This program is free software; you can redistribute it and/or modify
	7	+ * it under the terms of the GNU General Public License as published by
	8	+ * the Free Software Foundation; either version 2 of the License, or
	9	+ * (at your option) any later version.
	10	+ *
	11	+ * This program is distributed in the hope that it will be useful,
	12	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	+ * GNU General Public License for more details.
	15	+ *
	16	+ * You should have received a copy of the GNU General Public License
	17	+ * along with this program; if not, write to the Free Software
	18	+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	19	+ */
	20	+
	21	+#include <linux/kernel.h>
	22	+#include <linux/module.h>
	23	+#include <linux/init.h>
	24	+#include <linux/err.h>
	25	+#include <linux/slab.h>
	26	+#include <linux/i2c.h>
	27	+#include <linux/i2c/pmbus.h>
	28	+#include "pmbus.h"
	29	+
	30	+#define UCD9200_PHASE_INFO 0xd2
	31	+#define UCD9200_DEVICE_ID 0xfd
	32	+
	33	+enum chips { ucd9200, ucd9220, ucd9222, ucd9224, ucd9240, ucd9244, ucd9246,
	34	+ ucd9248 };
	35	+
	36	+static const struct i2c_device_id ucd9200_id[] = {
	37	+ {"ucd9200", ucd9200},
	38	+ {"ucd9220", ucd9220},
	39	+ {"ucd9222", ucd9222},
	40	+ {"ucd9224", ucd9224},
	41	+ {"ucd9240", ucd9240},
	42	+ {"ucd9244", ucd9244},
	43	+ {"ucd9246", ucd9246},
	44	+ {"ucd9248", ucd9248},
	45	+ {}
	46	+};
	47	+MODULE_DEVICE_TABLE(i2c, ucd9200_id);
	48	+
	49	+static int ucd9200_probe(struct i2c_client *client,
	50	+ const struct i2c_device_id *id)
	51	+{
	52	+ u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1];
	53	+ struct pmbus_driver_info *info;
	54	+ const struct i2c_device_id *mid;
	55	+ int i, j, ret;
	56	+
	57	+ if (!i2c_check_functionality(client->adapter,
	58	+ I2C_FUNC_SMBUS_BYTE_DATA \|
	59	+ I2C_FUNC_SMBUS_BLOCK_DATA))
	60	+ return -ENODEV;
	61	+
	62	+ ret = i2c_smbus_read_block_data(client, UCD9200_DEVICE_ID,
	63	+ block_buffer);
	64	+ if (ret < 0) {
	65	+ dev_err(&client->dev, "Failed to read device ID\n");
	66	+ return ret;
	67	+ }
	68	+ block_buffer[ret] = '\0';
	69	+ dev_info(&client->dev, "Device ID %s\n", block_buffer);
	70	+
	71	+ mid = NULL;
	72	+ for (i = 0; i < ARRAY_SIZE(ucd9200_id); i++) {
	73	+ mid = &ucd9200_id[i];
	74	+ if (!strncasecmp(mid->name, block_buffer, strlen(mid->name)))
	75	+ break;
	76	+ }
	77	+ if (!mid \|\| !strlen(mid->name)) {
	78	+ dev_err(&client->dev, "Unsupported device\n");
	79	+ return -ENODEV;
	80	+ }
	81	+ if (id->driver_data != ucd9200 && id->driver_data != mid->driver_data)
	82	+ dev_notice(&client->dev,
	83	+ "Device mismatch: Configured %s, detected %s\n",
	84	+ id->name, mid->name);
	85	+
	86	+ info = kzalloc(sizeof(struct pmbus_driver_info), GFP_KERNEL);
	87	+ if (!info)
	88	+ return -ENOMEM;
	89	+
	90	+ ret = i2c_smbus_read_block_data(client, UCD9200_PHASE_INFO,
	91	+ block_buffer);
	92	+ if (ret < 0) {
	93	+ dev_err(&client->dev, "Failed to read phase information\n");
	94	+ goto out;
	95	+ }
	96	+
	97	+ /*
	98	+ * Calculate number of configured pages (rails) from PHASE_INFO
	99	+ * register.
	100	+ * Rails have to be sequential, so we can abort after finding
	101	+ * the first unconfigured rail.
	102	+ */
	103	+ info->pages = 0;
	104	+ for (i = 0; i < ret; i++) {
	105	+ if (!block_buffer[i])
	106	+ break;
	107	+ info->pages++;
	108	+ }
	109	+ if (!info->pages) {
	110	+ dev_err(&client->dev, "No rails configured\n");
	111	+ ret = -ENODEV;
	112	+ goto out;
	113	+ }
	114	+ dev_info(&client->dev, "%d rails configured\n", info->pages);
	115	+
	116	+ /*
	117	+ * Set PHASE registers on all pages to 0xff to ensure that phase
	118	+ * specific commands will apply to all phases of a given page (rail).
	119	+ * This only affects the READ_IOUT and READ_TEMPERATURE2 registers.
	120	+ * READ_IOUT will return the sum of currents of all phases of a rail,
	121	+ * and READ_TEMPERATURE2 will return the maximum temperature detected
	122	+ * for the the phases of the rail.
	123	+ */
	124	+ for (i = 0; i < info->pages; i++) {
	125	+ /*
	126	+ * Setting PAGE & PHASE fails once in a while for no obvious
	127	+ * reason, so we need to retry a couple of times.
	128	+ */
	129	+ for (j = 0; j < 3; j++) {
	130	+ ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i);
	131	+ if (ret < 0)
	132	+ continue;
	133	+ ret = i2c_smbus_write_byte_data(client, PMBUS_PHASE,
	134	+ 0xff);
	135	+ if (ret < 0)
	136	+ continue;
	137	+ break;
	138	+ }
	139	+ if (ret < 0) {
	140	+ dev_err(&client->dev,
	141	+ "Failed to initialize PHASE registers\n");
	142	+ goto out;
	143	+ }
	144	+ }
	145	+ if (info->pages > 1)
	146	+ i2c_smbus_write_byte_data(client, PMBUS_PAGE, 0);
	147	+
	148	+ info->func[0] = PMBUS_HAVE_VIN \| PMBUS_HAVE_STATUS_INPUT \|
	149	+ PMBUS_HAVE_IIN \| PMBUS_HAVE_PIN \|
	150	+ PMBUS_HAVE_VOUT \| PMBUS_HAVE_STATUS_VOUT \|
	151	+ PMBUS_HAVE_IOUT \| PMBUS_HAVE_STATUS_IOUT \|
	152	+ PMBUS_HAVE_POUT \| PMBUS_HAVE_TEMP \|
	153	+ PMBUS_HAVE_TEMP2 \| PMBUS_HAVE_STATUS_TEMP;
	154	+
	155	+ for (i = 1; i < info->pages; i++)
	156	+ info->func[i] = PMBUS_HAVE_VOUT \| PMBUS_HAVE_STATUS_VOUT \|
	157	+ PMBUS_HAVE_IOUT \| PMBUS_HAVE_STATUS_IOUT \|
	158	+ PMBUS_HAVE_POUT \|
	159	+ PMBUS_HAVE_TEMP2 \| PMBUS_HAVE_STATUS_TEMP;
	160	+
	161	+ /* ucd9240 supports a single fan */
	162	+ if (mid->driver_data == ucd9240)
	163	+ info->func[0] \|= PMBUS_HAVE_FAN12 \| PMBUS_HAVE_STATUS_FAN12;
	164	+
	165	+ ret = pmbus_do_probe(client, mid, info);
	166	+ if (ret < 0)
	167	+ goto out;
	168	+ return 0;
	169	+out:
	170	+ kfree(info);
	171	+ return ret;
	172	+}
	173	+
	174	+static int ucd9200_remove(struct i2c_client *client)
	175	+{
	176	+ int ret;
	177	+ const struct pmbus_driver_info *info;
	178	+
	179	+ info = pmbus_get_driver_info(client);
	180	+ ret = pmbus_do_remove(client);
	181	+ kfree(info);
	182	+ return ret;
	183	+}
	184	+
	185	+
	186	+/* This is the driver that will be inserted */
	187	+static struct i2c_driver ucd9200_driver = {
	188	+ .driver = {
	189	+ .name = "ucd9200",
	190	+ },
	191	+ .probe = ucd9200_probe,
	192	+ .remove = ucd9200_remove,
	193	+ .id_table = ucd9200_id,
	194	+};
	195	+
	196	+static int __init ucd9200_init(void)
	197	+{
	198	+ return i2c_add_driver(&ucd9200_driver);
	199	+}
	200	+
	201	+static void __exit ucd9200_exit(void)
	202	+{
	203	+ i2c_del_driver(&ucd9200_driver);
	204	+}
	205	+
	206	+MODULE_AUTHOR("Guenter Roeck");
	207	+MODULE_DESCRIPTION("PMBus driver for TI UCD922x, UCD924x");
	208	+MODULE_LICENSE("GPL");
	209	+module_init(ucd9200_init);
	210	+module_exit(ucd9200_exit);