Commit 909e90d3c410b684e564729145f7c20dad887757
Committed by
Linus Torvalds
1 parent
1adfd6095e
Exists in
master
and in
4 other branches
uml: 64-bit tlb fixes
Some 64-bit tlb fixes - moved pmd_page_vaddr to pgtable.h since it's the same for both 2-level and 3-level page tables fixed a bogus cast on pud_page_vaddr made the address checking in update_*_range more careful Signed-off-by: Jeff Dike <jdike@linux.intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Showing 4 changed files with 8 additions and 9 deletions Side-by-side Diff
arch/um/kernel/tlb.c
... | ... | @@ -207,7 +207,7 @@ |
207 | 207 | else if (pte_newprot(*pte)) |
208 | 208 | ret = add_mprotect(addr, PAGE_SIZE, prot, hvc); |
209 | 209 | *pte = pte_mkuptodate(*pte); |
210 | - } while (pte++, addr += PAGE_SIZE, ((addr != end) && !ret)); | |
210 | + } while (pte++, addr += PAGE_SIZE, ((addr < end) && !ret)); | |
211 | 211 | return ret; |
212 | 212 | } |
213 | 213 | |
... | ... | @@ -229,7 +229,7 @@ |
229 | 229 | } |
230 | 230 | } |
231 | 231 | else ret = update_pte_range(pmd, addr, next, hvc); |
232 | - } while (pmd++, addr = next, ((addr != end) && !ret)); | |
232 | + } while (pmd++, addr = next, ((addr < end) && !ret)); | |
233 | 233 | return ret; |
234 | 234 | } |
235 | 235 | |
... | ... | @@ -251,7 +251,7 @@ |
251 | 251 | } |
252 | 252 | } |
253 | 253 | else ret = update_pmd_range(pud, addr, next, hvc); |
254 | - } while (pud++, addr = next, ((addr != end) && !ret)); | |
254 | + } while (pud++, addr = next, ((addr < end) && !ret)); | |
255 | 255 | return ret; |
256 | 256 | } |
257 | 257 | |
... | ... | @@ -274,7 +274,7 @@ |
274 | 274 | } |
275 | 275 | } |
276 | 276 | else ret = update_pud_range(pgd, addr, next, &hvc); |
277 | - } while (pgd++, addr = next, ((addr != end_addr) && !ret)); | |
277 | + } while (pgd++, addr = next, ((addr < end_addr) && !ret)); | |
278 | 278 | |
279 | 279 | if (!ret) |
280 | 280 | ret = do_ops(&hvc, hvc.index, 1); |
include/asm-um/pgtable-2level.h
... | ... | @@ -41,9 +41,6 @@ |
41 | 41 | #define pfn_pte(pfn, prot) __pte(pfn_to_phys(pfn) | pgprot_val(prot)) |
42 | 42 | #define pfn_pmd(pfn, prot) __pmd(pfn_to_phys(pfn) | pgprot_val(prot)) |
43 | 43 | |
44 | -#define pmd_page_vaddr(pmd) \ | |
45 | - ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) | |
46 | - | |
47 | 44 | /* |
48 | 45 | * Bits 0 through 4 are taken |
49 | 46 | */ |
include/asm-um/pgtable-3level.h
... | ... | @@ -87,8 +87,7 @@ |
87 | 87 | } |
88 | 88 | |
89 | 89 | #define pud_page(pud) phys_to_page(pud_val(pud) & PAGE_MASK) |
90 | -#define pud_page_vaddr(pud) \ | |
91 | - ((struct page *) __va(pud_val(pud) & PAGE_MASK)) | |
90 | +#define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PAGE_MASK)) | |
92 | 91 | |
93 | 92 | /* Find an entry in the second-level page table.. */ |
94 | 93 | #define pmd_offset(pud, address) ((pmd_t *) pud_page_vaddr(*(pud)) + \ |
include/asm-um/pgtable.h
... | ... | @@ -308,6 +308,9 @@ |
308 | 308 | #define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) |
309 | 309 | #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) |
310 | 310 | |
311 | +#define pmd_page_vaddr(pmd) \ | |
312 | + ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) | |
313 | + | |
311 | 314 | /* |
312 | 315 | * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE] |
313 | 316 | * |