Eric Lee / linux-smarc-t335x-v3.2

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Commit 97bdb69b0e405063b8a536ea22bd88f3e45c412c

Authored by Greg Guyotte
Committed by Hebbar Gururaja
1 parent bdb7a24498
Exists in v3.2_SMARCT335xPSP_04.06.00.11 and in 3 other branches v3.2_AM335xPSP_04.06.00.11, v3.2_NEWT335xPSP_04.06.00.11, v3.2_SBC_SMARTMEN

OPP Table fix for 720MHZ and ZCE support 

Current OPP table excludes 720MHz OPPs for ES 2.0 and ES 2.1.  It also
excludes an 300MHz at 1.1V operating point required for ZCE support on
ES 2.1.
This patch implements support for the same.

As per Sitara AM335x ARM Cortex -A8 Microprocessors (MPUs) data sheet
(SPRS717F) APRIL 2013 available at
http://www.ti.com/lit/ds/symlink/am3359.pdf

Table 3-7 and 3-9 has been updated to show the defined OPPs on ZCZ and
ZCE packages respectively

[ Hebbar Gururaja]:
	- Add Link to Documentation and reference table.
	- Fix merge issue and remove whitespace warning

Signed-off-by: Greg Guyotte <gguyotte@ti.com>
Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>

Showing 1 changed file with 36 additions and 16 deletions Side-by-side Diff

arch/arm/mach-omap2/opp3xxx_data.c
Diff comments   View file @ 97bdb69
... ... @@ -181,8 +181,9 @@
181 181  
182 182 #define AM33XX_ES2_0_VDD_MPU_OPP50_UV 950000
183 183 #define AM33XX_ES2_0_VDD_MPU_OPP100_UV 1100000
  184 +#define AM33XX_ES2_0_VDD_MPU_OPP120_UV 1200000
184 185 #define AM33XX_ES2_0_VDD_MPU_OPPTURBO_UV 1260000
185   -#define AM33XX_ES2_0_VDD_MPU_OPPNITRO_UV 1320000
  186 +#define AM33XX_ES2_0_VDD_MPU_OPPNITRO_UV 1325000
186 187  
187 188 static struct omap_opp_def __initdata am33xx_es2_0_opp_def_list[] = {
188 189 /* MPU OPP1 - OPP50 */
189 190  
190 191  
191 192  
192 193  
193 194  
... ... @@ -190,25 +191,30 @@
190 191 /* MPU OPP2 - OPP100 */
191 192 OPP_INITIALIZER("mpu", true, 600000000,
192 193 AM33XX_ES2_0_VDD_MPU_OPP100_UV),
193   - /* MPU OPP3 - OPPTurbo */
  194 + /* MPU OPP3 - OPP120 */
  195 + OPP_INITIALIZER("mpu", true, 720000000,
  196 + AM33XX_ES2_0_VDD_MPU_OPP120_UV),
  197 + /* MPU OPP4 - OPPTurbo */
194 198 OPP_INITIALIZER("mpu", true, 800000000,
195 199 AM33XX_ES2_0_VDD_MPU_OPPTURBO_UV),
196   - /* MPU OPP4 - OPPNitro */
  200 + /* MPU OPP5 - OPPNitro */
197 201 OPP_INITIALIZER("mpu", false, 1000000000,
198 202 AM33XX_ES2_0_VDD_MPU_OPPNITRO_UV),
199 203 };
200 204  
201 205 #define AM33XX_ES2_1_VDD_MPU_OPP50_UV 950000
202 206 #define AM33XX_ES2_1_VDD_MPU_OPP100_UV 1100000
  207 +#define AM33XX_ES2_1_VDD_MPU_OPP120_UV 1200000
203 208 #define AM33XX_ES2_1_VDD_MPU_OPPTURBO_UV 1260000
204   -#define AM33XX_ES2_1_VDD_MPU_OPPNITRO_UV 1350000
  209 +#define AM33XX_ES2_1_VDD_MPU_OPPNITRO_UV 1325000
205 210  
206   -#define OPP_50_INDEX 0
207   -#define OPP_100_INDEX 1
208   -#define OPP_TURBO_INDEX 2
209   -#define OPP_NITRO_INDEX 3
  211 +#define OPP_50_300_INDEX 0
  212 +#define OPP_100_300_INDEX 1
  213 +#define OPP_100_600_INDEX 2
  214 +#define OPP_120_720_INDEX 3
  215 +#define OPP_TURBO_800_INDEX 4
  216 +#define OPP_NITRO_1GHZ_INDEX 5
210 217  
211   -
212 218 /* From AM335x TRM, SPRUH73H, Section 9.3.50 */
213 219 #define AM33XX_EFUSE_SMA_OFFSET 0x7fc
214 220  
215 221  
216 222  
217 223  
... ... @@ -223,16 +229,23 @@
223 229 #define OPP_50_300MHZ_BIT (0x1 << 4)
224 230 #define OPP_100_300MHZ_BIT (0x1 << 5)
225 231 #define OPP_100_600MHZ_BIT (0x1 << 6)
  232 +#define OPP_120_720MHZ_BIT (0x1 << 7)
226 233 #define OPP_TURBO_800MHZ_BIT (0x1 << 8)
227 234 #define OPP_NITRO_1GHZ_BIT (0x1 << 9)
228 235  
229 236 static struct omap_opp_def __initdata am33xx_es2_1_opp_list[] = {
230   - /* MPU OPP1 - OPP50 */
  237 + /* MPU OPP1 - OPP50-300MHz */
231 238 OPP_INITIALIZER("mpu", false, 300000000,
232 239 AM33XX_ES2_1_VDD_MPU_OPP50_UV),
  240 + /* MPU OPP1 - OPP100-300MHz (used for ZCE) */
  241 + OPP_INITIALIZER("mpu", false, 300000000,
  242 + AM33XX_ES2_1_VDD_MPU_OPP100_UV),
233 243 /* MPU OPP2 - OPP100 */
234 244 OPP_INITIALIZER("mpu", false, 600000000,
235 245 AM33XX_ES2_1_VDD_MPU_OPP100_UV),
  246 + /* MPU OPP3 - OPP120 */
  247 + OPP_INITIALIZER("mpu", false, 720000000,
  248 + AM33XX_ES2_1_VDD_MPU_OPP120_UV),
236 249 /* MPU OPP3 - OPPTurbo */
237 250 OPP_INITIALIZER("mpu", false, 800000000,
238 251 AM33XX_ES2_1_VDD_MPU_OPPTURBO_UV),
239 252  
240 253  
241 254  
242 255  
... ... @@ -289,20 +302,27 @@
289 302 max_freq = (~val & MAX_FREQ_MASK);
290 303  
291 304 if (max_freq & OPP_50_300MHZ_BIT)
292   - am33xx_es2_1_opp_list[OPP_50_INDEX].
  305 + am33xx_es2_1_opp_list[OPP_50_300_INDEX].
293 306 default_available = true;
294 307  
295   - if ((max_freq & OPP_100_300MHZ_BIT) ||
296   - (max_freq & OPP_100_600MHZ_BIT))
297   - am33xx_es2_1_opp_list[OPP_100_INDEX].
  308 + if (max_freq & OPP_100_300MHZ_BIT)
  309 + am33xx_es2_1_opp_list[OPP_100_300_INDEX].
298 310 default_available = true;
299 311  
  312 + if (max_freq & OPP_100_600MHZ_BIT)
  313 + am33xx_es2_1_opp_list[OPP_100_600_INDEX].
  314 + default_available = true;
  315 +
  316 + if (max_freq & OPP_120_720MHZ_BIT)
  317 + am33xx_es2_1_opp_list[OPP_120_720_INDEX].
  318 + default_available = true;
  319 +
300 320 if (max_freq & OPP_TURBO_800MHZ_BIT)
301   - am33xx_es2_1_opp_list[OPP_TURBO_INDEX].
  321 + am33xx_es2_1_opp_list[OPP_TURBO_800_INDEX].
302 322 default_available = true;
303 323  
304 324 if (max_freq & OPP_NITRO_1GHZ_BIT)
305   - am33xx_es2_1_opp_list[OPP_NITRO_INDEX].
  325 + am33xx_es2_1_opp_list[OPP_NITRO_1GHZ_INDEX].
306 326 default_available = true;
307 327  
308 328 r = omap_init_opp_table(am33xx_es2_1_opp_list,